SuccessChanges

Summary

  1. [lldb] tab completion for `target modules search-paths insert​` (details)
  2. Add missing `-o -` to a recent test (details)
  3. [lldb] move the frame index completion into a common completion and apply it to `thread backtrace -s` (details)
  4. [SVE] Lower fixed length vector integer subtract operations. (details)
  5. [lldb] tab completion for `target modules load -u` (details)
  6. [clangd] RIFF.cpp - Use logical && instead of bitwise & for padding check (details)
  7. [X86] Rename combineVectorPackWithShuffle -> combineHorizOpWithShuffle. NFC. (details)
  8. [SVE] Add ISD nodes for predicated integer extend inreg operations. (details)
  9. [VE] Update bit operations (details)
  10. [compiler-rt][ubsan][test] Fix TypeCheck/misaligned.cpp on Sparc (details)
  11. [lldb] Fix unhandled switch case for GOFF in GDBRemoteCommunicationClient (details)
  12. [X86][FPEnv] Fix a use after free (details)
Commit 24bc8afd4baf703be7f4f4d70745d7680ceb54e2 by Raphael Isemann
[lldb] tab completion for `target modules search-paths insert​`

Dedicated completion for the command `target modules search-paths insert​` with a test case.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D83309
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp (diff)
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py (diff)
Commit ef0c0844fef6b1ee2497e64363fcacee2ff1b107 by dave
Add missing `-o -` to a recent test

Caught with a build-system that remounts the source directory read-only.
The file was modifiedllvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll (diff)
Commit 66fa73fa27991c2c12a4cc83143ed1f81874ded5 by Raphael Isemann
[lldb] move the frame index completion into a common completion and apply it to `thread backtrace -s`

Commands frame select and thread backtrace -s can be completed in the same way.
Moved the dedicated completion of frame select into a common completion and
apply it to the both commands, along with the test modified.
The file was modifiedlldb/include/lldb/Interpreter/CommandCompletions.h (diff)
The file was modifiedlldb/source/Interpreter/CommandObject.cpp (diff)
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py (diff)
The file was modifiedlldb/source/Commands/CommandCompletions.cpp (diff)
The file was modifiedlldb/source/Commands/CommandObjectFrame.cpp (diff)
Commit d542feb8e49bd3d43363724531c8f65b82d9759f by paul.walker
[SVE] Lower fixed length vector integer subtract operations.

Differential Revision: https://reviews.llvm.org/D85665
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-arith.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td (diff)
Commit 419f1be7b54ef2c285050c24e4b4c333cb108cfc by Raphael Isemann
[lldb] tab completion for `target modules load -u`

1. Added a common completion ModuleUUIDs to provide a list of the UUIDs of modules for completion;
2. Added a new enumeration item eArgTypeModuleUUID to CommandArgumentType which is set as the option argument type of OptionGroupUUID;
3. Applied the module UUID completion to the argument of the type eArgTypeModuleUUID in lldb/source/Interpreter/CommandObject.cpp;
4. Added an related test case in lldb/test/API/functionalities/completion/TestCompletion.py.
The file was modifiedlldb/source/Interpreter/OptionGroupUUID.cpp (diff)
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py (diff)
The file was modifiedlldb/source/Commands/CommandCompletions.cpp (diff)
The file was modifiedlldb/source/Interpreter/CommandObject.cpp (diff)
The file was modifiedlldb/include/lldb/Interpreter/CommandCompletions.h (diff)
The file was modifiedlldb/include/lldb/lldb-enumerations.h (diff)
Commit 73a6a36469468bb72d409d5179c6244e751545e2 by llvm-dev
[clangd] RIFF.cpp - Use logical && instead of bitwise & for padding check

Fixes PR47070
The file was modifiedclang-tools-extra/clangd/RIFF.cpp (diff)
Commit 49016eeab6bc7871e205935139c4924c22904df7 by llvm-dev
[X86] Rename combineVectorPackWithShuffle -> combineHorizOpWithShuffle. NFC.

The plan is to use this for (F)HADD/SUB opcodes as well as PACKs - similar to how we use combineShuffleWithHorizOp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit b6c7b7fa31b738d97181416f06bbcc3dc5905407 by paul.walker
[SVE] Add ISD nodes for predicated integer extend inreg operations.

These are useful instructions when lowering fixed length vector
extends, so I've broken this patch out as kind of NFC like work.

Differential Revision: https://reviews.llvm.org/D85546
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td (diff)
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h (diff)
Commit 59703f17361815e3854aeb0822961278246fb666 by marukawa
[VE] Update bit operations

Change bitreverse/bswap/ctlz/ctpop/cttz regression tests to support i128
and signext/zeroext i32 types.  This patch also change the way to support
i32 types using 64 bits VE instructions.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D85712
The file was modifiedllvm/test/CodeGen/VE/bitreverse.ll (diff)
The file was modifiedllvm/test/CodeGen/VE/bswap.ll (diff)
The file was modifiedllvm/test/CodeGen/VE/ctlz.ll (diff)
The file was modifiedllvm/lib/Target/VE/VEISelLowering.h (diff)
The file was modifiedllvm/test/CodeGen/VE/cttz.ll (diff)
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td (diff)
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/VE/ctpop.ll (diff)
Commit 8144a7d8fc00c1ed779cb2dfabd826eedb19f296 by ro
[compiler-rt][ubsan][test] Fix TypeCheck/misaligned.cpp on Sparc

Two ubsan tests FAIL on Sparc:

  UBSan-Standalone-sparc :: TestCases/TypeCheck/misaligned.cpp
  UBSan-Standalone-sparcv9 :: TestCases/TypeCheck/misaligned.cpp

I've reported the details in Bug 47015, but it boils down to the fact that
the `s1` subtest actually incurs a fault on strict-alignment targets like
Sparc which UBSan doesn't expect.

This can be fixed like the `w1` subtest by compiling with
`-fno-sanitize-recover=alignment`.

Tested on `sparcv9-sun-solaris2.11`, `amd64-pc-solaris2.11`, and
`x86_64-pc-linux-gnu`.

Differential Revision: https://reviews.llvm.org/D85433
The file was modifiedcompiler-rt/test/ubsan/TestCases/TypeCheck/misaligned.cpp (diff)
Commit 33d0031edba2483579b875fc20171cafef2f6a64 by Raphael Isemann
[lldb] Fix unhandled switch case for GOFF in GDBRemoteCommunicationClient

Just implementing the default case that emits an error to supress the compiler
warning.
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp (diff)
Commit 1de173c049841e0c3262ffbf416dba006500a140 by benny.kra
[X86][FPEnv] Fix a use after free

Found by asan!
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp (diff)