SuccessChanges

Summary

  1. [Remarks] Add parser for bitstream remarks (details)
  2. [X86] Allow _MM_FROUND_CUR_DIRECTION and _MM_FROUND_NO_EXC to be used (details)
  3. [SelectionDAG] Remove ISD::FP_ROUND_INREG (details)
  4. AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics (details)
  5. [x86] add test for false dependency with minsize (PR43239); NFC (details)
  6. [IfConversion] Correctly handle cases where analyzeBranch fails. (details)
  7. AMDGPU/GlobalISel: Select fmed3 (details)
  8. AMDGPU/GlobalISel: Select llvm.amdgcn.class (details)
  9. [Driver] Add -static-openmp driver option (details)
  10. AMDGPU: Make VReg_1 size be 1 (details)
Commit a85d9ef11ae3dd5c840b1087555b04bedc304113 by francisvm
[Remarks] Add parser for bitstream remarks
The bitstream remark serializer landed in r367372.
This adds a bitstream remark parser that parser bitstream remark files
to llvm::remarks::Remark objects through the RemarkParser interface.
A few interesting things to point out:
* There are parsing helpers to parse the different types of blocks
* The main parsing helper allows us to parse remark metadata and open an
external file containing the encoded remarks
* This adds a dependency from the Remarks library to the BitstreamReader
library
* The testing strategy is to create a remark entry through YAML, parse
it, serialize it to bitstream, parse that back and compare the objects.
* There are close to no tests for malformed bitstream remarks, due to
the lack of textual format for the bitstream format.
* This adds a new C API for parsing bitstream remarks:
LLVMRemarkParserCreateBitstream.
* This bumps the REMARKS_API_VERSION to 1.
Differential Revision: https://reviews.llvm.org/D67134
llvm-svn: 371429
The file was modifiedllvm/lib/Remarks/CMakeLists.txt (diff)
The file was addedllvm/lib/Remarks/BitstreamRemarkParser.cpp
The file was modifiedllvm/lib/Remarks/LLVMBuild.txt (diff)
The file was modifiedllvm/unittests/Remarks/CMakeLists.txt (diff)
The file was addedllvm/lib/Remarks/BitstreamRemarkParser.h
The file was addedllvm/unittests/Remarks/BitstreamRemarksParsingTest.cpp
The file was modifiedllvm/include/llvm-c/Remarks.h (diff)
The file was modifiedllvm/include/llvm/Bitstream/BitstreamReader.h (diff)
The file was addedllvm/include/llvm/Remarks/BitstreamRemarkParser.h
The file was modifiedllvm/tools/remarks-shlib/Remarks.exports (diff)
The file was modifiedllvm/lib/Remarks/RemarkParser.cpp (diff)
Commit ce2cb0f09e7d66f34e5f2110bfcd9e3dff60feaa by craig.topper
[X86] Allow _MM_FROUND_CUR_DIRECTION and _MM_FROUND_NO_EXC to be used
together on instructions that only support SAE and not embedded
rounding.
Current for SAE instructions we only allow _MM_FROUND_CUR_DIRECTION(bit
2) or _MM_FROUND_NO_EXC(bit 3) to be used as the immediate passed to the
inrinsics. But these instructions don't perform rounding so
_MM_FROUND_CUR_DIRECTION is just sort of a default placeholder when you
don't want to suppress exceptions. Using _MM_FROUND_NO_EXC by itself is
really bit equivalent to (_MM_FROUND_NO_EXC | _MM_FROUND_TO_NEAREST_INT)
since _MM_FROUND_TO_NEAREST_INT is 0. Since we aren't rounding on these
instructions we should also accept (_MM_FROUND_CUR_DIRECTION |
_MM_FROUND_NO_EXC) as equivalent to (_MM_FROUND_NO_EXC). icc allows
this, but gcc does not.
Differential Revision: https://reviews.llvm.org/D67289
llvm-svn: 371430
The file was modifiedclang/lib/Sema/SemaChecking.cpp (diff)
The file was modifiedclang/test/Sema/builtins-x86.c (diff)
The file was modifiedllvm/test/CodeGen/X86/avx512-intrinsics.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 5ebd0a6e88a5c70805ec5077289e602c8e16a83f by craig.topper
[SelectionDAG] Remove ISD::FP_ROUND_INREG
I don't think anything in tree creates this node. So all of this code
appears to be dead.
Code coverage agrees
http://lab.llvm.org:8080/coverage/coverage-reports/llvm/coverage/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp.html
Differential Revision: https://reviews.llvm.org/D67312
llvm-svn: 371431
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp (diff)
The file was modifiedllvm/docs/ReleaseNotes.rst (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
Commit 6ebf605851db3627bdf51a89b0a36147729014c2 by Matthew.Arsenault
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics
This enables GlobalISel to handle various intrinsics. The custom node
pattern will be ignored, and the intrinsic will work. This will also
allow SelectionDAG to directly select the intrinsics, but as they are
all custom lowered to the nodes, this ends up leaving dead code in the
table.
Eventually either GlobalISel should add the equivalent of custom nodes
equivalent, or intrinsics should be directly used. These each have
different tradeoffs.
There are a few more to handle, but these are easy to handle ones. Some
others fail for other reasons.
llvm-svn: 371432
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
Commit c195bde3d4db7bd5746aecd9cbdf6c386968e660 by spatel
[x86] add test for false dependency with minsize (PR43239); NFC
llvm-svn: 371433
The file was modifiedllvm/test/CodeGen/X86/sqrt-partial.ll (diff)
Commit 79f0d3a6e58b80e38040c9ef639431a268422058 by efriedma
[IfConversion] Correctly handle cases where analyzeBranch fails.
If analyzeBranch fails, on some targets, the out parameters point to
some blocks in the function. But we can't use that information, so make
sure to clear it out.  (In some places in IfConversion, we assume that
any block with a TrueBB is analyzable.)
The change to the testcase makes it trigger a bug on builds without this
fix: IfConvertDiamond tries to perform a followup "merge" operation,
which isn't legal, and we somehow end up with a branch to a deleted MBB.
I'm not sure how this doesn't crash the compiler.
Differential Revision: https://reviews.llvm.org/D67306
llvm-svn: 371434
The file was modifiedllvm/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir (diff)
The file was modifiedllvm/lib/CodeGen/IfConversion.cpp (diff)
Commit d6c1f5bb154a0b524b92d15b99a882d654f906ce by Matthew.Arsenault
AMDGPU/GlobalISel: Select fmed3
llvm-svn: 371435
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td (diff)
Commit 77e3e9cafd9642375132e7bb0b13be415872b531 by Matthew.Arsenault
AMDGPU/GlobalISel: Select llvm.amdgcn.class
Also fixes missing SubtargetPredicate on f16 class instructions.
llvm-svn: 371436
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/VOPCInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
Commit d60ff75b562b56177dfe9337f123637bf904f884 by pirama
[Driver] Add -static-openmp driver option
Summary: For Gnu, FreeBSD and NetBSD, this option forces linking with
the static OpenMP host runtime (similar to -static-libgcc and
-static-libstdcxx).
Android's NDK will start the shared OpenMP runtime in addition to the
static libomp.  In this scenario, the linker will prefer to use the
shared library by default.  Add this option to enable linking with the
static libomp.
Reviewers: Hahnfeld, danalbert, srhines, joerg, jdoerfert
Subscribers: guansong, cfe-commits
Tags: #clang
Fixes https://github.com/android-ndk/ndk/issues/1028
Differential Revision: https://reviews.llvm.org/D67200
llvm-svn: 371437
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.h (diff)
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp (diff)
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp (diff)
The file was modifiedclang/include/clang/Driver/Options.td (diff)
The file was modifiedclang/test/Driver/fopenmp.c (diff)
The file was modifiedclang/lib/Driver/ToolChains/NetBSD.cpp (diff)
The file was modifiedclang/lib/Driver/ToolChains/FreeBSD.cpp (diff)
Commit 8bc05d7d603e3964c811fd65235f276858104fbb by Matthew.Arsenault
AMDGPU: Make VReg_1 size be 1
This was getting chosen as the preferred 32-bit register class based on
how TableGen selects subregister classes.
llvm-svn: 371438
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir (diff)