FailedChanges

Summary

  1. AMDGPU/GlobalISel: Select 16-bit VALU bit ops (details)
  2. AMDGPU/GlobalISel: Fix RegBankSelect for amdgcn.else (details)
Commit 638f802381178350c0897659515607b92bd20dcb by Matthew.Arsenault
AMDGPU/GlobalISel: Select 16-bit VALU bit ops
llvm-svn: 371807
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir (diff)
Commit 67d9349dad3f4a950e6a389748feb028abb00537 by Matthew.Arsenault
AMDGPU/GlobalISel: Fix RegBankSelect for amdgcn.else
llvm-svn: 371808
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir