FailedChanges

Summary

  1. [remark][diagnostics] Using clang diagnostic handler for IR input files (details)
  2. [mlir][spirv] Properly support SPIR-V conversion target (details)
  3. [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU. (details)
Commit 60d39479221d6bc09060f7816bcd7c54eb286603 by xur
[remark][diagnostics] Using clang diagnostic handler for IR input files
For IR input files, we currently use LLVM diagnostic handler even the
compilation is from clang. As a result, we are not able to use -Rpass to
get the transformation reports. Some warnings are not handled properly
either: We found many mysterious warnings in our ThinLTO backend
compilations in SamplePGO and CSPGO. An example of the warning:
"warning: net/proto2/public/metadata_lite.h:51:21: 0.02% (1 / 4999)"
This turns out to be a warning by Wmisexpect, which is supposed to be
filtered out by default. But since the filter is in clang's diagnostic
hander, we emit these incomplete warnings from LLVM's diagnostic
handler.
This patch uses clang diagnostic handler for IR input files. We create a
fake backendconsumer just to install the diagnostic handler.
With this change, we will have proper handling of all the warnings and
we can use -Rpass* options in IR input files compilation. Also note that
with is patch, LLVM's diagnostic options, like
"-mllvm -pass-remarks=*", are no longer be able to get optimization
remarks.
Differential Revision: https://reviews.llvm.org/D72523
The file was modifiedclang/lib/CodeGen/CodeGenAction.cpp (diff)
The file was addedclang/test/CodeGen/thinlto-clang-diagnostic-handler-in-be.c
The file was modifiedclang/test/CodeGen/thinlto-diagnostic-handler-remarks-with-hotness.ll (diff)
The file was addedclang/test/CodeGen/Inputs/thinlto_expect1.proftext
The file was addedclang/test/CodeGen/Inputs/thinlto_expect2.proftext
Commit 47c6ab2b97773ee5fb360fc093a5824be64b8c68 by antiagainst
[mlir][spirv] Properly support SPIR-V conversion target
This commit defines a new SPIR-V dialect attribute for specifying a
SPIR-V target environment. It is a dictionary attribute containing the
SPIR-V version, supported extension list, and allowed capability list. A
SPIRVConversionTarget subclass is created to take in the target
environment and sets proper dynmaically legal ops by querying the op
availability interface of SPIR-V ops to make sure they are available in
the specified target environment. All existing conversions targeting
SPIR-V is changed to use this SPIRVConversionTarget. It probes whether
the input IR has a `spv.target_env` attribute, otherwise, it uses the
default target environment: SPIR-V 1.0 with Shader capability and no
extra extensions.
Differential Revision: https://reviews.llvm.org/D72256
The file was modifiedmlir/test/Dialect/SPIRV/TestAvailability.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.td (diff)
The file was modifiedmlir/lib/Dialect/SPIRV/TargetAndABI.cpp (diff)
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp (diff)
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp (diff)
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRVPass.cpp (diff)
The file was addedmlir/test/Dialect/SPIRV/target-env.mlir
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRVPass.cpp (diff)
The file was modifiedmlir/docs/Dialects/SPIR-V.md (diff)
The file was modifiedmlir/test/Dialect/SPIRV/target-and-abi.mlir (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h (diff)
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.h (diff)
Commit 01a4b83154760ea286117ac4de9576b8a215cb8d by michael.hliao
[codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.
Summary:
- `dead-mi-elimination` assumes MIR in the SSA form and cannot be
arranged after phi elimination or DeSSA. It's enhanced to handle the
dead register definition by skipping use check on it. Once a register
def is `dead`, all its uses, if any, should be `undef`.
- Re-arrange the DIE in RA phase for AMDGPU by placing it directly after
`detect-dead-lanes`.
- Many relevant tests are refined due to different register assignment.
Reviewers: rampitec, qcolombet, sunfish
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72709
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8u.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/bswap.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll (diff)
The file was addedllvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.round.f64.ll (diff)
The file was modifiedllvm/lib/CodeGen/DeadMachineInstructionElim.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/copy-illegal-type.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/select.f16.ll (diff)
The file was removedllvm/test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/loop_break.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll (diff)