Started 13 days ago
Took 3 hr 52 min on green-dragon-02

Failed Build #14213 (Jun 13, 2019 4:27:05 PM)

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  • : 363335
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  1. [llvm-objcopy] Fix sparc target endianness

    Summary: AFAIK, the "sparc" target is big endian and the target for 32-bit little-endian SPARC is denoted as "sparcel". This patch fixes the endianness of "sparc" target and adds "sparcel" target for 32-bit little-endian SPARC.

    Reviewers: espindola, alexshap, rupprecht, jhenderson

    Reviewed By: jhenderson

    Subscribers: jyknight, emaste, arichardson, fedor.sergeev, jakehehrlich, MaskRay, llvm-commits

    Tags: #llvm

    Differential Revision: (detail)
    by seiya
  2. Use fully qualified name when printing S_CONSTANT records

    Before it was using the fully qualified name only for static data members.
    Now it does for all variable names to match MSVC.

    Reviewers: rnk

    Subscribers: hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: (detail)
    by akhuang
  3. Symbolize: Remove dead code. NFCI.

    The only caller of SymbolizableObjectFile::create passes a non-null
    DebugInfoContext and asserts that they do so. Move the assert into
    SymbolizableObjectFile::create and remove null checks.

    Differential Revision: (detail)
    by pcc
  4. [libc++] Fix build with gcc 4.8

    gcc 4.8.4 (but not 5.4.0 or 7.3.0) has trouble initializing errc with {}, giving
    the error in [1]. This CL switches to explicitly using errc(0), which gcc 4.8


    Differential Revision: (detail)
    by thomasanderson
  5. [AMDGPU] gfx10 documentation update. NFC. (detail)
    by rampitec
  6. [GlobalISel][IRTranslator] Add debug loc with line 0 to constants emitted into the entry block.

    Constants, including G_GLOBAL_VALUE, are all emitted into the entry block which
    lets us use the vreg def assuming it dominates all other users. However, it can
    cause jumpy debug behaviour since the DebugLoc attached to these MIs are from
    a user instruction that could be in a different block.

    Fixes PR40887.

    Differential Revision: (detail)
    by aemerson
  7. [X86Disassembler] Unify the EVEX and VEX code in emitContextTable. Merge the ATTR_VEXL/ATTR_EVEXL bits. NFCI

    Merging the two bits shrinks the context table from 16384 bytes to 8192 bytes.

    Remove the ATTRIBUTE_BITS macro and just create an enum directly. Then fix the ATTR_max define to be 8192 to reflect the table size so we stop hardcoding it separately. (detail)
    by ctopper
  8. [MachinePiepliner] Don't check boundary node in checkValidNodeOrder

    This was exposed by PowerPC target enablement.

    In ScheduleDAG, if we haven't seen any uses in this scheduling region,
    we will create a dependence edge to ExitSU to model the live-out latency.
    This is required for vreg defs with no in-region use, and prefetches with
    no vreg def.

    When we build NodeOrder in Scheduler, we ignore these boundary nodes.
    However, when we check Succs in checkValidNodeOrder, we did not skip
    them, so we still assume all the nodes have been sorted and in order in
    Indices array. So when we call lower_bound() for ExitSU, it will return
    Indices.end(), causing memory issues in following Node access.

    Differential Revision: (detail)
    by jsji
  9. [Remarks] Refactor optimization remarks setup

    * Add a common function to setup opt-remarks
    * Rename common options to the same names
    * Add error types to distinguish between file errors and regex errors (detail)
    by thegameg

Started by timer (2 times)

This run spent:

  • 1 hr 17 min waiting;
  • 3 hr 52 min build duration;
  • 5 hr 9 min total from scheduled to completion.

Identified problems

Missing test results

The test result file Jenkins is looking for does not exist after the build.
Indication 1

Ninja target failed

Below is a link to the first failed ninja target.
Indication 2