FailedChanges

Summary

  1. [ubsan][test] Fix cast-overflow.cpp and delete float-divide-by-zero test after D63793/rC365272
  2. [ARM] Relax constraints on operands of VQxDMLxDH instructions Summary: According to a recently updated Armv8-M spec (https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf) the 32-bit width versions of the following instructions: * VQDMLADH * VQDMLADHX * VQRDMLADH * VQRDMLADHX * VQDMLSDH * VQDMLSDHX * VQRDMLSDH * VQRDMLSDHX are no longer unpredictable when their output register is the same as one of the input registers. This patch updates the assembler parser and the corresponding tests and also removes @earlyclobber from the instruction constraints. Reviewers: simon_tatham, ostannard, dmgreen, SjoerdMeijer, samparker Reviewed By: simon_tatham Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64250
  3. [RISCV] Specify registers used for exception handling Implements the handling of __builtin_eh_return_regno(). Differential Revision: https://reviews.llvm.org/D63417 Patch by Edward Jones.
  4. [ubsan][test] Fix several UBSan-* :: TestCases/ImplicitConversion tests on Solaris A couple of UBSan-* :: TestCases/ImplicitConversion testcases FAIL on Solaris/x86 (and Solaris/SPARC with https://reviews.llvm.org/D40900): FAIL: UBSan-AddressSanitizer-i386 :: TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c (49187 of 49849) ******************** TEST 'UBSan-AddressSanitizer-i386 :: TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c' FAILED ******************** [...] Command Output (stderr): -- /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:53:11: error: CHECK: expected string not found in input // CHECK: {{.*}}signed-integer-truncation-or-sign-change-blacklist.c:[[@LINE-1]]:10: runtime error: implicit conversion from type '{{.*}}' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type '{{.*}}' (aka 'signed char') changed the value to -1 (8-bit, signed) ^ <stdin>:1:1: note: scanning from here /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:52:10: runtime error: implicit conversion from type 'uint32_t' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type 'int8_t' (aka 'char') changed the value to -1 (8-bit, signed) ^ <stdin>:1:1: note: with "@LINE-1" equal to "52" /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:52:10: runtime error: implicit conversion from type 'uint32_t' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type 'int8_t' (aka 'char') changed the value to -1 (8-bit, signed) ^ <stdin>:1:69: note: possible intended match here /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:52:10: runtime error: implicit conversion from type 'uint32_t' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type 'int8_t' (aka 'char') changed the value to -1 (8-bit, signed) ^ This is always a difference for int8_t where signed char is expected, but only char seen. I could trace this to <sys/int_types.h> which has /* * Basic / Extended integer types * * The following defines the basic fixed-size integer types. * * Implementations are free to typedef them to Standard C integer types or * extensions that they support. If an implementation does not support one * of the particular integer data types below, then it should not define the * typedefs and macros corresponding to that data type. Note that int8_t * is not defined in -Xs mode on ISAs for which the ABI specifies "char" * as an unsigned entity because there is no way to define an eight bit * signed integral. */ #if defined(_CHAR_IS_SIGNED) typedef char int8_t; #else #if defined(__STDC__) typedef signed char int8_t; #endif #endif _CHAR_IS_SIGNED is always defined on both sparc and x86. Since it seems ok to have either form, I've changed the affected tests to use '{{(signed )?}}char' instead of 'signed char'. Tested on x86_64-pc-solaris2.11, sparcv9-sun-solaris2.11, and x86_64-pc-linux-gnu. Differential Revision: https://reviews.llvm.org/D63984
  5. [ubsan][test] Don't disable ubsan testing on 64-bit Solaris/x86 Unlike asan, which isn't supported yet on 64-bit Solaris/x86, there's no reason to disable ubsan. This patch does that, but keeps the 64-bit ubsan-with-asan tests disabled. Tested on x86_64-pc-solaris2.11. Differential Revision: https://reviews.llvm.org/D63982
  6. [RISCV] Specify registers used in DWARF exception handling Defines RISCV registers for getExceptionPointerRegister() and getExceptionSelectorRegister(). Differential Revision: https://reviews.llvm.org/D63411 Patch by Edward Jones. Modified by Alex Bradbury to add CHECK lines to exception-pointer-register.ll.
  7. [AArch64] Fix scalar vuqadd intrinsics operands Summary: Change the vuqadd scalar instrinsics to have the second argument as unsigned values, not signed, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics So now the compiler correctly warns that a undefined negative float conversion is being done. Reviewers: LukeCheeseman, john.brawn Reviewed By: john.brawn Subscribers: john.brawn, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64242
  8. [ARM] Fix null pointer dereference in CodeGen/ARM/Windows/stack-protector-msvc.ll.test after D64292/r365283 CLI.CS may not be set.
  9. [AArch64] Fix vsqadd scalar intrinsics operands Summary: Change the vsqadd scalar instrinsics to have the second argument as signed values, not unsigned, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics The existing unsigned argument can cause faulty code as negative float to unsigned conversion is undefined, which llvm/clang optimizes away. Reviewers: LukeCheeseman, john.brawn Reviewed By: john.brawn Subscribers: john.brawn, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64239
  10. [UpdateTestChecks] Skip over .Lfunc_begin for RISC-V This mirrors the change made for X86 in rL336987. Without this patch, update_llc_test_checks will completely skip functions with personality functions.
  11. [AMDGPU] Use a named predicate instead of a magic number. Reviewers: arsenm Reviewed By: arsenm Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64201
  12. [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. This can help with code size on SSE targets where SHUFPD requires a 0x66 prefix and SHUFPS doesn't.
  13. [X86] Make movsd commutable to shufpd with a 0x02 immediate on pre-SSE4.1 targets. This can help avoid a copy or enable load folding. On SSE4.1 targets we can commute it to blendi instead. I had to make shufpd with a 0x02 immediate commutable as well since we expect commuting to be reversible.
Revision 365307 by maskray:
[ubsan][test] Fix cast-overflow.cpp and delete float-divide-by-zero test after D63793/rC365272
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/Float/cast-overflow.cppcompiler-rt.src/test/ubsan/TestCases/Float/cast-overflow.cpp
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/Integer/div-zero.cppcompiler-rt.src/test/ubsan/TestCases/Integer/div-zero.cpp
Revision 365306 by miyuki:
[ARM] Relax constraints on operands of VQxDMLxDH instructions

Summary:
According to a recently updated Armv8-M spec
(https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf) the
32-bit width versions of the following instructions:
* VQDMLADH
* VQDMLADHX
* VQRDMLADH
* VQRDMLADHX
* VQDMLSDH
* VQDMLSDHX
* VQRDMLSDH
* VQRDMLSDHX
are no longer unpredictable when their output register is the same as
one of the input registers.

This patch updates the assembler parser and the corresponding tests
and also removes @earlyclobber from the instruction constraints.

Reviewers: simon_tatham, ostannard, dmgreen, SjoerdMeijer, samparker

Reviewed By: simon_tatham

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64250
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMInstrMVE.tdllvm.src/lib/Target/ARM/ARMInstrMVE.td
The file was modified/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cppllvm.src/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was modified/llvm/trunk/test/MC/ARM/mve-qdest-qsrc.sllvm.src/test/MC/ARM/mve-qdest-qsrc.s
Revision 365305 by asb:
[RISCV] Specify registers used for exception handling

Implements the handling of __builtin_eh_return_regno().

Differential Revision: https://reviews.llvm.org/D63417
Patch by Edward Jones.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/Basic/Targets/RISCV.hclang.src/lib/Basic/Targets/RISCV.h
The file was added/cfe/trunk/test/CodeGen/builtins-riscv.cclang.src/test/CodeGen/builtins-riscv.c
Revision 365303 by ro:
[ubsan][test] Fix several UBSan-* :: TestCases/ImplicitConversion tests on Solaris

A couple of UBSan-*  :: TestCases/ImplicitConversion testcases FAIL on Solaris/x86
(and Solaris/SPARC with https://reviews.llvm.org/D40900):

  FAIL: UBSan-AddressSanitizer-i386 :: TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c (49187 of 49849)
  ******************** TEST 'UBSan-AddressSanitizer-i386 :: TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c' FAILED ********************
  [...]
  Command Output (stderr):
  --
  /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:53:11: error: CHECK: expected string not found in input
  // CHECK: {{.*}}signed-integer-truncation-or-sign-change-blacklist.c:[[@LINE-1]]:10: runtime error: implicit conversion from type '{{.*}}' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type '{{.*}}' (aka 'signed char') changed the value to -1 (8-bit, signed)
            ^
  <stdin>:1:1: note: scanning from here
  /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:52:10: runtime error: implicit conversion from type 'uint32_t' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type 'int8_t' (aka 'char') changed the value to -1 (8-bit, signed)
  ^
  <stdin>:1:1: note: with "@LINE-1" equal to "52"
  /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:52:10: runtime error: implicit conversion from type 'uint32_t' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type 'int8_t' (aka 'char') changed the value to -1 (8-bit, signed)
  ^
  <stdin>:1:69: note: possible intended match here
  /vol/llvm/src/compiler-rt/local/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c:52:10: runtime error: implicit conversion from type 'uint32_t' (aka 'unsigned int') of value 4294967295 (32-bit, unsigned) to type 'int8_t' (aka 'char') changed the value to -1 (8-bit, signed)
                                                                      ^

This is always a difference for int8_t where signed char is expected, but only
char seen.

I could trace this to <sys/int_types.h> which has

  /*
   * Basic / Extended integer types
   *
   * The following defines the basic fixed-size integer types.
   *
   * Implementations are free to typedef them to Standard C integer types or
   * extensions that they support. If an implementation does not support one
   * of the particular integer data types below, then it should not define the
   * typedefs and macros corresponding to that data type.  Note that int8_t
   * is not defined in -Xs mode on ISAs for which the ABI specifies "char"
   * as an unsigned entity because there is no way to define an eight bit
   * signed integral.
   */
  #if defined(_CHAR_IS_SIGNED)
  typedef char int8_t;
  #else
  #if defined(__STDC__)
  typedef signed char int8_t;
  #endif
  #endif

_CHAR_IS_SIGNED is always defined on both sparc and x86.  Since it seems ok
to have either form, I've changed the affected tests to use
'{{(signed )?}}char' instead of 'signed char'.

Tested on x86_64-pc-solaris2.11, sparcv9-sun-solaris2.11, and x86_64-pc-linux-gnu.

Differential Revision: https://reviews.llvm.org/D63984
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/ImplicitConversion/integer-arithmetic-value-change.ccompiler-rt.src/test/ubsan/TestCases/ImplicitConversion/integer-arithmetic-value-change.c
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/ImplicitConversion/integer-conversion.ccompiler-rt.src/test/ubsan/TestCases/ImplicitConversion/integer-conversion.c
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/ImplicitConversion/integer-sign-change.ccompiler-rt.src/test/ubsan/TestCases/ImplicitConversion/integer-sign-change.c
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/ImplicitConversion/integer-truncation.ccompiler-rt.src/test/ubsan/TestCases/ImplicitConversion/integer-truncation.c
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.ccompiler-rt.src/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c
The file was modified/compiler-rt/trunk/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation.ccompiler-rt.src/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation.c
Revision 365302 by ro:
[ubsan][test] Don't disable ubsan testing on 64-bit Solaris/x86

Unlike asan, which isn't supported yet on 64-bit Solaris/x86, there's no reason to disable
ubsan.  This patch does that, but keeps the 64-bit ubsan-with-asan tests disabled.

Tested on x86_64-pc-solaris2.11.

Differential Revision: https://reviews.llvm.org/D63982
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/test/ubsan/CMakeLists.txtcompiler-rt.src/test/ubsan/CMakeLists.txt
The file was modified/compiler-rt/trunk/test/ubsan_minimal/CMakeLists.txtcompiler-rt.src/test/ubsan_minimal/CMakeLists.txt
Revision 365301 by asb:
[RISCV] Specify registers used in DWARF exception handling

Defines RISCV registers for getExceptionPointerRegister() and
getExceptionSelectorRegister().

Differential Revision: https://reviews.llvm.org/D63411
Patch by Edward Jones.
Modified by Alex Bradbury to add CHECK lines to exception-pointer-register.ll.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cppllvm.src/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.hllvm.src/lib/Target/RISCV/RISCVISelLowering.h
The file was added/llvm/trunk/test/CodeGen/RISCV/exception-pointer-register.llllvm.src/test/CodeGen/RISCV/exception-pointer-register.ll
Revision 365300 by dnsampaio:
[AArch64] Fix scalar vuqadd intrinsics operands

Summary:
Change the vuqadd scalar instrinsics to have the second argument as unsigned values, not signed,
accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics

So now the compiler correctly warns that a undefined negative float conversion is being done.

Reviewers: LukeCheeseman, john.brawn

Reviewed By: john.brawn

Subscribers: john.brawn, javed.absar, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64242
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/arm_neon.tdclang.src/include/clang/Basic/arm_neon.td
The file was modified/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.cclang.src/test/CodeGen/aarch64-neon-intrinsics.c
The file was added/cfe/trunk/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.cclang.src/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.c
Revision 365299 by maskray:
[ARM] Fix null pointer dereference in CodeGen/ARM/Windows/stack-protector-msvc.ll.test after D64292/r365283

CLI.CS may not be set.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMISelLowering.cppllvm.src/lib/Target/ARM/ARMISelLowering.cpp
Revision 365298 by dnsampaio:
[AArch64] Fix vsqadd scalar intrinsics operands

Summary:
Change the vsqadd scalar instrinsics to have the second argument as signed values, not unsigned,
accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics

The existing unsigned argument can cause faulty code as negative float to unsigned conversion is
undefined, which llvm/clang optimizes away.

Reviewers: LukeCheeseman, john.brawn

Reviewed By: john.brawn

Subscribers: john.brawn, javed.absar, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64239
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/arm_neon.tdclang.src/include/clang/Basic/arm_neon.td
The file was modified/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.cclang.src/test/CodeGen/aarch64-neon-intrinsics.c
The file was added/cfe/trunk/test/CodeGen/aarch64-neon-vsqadd-float-conversion.cclang.src/test/CodeGen/aarch64-neon-vsqadd-float-conversion.c
Revision 365297 by asb:
[UpdateTestChecks] Skip over .Lfunc_begin for RISC-V

This mirrors the change made for X86 in rL336987. Without this patch,
update_llc_test_checks will completely skip functions with personality
functions.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/UpdateTestChecks/asm.pyllvm.src/utils/UpdateTestChecks/asm.py
Revision 365294 by foad:
[AMDGPU] Use a named predicate instead of a magic number.

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64201
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cppllvm.src/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
Revision 365293 by ctopper:
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.

This can help with code size on SSE targets where SHUFPD requires
a 0x66 prefix and SHUFPS doesn't.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86InstrInfo.cppllvm.src/lib/Target/X86/X86InstrInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/coalesce_commute_movsd.llllvm.src/test/CodeGen/X86/coalesce_commute_movsd.ll
The file was modified/llvm/trunk/test/CodeGen/X86/combine-sdiv.llllvm.src/test/CodeGen/X86/combine-sdiv.ll
The file was modified/llvm/trunk/test/CodeGen/X86/palignr.llllvm.src/test/CodeGen/X86/palignr.ll
The file was modified/llvm/trunk/test/CodeGen/X86/psubus.llllvm.src/test/CodeGen/X86/psubus.ll
The file was modified/llvm/trunk/test/CodeGen/X86/sdiv-exact.llllvm.src/test/CodeGen/X86/sdiv-exact.ll
The file was modified/llvm/trunk/test/CodeGen/X86/sse-align-12.llllvm.src/test/CodeGen/X86/sse-align-12.ll
The file was modified/llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.llllvm.src/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
The file was modified/llvm/trunk/test/CodeGen/X86/swizzle-2.llllvm.src/test/CodeGen/X86/swizzle-2.ll
The file was modified/llvm/trunk/test/CodeGen/X86/trunc-subvector.llllvm.src/test/CodeGen/X86/trunc-subvector.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-blend.llllvm.src/test/CodeGen/X86/vector-blend.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v2.llllvm.src/test/CodeGen/X86/vector-shuffle-128-v2.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.llllvm.src/test/CodeGen/X86/vector-shuffle-128-v4.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v8.llllvm.src/test/CodeGen/X86/vector-shuffle-128-v8.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-ssse3.llllvm.src/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.llllvm.src/test/CodeGen/X86/vector-shuffle-combining.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vselect-2.llllvm.src/test/CodeGen/X86/vselect-2.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vselect.llllvm.src/test/CodeGen/X86/vselect.ll
The file was modified/llvm/trunk/test/CodeGen/X86/x86-shifts.llllvm.src/test/CodeGen/X86/x86-shifts.ll
Revision 365292 by ctopper:
[X86] Make movsd commutable to shufpd with a 0x02 immediate on pre-SSE4.1 targets.

This can help avoid a copy or enable load folding.

On SSE4.1 targets we can commute it to blendi instead.

I had to make shufpd with a 0x02 immediate commutable as well
since we expect commuting to be reversible.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86InstrInfo.cppllvm.src/lib/Target/X86/X86InstrInfo.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86InstrSSE.tdllvm.src/lib/Target/X86/X86InstrSSE.td
The file was modified/llvm/trunk/test/CodeGen/X86/buildvec-insertvec.llllvm.src/test/CodeGen/X86/buildvec-insertvec.ll
The file was modified/llvm/trunk/test/CodeGen/X86/coalesce_commute_movsd.llllvm.src/test/CodeGen/X86/coalesce_commute_movsd.ll
The file was modified/llvm/trunk/test/CodeGen/X86/combine-sdiv.llllvm.src/test/CodeGen/X86/combine-sdiv.ll
The file was modified/llvm/trunk/test/CodeGen/X86/psubus.llllvm.src/test/CodeGen/X86/psubus.ll
The file was modified/llvm/trunk/test/CodeGen/X86/sdiv-exact.llllvm.src/test/CodeGen/X86/sdiv-exact.ll
The file was modified/llvm/trunk/test/CodeGen/X86/sse2.llllvm.src/test/CodeGen/X86/sse2.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-blend.llllvm.src/test/CodeGen/X86/vector-blend.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shift-ashr-sub128.llllvm.src/test/CodeGen/X86/vector-shift-ashr-sub128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v2.llllvm.src/test/CodeGen/X86/vector-shuffle-128-v2.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v4.llllvm.src/test/CodeGen/X86/vector-shuffle-128-v4.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v8.llllvm.src/test/CodeGen/X86/vector-shuffle-128-v8.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-ssse3.llllvm.src/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.llllvm.src/test/CodeGen/X86/vector-shuffle-combining.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vselect-2.llllvm.src/test/CodeGen/X86/vselect-2.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vselect.llllvm.src/test/CodeGen/X86/vselect.ll
The file was modified/llvm/trunk/test/CodeGen/X86/x86-shifts.llllvm.src/test/CodeGen/X86/x86-shifts.ll