FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size (details)
  2. [mlir] Avoid pontentially ambiguous class name (details)
  3. [Host] Check for TARGET_OS_EMBEDDED instead of listing architectures. (details)
  4. [ObjectFileMachO] Check for TARGET_EMBEDDED instead of listing architectures. (details)
  5. Generalize TestFormattersBoolRefPtr to work on Apple Silicon. (details)
  6. Redo of Add terminateCommands to lldb-vscode protocol (details)
  7. [LLD][PowerPC] Add support for R_PPC64_PCREL34 (details)
  8. [DSE,MSSA] Treat `store 0` after calloc as noop stores. (details)
  9. [libc][Obvious] Fix few typos in tests. (details)
Commit cc9d69385659be32178506a38b4f2e112ed01ad4 by mahesha.comp
[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size

Summary:
Make use of both the - (1) clustered bytes and (2) cluster length, to decide on
the max number of mem ops that can be clustered. On an average, when loads
are dword or smaller, consider `5` as max threshold, otherwise `4`. This
heuristic is purely based on different experimentation conducted, and there is
no analytical logic here.

Reviewers: foad, rampitec, arsenm, vpykhtin

Reviewed By: rampitec

Subscribers: llvm-commits, kerbowa, hiraditya, t-tye, Anastasia, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, thakis

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82393
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/salu-to-valu.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shift-i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/kernel-args.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory_clause.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udivrem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
Commit 1db1a08ddae6174e0e0bf6f8a8404cef9091b68b by jean-michel.gorius
[mlir] Avoid pontentially ambiguous class name

Summary: The Pass class exists in both the mlir and the llvm namespaces. Use the fully qualified class name to avoid any ambiguities.

Reviewers: rriddle

Reviewed By: rriddle

Subscribers: mehdi_amini, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82371
The file was modifiedmlir/tools/mlir-tblgen/PassGen.cpp
Commit 3c79212319d878b07ef259d735b52b379f774e25 by ditaliano
[Host] Check for TARGET_OS_EMBEDDED instead of listing architectures.

With the advent of Apple Silicon, checking for the architectures
specifically is not correct anymore. This code is only supposed to
run on embedded devices (iPhones et similia), so mark it accordingly.
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
Commit 63d597093cccbb8d4962cf490e2d754a73a77e64 by ditaliano
[ObjectFileMachO] Check for TARGET_EMBEDDED instead of listing architectures.

Now that Apple Silicon is a thing, we need to generalize the check.
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Commit 33ece57241d8ad46cb91eca483f05515849a85e5 by ditaliano
Generalize TestFormattersBoolRefPtr to work on Apple Silicon.
The file was modifiedlldb/test/API/functionalities/data-formatter/boolreference/TestFormattersBoolRefPtr.py
Commit 74ab1da0285fb1f37fdb4648e2c677e97a2a5231 by waltermelon
Redo of Add terminateCommands to lldb-vscode protocol

Summary:
This redoes https://reviews.llvm.org/D79726 and fixes two things.
- The logic that determines whether to automatically disconnect during the tear down is not very dumb compared to the original implementation. Each test will determine whether to do that or not.
- The terminate commands and terminate event were being sent after the disconnect response was sent to the IDE. That was not good, as VSCode stops the debug session as soon as it receives a disconnect response. Now, the terminate event and terminateEvents are being executed before the disconnect response is sent. This ensures that any connection between the IDE and lldb-vscode is alive while the terminate commands are executed. Besides, it also allows displaying the output of the terminate commands on the debug console, as it's still alive.

Reviewers: clayborg, aadsm, kusmour, labath

Subscribers: lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D81978
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-vscode/vscode.py
The file was modifiedlldb/tools/lldb-vscode/lldb-vscode.cpp
The file was modifiedlldb/tools/lldb-vscode/VSCode.cpp
The file was modifiedlldb/tools/lldb-vscode/README.md
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-vscode/lldbvscode_testcase.py
The file was modifiedlldb/tools/lldb-vscode/VSCode.h
The file was modifiedlldb/test/API/tools/lldb-vscode/attach/TestVSCode_attach.py
The file was modifiedlldb/test/API/tools/lldb-vscode/launch/TestVSCode_launch.py
Commit 3a55a2a97fd419c1b6c5299b3523846a9fa9bc52 by kamau.bridgeman
[LLD][PowerPC] Add support for R_PPC64_PCREL34

Add support for the 34bit relocation R_PPC64_PCREL34 for PC Relative in LLD.
The file was addedlld/test/ELF/ppc64-reloc-pcrel34.s
The file was addedlld/test/ELF/ppc64-reloc-pcrel34-overflow.s
The file was modifiedlld/ELF/Arch/PPC64.cpp
Commit ff4de8683ad1802dbf20d0286861bd98462e92e2 by flo
[DSE,MSSA] Treat `store 0` after calloc as noop stores.

This patch extends storeIsNoop to also detect stores of 0 to an calloced
object. This basically ports the logic from legacy DSE to the MemorySSA
backed version.

It triggers in a few cases on MultiSource, SPEC2000, SPEC2006 with -O3
LTO:

Same hash: 218 (filtered out)
Remaining: 19
Metric: dse.NumNoopStores

Program                                        base   patch2 diff
test-suite...CFP2000/177.mesa/177.mesa.test     1.00  15.00 1400.0%
test-suite...6/482.sphinx3/482.sphinx3.test     1.00  14.00 1300.0%
test-suite...lications/ClamAV/clamscan.test     2.00  28.00 1300.0%
test-suite...CFP2006/433.milc/433.milc.test     1.00   8.00 700.0%
test-suite...pplications/oggenc/oggenc.test     2.00   9.00 350.0%
test-suite.../CINT2000/176.gcc/176.gcc.test     6.00   6.00  0.0%
test-suite.../CINT2006/403.gcc/403.gcc.test    NaN   137.00  nan%
test-suite...libquantum/462.libquantum.test    NaN     3.00  nan%
test-suite...6/464.h264ref/464.h264ref.test    NaN     7.00  nan%
test-suite...decode/alacconvert-decode.test    NaN     2.00  nan%
test-suite...encode/alacconvert-encode.test    NaN     2.00  nan%
test-suite...ications/JM/ldecod/ldecod.test    NaN     9.00  nan%
test-suite...ications/JM/lencod/lencod.test    NaN    39.00  nan%
test-suite.../Applications/lemon/lemon.test    NaN     2.00  nan%
test-suite...pplications/treecc/treecc.test    NaN     4.00  nan%
test-suite...hmarks/McCat/08-main/main.test    NaN     4.00  nan%
test-suite...nsumer-lame/consumer-lame.test    NaN     3.00  nan%
test-suite.../Prolangs-C/bison/mybison.test    NaN     1.00  nan%
test-suite...arks/mafft/pairlocalalign.test    NaN    30.00  nan%

Reviewers: efriedma, zoecarver, asbirlea

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D82204
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/simple-todo.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/calloc-store.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/simple.ll
Commit dc72be4e0130675833c56d4d72e22a56872876ea by sivachandra
[libc][Obvious] Fix few typos in tests.
The file was modifiedlibc/test/src/math/ceilf_test.cpp
The file was modifiedlibc/test/src/math/floorf_test.cpp
The file was modifiedlibc/test/src/math/modff_test.cpp
The file was modifiedlibc/test/src/math/roundf_test.cpp
The file was modifiedlibc/test/src/math/truncf_test.cpp
The file was modifiedlibc/test/src/math/frexpf_test.cpp