SuccessChanges

Summary

  1. Title: Fix build warning for operator<< when using GCC 7. Authored By: (details)
  2. [Attributor] Use the cached data layout directly (details)
  3. [AMDGPU] Use PredicateControl in MIMGBaseOpcode. NFC. (details)
  4. [webassembly] Apply llvm-prefer-register-over-unsigned from clang-tidy (details)
  5. [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to (details)
  6. [risc-v] Apply llvm-prefer-register-over-unsigned from clang-tidy to (details)
Commit a7165c088e11a9b244d9efde95291fa79692e2c9 by whitney.uwaterloo
Title: Fix build warning for operator<< when using GCC 7. Authored By:
etiotto Differential Revision: https://reviews.llvm.org/D63459
llvm-svn: 368624
The file was modifiedllvm/include/llvm/Analysis/LoopCacheAnalysis.h
Commit 26e58466de615adb36c79a4212287e9e8a4ac303 by jdoerfert
[Attributor] Use the cached data layout directly
This removes the warning by using the new DL member. It also simplifies
the code.
llvm-svn: 368625
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
Commit ef8f1c473a8259798f720f7b617abee962557b3f by Stanislav.Mekhanoshin
[AMDGPU] Use PredicateControl in MIMGBaseOpcode. NFC.
This is infrastructural, will be needed for future work. For some reason
it was only used in MIMG_NoSampler, while needed everywere we use
MIMGBaseOpcode if we want to use predicates.
Differential Revision: https://reviews.llvm.org/D66115
llvm-svn: 368626
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
Commit 05c145d694f2b55d2b56b7049fffe90978af7b65 by daniel_l_sanders
[webassembly] Apply llvm-prefer-register-over-unsigned from clang-tidy
to LLVM
Summary: This clang-tidy check is looking for unsigned integer variables
whose initializer starts with an implicit cast from llvm::Register and
changes the type of the variable to llvm::Register (dropping the llvm::
where possible).
Reviewers: aheejin
Subscribers: jholewinski, MatzeB, qcolombet, dschuff, jyknight,
dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100,
jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton,
fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos,
sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan,
rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji,
Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision for whole review: https://reviews.llvm.org/D65962
llvm-svn: 368627
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
Commit 5ae66e56cf0cff4e8cc8b4341767740521c77f6c by daniel_l_sanders
[aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to
LLVM
Summary: This clang-tidy check is looking for unsigned integer variables
whose initializer starts with an implicit cast from llvm::Register and
changes the type of the variable to llvm::Register (dropping the llvm::
where possible).
Manual fixups in: AArch64InstrInfo.cpp - genFusedMultiply() now takes a
Register* instead of unsigned* AArch64LoadStoreOptimizer.cpp - Ternary
operator was ambiguous between Register/MCRegister. Settled on Register
Depends on D65919
Reviewers: aemerson
Subscribers: jholewinski, MatzeB, qcolombet, dschuff, jyknight,
dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100,
jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton,
fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos,
sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan,
rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji,
Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision for full review was:
https://reviews.llvm.org/D65962
llvm-svn: 368628
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64CondBrTuning.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FastISel.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
Commit 3836874dbbf3840fb5286ae4336b29093eb0115e by daniel_l_sanders
[risc-v] Apply llvm-prefer-register-over-unsigned from clang-tidy to
LLVM
Summary: This clang-tidy check is looking for unsigned integer variables
whose initializer starts with an implicit cast from llvm::Register and
changes the type of the variable to llvm::Register (dropping the llvm::
where possible).
Depends on D65919
Reviewers: lenary
Subscribers: jholewinski, MatzeB, qcolombet, dschuff, jyknight,
dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100,
jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton,
fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos,
sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan,
rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji,
Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision for full review was:
https://reviews.llvm.org/D65962
llvm-svn: 368629
The file was modifiedllvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp