SuccessChanges

Summary

  1. [NFC][CodeGen] Modify the PI++ to ++PI in (details)
  2. [X86][SSE] Lower shuffle as ANY_EXTEND_VECTOR_INREG (details)
Commit 555f7495df1c466dcc3e759fe8b8eccd8ef94770 by shkzhang
[NFC][CodeGen] Modify the PI++ to ++PI in
MachineBlockPlacement::optimizeBranches()
llvm-svn: 368514
The file was modifiedllvm/lib/CodeGen/MachineBlockPlacement.cpp
Commit ec128709f0ad35282d2e009dd333b1d8ca434c80 by llvm-dev
[X86][SSE] Lower shuffle as ANY_EXTEND_VECTOR_INREG
On SSE41+ targets we always lower vector shuffles to
ZERO_EXTEND_VECTOR_INREG, even if we don't need the extended bits.
This patch relaxes this so that we lower to ANY_EXTEND_VECTOR_INREG if
we can, meaning that shuffle combines have a better idea of what
elements need to be kept zero. This helps the multiple reduction code as
we can now combine away a lot more of the pack+extend codes.
Differential Revision: https://reviews.llvm.org/D65741
llvm-svn: 368515
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-mul.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-udiv-128.ll