Started 9 days 19 hr ago
Took 1 hr 17 min on green-dragon-20

Success Build rL:362919 - C:362887 - #57387 (Jun 9, 2019 9:37:52 PM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 362919
  • http://llvm.org/svn/llvm-project/cfe/trunk : 362887
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 362859
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 362745
  • http://llvm.org/svn/llvm-project/zorg/trunk : 362851
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 362866
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 362811
Changes
  1. [X86] Disable f32->f64 extload when sse2 is enabled

    Summary:
    We can only use the memory form of cvtss2sd under optsize due to a partial register update. So previously we were emitting 2 instructions for extload when optimizing for speed. Also due to a late optimization in preprocessiseldag we had to handle (fpextend (loadf32)) under optsize.

    This patch forces extload to expand so that it will always be in the (fpextend (loadf32)) form during isel. And when optimizing for speed we can just let each of those pieces select an instruction independently.

    Reviewers: spatel, RKSimon

    Reviewed By: RKSimon

    Subscribers: hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D62710 (detail/ViewSVN)
    by ctopper

Started by an SCM change

This run spent:

  • 8.8 sec waiting;
  • 1 hr 17 min build duration;
  • 1 hr 17 min total from scheduled to completion.
LLVM/Clang Warnings: 1 warning.
    Test Result (no failures)