Started 16 days ago
Took 1 hr 16 min on green-dragon-19

Success Build rL:362943 - C:362924 - #57400 (Jun 10, 2019 7:54:05 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 362943
  • http://llvm.org/svn/llvm-project/cfe/trunk : 362924
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 362859
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 362745
  • http://llvm.org/svn/llvm-project/zorg/trunk : 362851
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 362866
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 362939
Changes
  1. [InstCombine] change canonicalization to fabs() to use FMF on fsub

    Similar to rL362909:
    This isn't the ideal fix (use FMF on the select), but it's still an
    improvement until we have better FMF propagation to selects and other
    FP math operators.

    I don't think there's much risk of regression from this change by
    not including the FMF on the fcmp any more. The nsz/nnan FMF
    should be the same on the fcmp and the fsub because they have the
    same operand. (detail/ViewSVN)
    by spatel
  2. [ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR.

    Arm v8.1-M supports the VMOV instructions that move a half-precision
    value to and from a GPR, but not if the GPR is SP or PC.

    To fix this, I've changed those instructions to use the rGPR register
    class instead of GPR. rGPR always excludes PC, and it excludes SP
    except in the presence of the HasV8Ops target feature (i.e. Arm v8-A).
    So the effect is that VMOV.F16 to and from PC is now illegal
    everywhere, but VMOV.F16 to and from SP is illegal only on non-v8-A
    cores (which I believe is all as it should be).

    Reviewers: dmgreen, samparker, SjoerdMeijer, ostannard

    Reviewed By: ostannard

    Subscribers: ostannard, javed.absar, kristof.beyls, hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D60704 (detail/ViewSVN)
    by statham
  3. [ExecutionEngine] Add UnaryOperator visitor to the interpreter

    This is to support the unary FNeg instruction.

    Differential Revision: https://reviews.llvm.org/D62881 (detail/ViewSVN)
    by mcinally
  4. [yaml2obj] - Remove TODOs from dynsymtab-implicit-sections-size-content.yaml. NFCI.

    Now when https://bugs.llvm.org/show_bug.cgi?id=42215 is fixed,
    we can remove these TODOs. (detail/ViewSVN)
    by grimar

Started by an SCM change (3 times)

This run spent:

  • 16 min waiting;
  • 1 hr 16 min build duration;
  • 1 hr 32 min total from scheduled to completion.
LLVM/Clang Warnings: 3 warnings.
Test Result (no failures)