Started 4 mo 27 days ago
Took 1 hr 45 min on green-dragon-17

Success Build rL:366585 - C:366546 - #58129 (Jul 19, 2019 7:48:56 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 366585
  • http://llvm.org/svn/llvm-project/cfe/trunk : 366546
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 366525
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/zorg/trunk : 366310
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 366579
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 366577
Changes
  1. AMDGPU/GlobalISel: Selection for fminnum/fmaxnum

    v2f16 case doesn't work yet because the VOP3P complex patterns haven't
    been ported yet. (detail/ViewSVN)
    by arsenm
  2. AMDGPU/GlobalISel: Support arguments with multiple registers

    Handles structs used directly in argument lists. (detail/ViewSVN)
    by arsenm
  3. AMDGPU/GlobalISel: Rewrite lowerFormalArguments

    This should now handle everything except structs passed as multiple
    registers.

    I think most of the packing logic should be handled by
    handleAssignments, but I'm unclear on what the contract is for
    multiple registers. This is copying how x86 handles this.

    This does change the behavior of the test_sgpr_alignment0 amdgpu_vs
    test. I don't think shader arguments should try to follow the
    alignment, and registers need to be repacked. I also don't think it
    matters, since I think the pointers are packed to the beginning of the
    argument list anyway. (detail/ViewSVN)
    by arsenm

Started by an SCM change (4 times)

This run spent:

  • 40 min waiting;
  • 1 hr 45 min build duration;
  • 2 hr 26 min total from scheduled to completion.
LLVM/Clang Warnings: 1 warning.
    Test Result (no failures)