Started 9 days 2 hr ago
Took 4 hr 46 min on green-dragon-16

Success Build #18179 (Jun 9, 2019 8:37:04 PM)

  • : 362916
  • : 362887
  • : 362859
  • : 362745
  • : 362866
  • : 362811
  1. Make test not write to source directory (detail/ViewSVN)
    by nico
  2. [X86] Use EVEX instructions for f128 FAND/FOR/FXOR when avx512vl is enabled. (detail/ViewSVN)
    by ctopper
  3. [X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns.

    Previously we did the equivalent operation in isel patterns with
    COPY_TO_REGCLASS operations to transition. By inserting
    scalar_to_vetors and extract_vector_elts before isel we can
    allow each piece to be selected individually and accomplish the
    same final result.

    I ideally we'd use vector operations earlier in lowering/combine,
    but that looks to be more difficult.

    The scalar-fp-to-i64.ll changes are because we have a pattern for
    using movlpd for store+extract_vector_elt. While an f64 store
    uses movsd. The encoding sizes are the same. (detail/ViewSVN)
    by ctopper

Started by upstream project clang-stage2-Rthinlto_relay build number 1585
originally caused by:

This run spent:

  • 2 ms waiting;
  • 4 hr 46 min build duration;
  • 4 hr 46 min total from scheduled to completion.
Cobol Warnings: 0 warnings.
  • No warnings since build 10,378.
  • New zero warnings highscore: no warnings for 376 days!
Test Result (no failures)