Started 12 days ago
Took 4 hr 45 min on green-dragon-18

Success Build #18193 (Jun 12, 2019 2:37:08 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 363132
  • http://llvm.org/svn/llvm-project/cfe/trunk : 363127
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 363104
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 362745
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 363117
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 363068
Changes
  1. Revert "[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion"

    This reverts commit 1a0f7a2077b70c9864faa476e15b048686cf1ca7.
    See phabricator thread for D60831. (detail/ViewSVN)
    by orlandoch
  2. [AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests

    When these tests were originally written, the middle end would introduce
    an unnecessary copy from r24:r23->GPR16->r24:r23, and these tests
    mistakenly relied on it.

    The most optimal codegen for the functions in the test cases before this patch
    would be NOPs. This is because the first i16 argument always gets the same register
    allocation as an i16 return value in the AVR calling convention.

    These tests broke in r362963 when the codegen was improved and the
    redundant copy was eliminated. After this, the test functions
    were lowered to their optimal form - a 'ret' and nothing else.

    This patch prepends an extra i16 operand to each of the test functions
    so that a 16-bit copy must be inserted for the program to be correct. (detail/ViewSVN)
    by dylanmckay
  3. [AArch64] Merge globals when optimising for size

    Extern global merging is good for code-size. There's definitely potential for
    performance too, but there's one regression in a benchmark that needs
    investigating, so that's why we enable it only when we optimise for size for
    now.

    Patch by Ramakota Reddy and Sjoerd Meijer.

    Differential Revision: https://reviews.llvm.org/D61947 (detail/ViewSVN)
    by sjoerdmeijer
  4. gitignore: Ignore Qt Creator project configuration files. NFC (detail/ViewSVN)
    by nik
  5. [NFC] Test commit (detail/ViewSVN)
    by nik
  6. [X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldablePartialRegisterLoad.

    The non-masked versions are already in there. I'm having some
    trouble coming up with a way to test this right now. Most load
    folding should happen during isel so I'm not sure how to get
    peephole pass to do it. (detail/ViewSVN)
    by ctopper
  7. [RISCV] Fix inline-asm.ll test by adding nounwind attribute

    This test failed since CFI directive support was added in r361320. (detail/ViewSVN)
    by asb
  8. [PowerPC] [Clang] Port SSE2 intrinsics to PowerPC

    Port emmintrin.h which include Intel SSE2 intrinsics implementation to PowerPC platform (using Altivec).

    The new headers containing those implemenations are located into a directory named ppc_wrappers
    which has higher priority when the platform is PowerPC on Linux. They are mainly developed by Steven Munroe,
    with contributions from Paul Clarke, Bill Schmidt, Jinsong Ji and Zixuan Wu.

    It's a follow-up patch of D62121.

    Patched by: Qiu Chaofan <qiucf@cn.ibm.com>

    Differential Revision: https://reviews.llvm.org/D62569 (detail/ViewSVN)
    by wuzish

Started by upstream project clang-stage2-Rthinlto_relay build number 1599
originally caused by:

This run spent:

  • 5 ms waiting;
  • 4 hr 45 min build duration;
  • 4 hr 45 min total from scheduled to completion.
Cobol Warnings: 0 warnings.
  • No warnings since build 10,378.
  • New zero warnings highscore: no warnings for 378 days!
Test Result (no failures)