Started 27 days ago
Took 12 hr on green-dragon-16

Failed Build #18255 (Jun 24, 2019 10:03:31 PM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 364264
  • http://llvm.org/svn/llvm-project/cfe/trunk : 364259
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 364261
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 363952
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 364241
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 364222
Changes
  1. Revert r363802, r363850, and r363856 "[TargetLowering] SimplifyDemandedBits..."

    This reverts the following patches.
    "[TargetLowering] SimplifyDemandedBits SIGN_EXTEND_VECTOR_INREG -> ANY/ZERO_EXTEND_VECTOR_INREG"
    "[TargetLowering] SimplifyDemandedBits ZERO_EXTEND_VECTOR_INREG -> ANY_EXTEND_VECTOR_INREG"
    "[TargetLowering] SimplifyDemandedBits - add ANY_EXTEND_VECTOR_INREG support"

    We can end up with an any_extend_vector_inreg with a 256 bit result type
    and a 128 bit result type. This is allowed by the ISD opcode, but the
    generic operation legalizer is only able to expand cases where the
    total vector width is the same.

    The X86 backend creates these mismatched cases for zext_vec_inreg/sext_vec_inreg.
    The SimplifyDemandedBits changes are allowing those nodes to become
    aext_vec_inreg. For the zext/sext cases, the X86 backend has Custom
    handling and never lets them get to the generic legalizer. We need to do the same
    for aext_vec_inreg. (detail/ViewSVN)
    by ctopper
  2. [llvm-objcopy][NFCI] Fix build failure with GCC

    Here is unreachable since the switch statement above is exhaustive. (detail/ViewSVN)
    by seiya
  3. AMDGPU/GlobalISel: Fix regbankselect for amdgcn.class (detail/ViewSVN)
    by arsenm
  4. [sanitizer] Enabled getpw_getgr.cc on iOS

    Reviewers: kubamracek, delcypher, yln

    Reviewed By: delcypher

    Subscribers: yln, delcypher, llvm-commits, kubamracek, #sanitizers

    Tags: #sanitizers, #llvm

    Differential Revision: https://reviews.llvm.org/D57786 (detail/ViewSVN)
    by Vitaly Buka
  5. [analyzer] ExprEngine: Escape pointers in bitwise operations

    Summary:
    After evaluation it would be an Unknown value and tracking would be lost.

    Reviewers: NoQ, xazax.hun, ravikandhadai, baloghadamsoftware, Szelethus

    Reviewed By: NoQ

    Subscribers: szepet, rnkovacs, a.sidorin, mikhail.ramalho, donat.nagy,
                 dkrupp, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D63720 (detail/ViewSVN)
    by charusso
  6. [InstCombine][NFC] Add test to show missing fold for icmp ult/uge (shl %x, C2), C1.

    Summary:
    'shl' inequality test

    ```
      icmp ult/uge (shl %x, C2), C1 iff C1 is power of two
    ```

    can be simplified as 'and' equality test

    ```
      icmp eq/ne (and %x, (lshr -C1, C2)), 0.
    ```

    Reviewers: lebedev.ri, efriedma

    Reviewed By: lebedev.ri

    Subscribers: llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D63670 (detail/ViewSVN)
    by huihuiz
  7. [InstCombine] Fold  icmp eq/ne (and %x, C), 0 iff (-C) is power of two -> %x u</u>= (-C)  earlier.

    Summary:
    To generate simplified IR, make sure fold
      (X & ~C) ==/!= 0 --> X u</u>= C+1

    is scheduled before fold
      ((X << Y) & C) == 0 -> (X & (C >> Y)) == 0.

    https://rise4fun.com/Alive/7ZN

    Reviewers: lebedev.ri, efriedma, spatel, craig.topper

    Reviewed By: lebedev.ri

    Subscribers: hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D63505 (detail/ViewSVN)
    by huihuiz
  8. [llvm-objcopy][NFC] Refactor output target parsing

    Summary:
    Use an enum instead of string to hold the output file format in Config.InputFormat and Config.OutputFormat. It's essential to support other output file formats other than ELF.

    Reviewers: espindola, alexshap, rupprecht, jhenderson

    Reviewed By: rupprecht, jhenderson

    Subscribers: jyknight, compnerd, emaste, arichardson, fedor.sergeev, jakehehrlich, MaskRay, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D63239 (detail/ViewSVN)
    by seiya
  9. DataExtractor: use decodeSLEB128 to implement getSLEB128

    Should've been NFC, but turns out DataExtractor had better test coverage
    for decoding SLEB128 than the decodeSLEB128 did - revealing a couple of
    bugs (one in the error handling, another in sign extension). So fixed
    those to get the DataExtractor tests passing again. (detail/ViewSVN)
    by dblaikie
  10. [llvm-objcopy][MachO] Fix strict-aliasing warning. NFCI

    Summary:
    Use MachOObjectFile::isRelocationScattered instead of reinterpret_cast.

    Fixes https://bugs.llvm.org/show_bug.cgi?id=42360

    Reviewers: alexshap, rupprecht, jhenderson

    Reviewed By: alexshap

    Subscribers: dendibakh, bjope, uabelho, jakehehrlich, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D63699 (detail/ViewSVN)
    by seiya
  11. AMDGPU: Fix missing declaration for mbcnt builtins (detail/ViewSVN)
    by arsenm
  12. Revert "[NVPTX][NFC] Fix documentation for shfl instructions." The
    original documentation is correct as it matches the C++ builtins. (detail/ViewSVN)
    by timshen
  13. [NFC] Fix tests added in r364225 which failed on Windows due to incorrect path separators. (detail/ViewSVN)
    by dyung
  14. [NVPTX][NFC] Fix documentation for shfl instructions. (detail/ViewSVN)
    by timshen

Started by upstream project clang-stage2-Rthinlto_relay build number 1663
originally caused by:

This run spent:

  • 2 ms waiting;
  • 12 hr build duration;
  • 12 hr total from scheduled to completion.

Identified problems

Regression test failed

This build failed because a regression test in the test suite FAILed. See the test report for details.
Indication 1

Missing test results

The test result file Jenkins is looking for does not exist after the build.
Indication 2

Ninja target failed

Below is a link to the first failed ninja target.
Indication 3