SuccessChanges

Summary

  1. [FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_INSTRUCTION, (details)
  2. [NFC] Fix typo in Clang docs (details)
  3. [libunwind] Treat assembly files as C on mingw (details)
  4. [MachineVerifier] Simplify and delete LLVM_VERIFY_MACHINEINSTRS from a (details)
  5. [MIPS GlobalISel] Select count leading zeros (details)
  6. [MIPS GlobalISel] Select count trailing zeros (details)
  7. [MIPS GlobalISel] Select population count (popcount) (details)
  8. [clan-tidy] Fix false positive in bugprone-infinite-loop (details)
  9. Fix missing dependency in LibcUnitTest (details)
  10. [Alignment][NFC] Use Align with CreateMaskedScatter/Gather (details)
  11. [llvm-readobj] - Add a test for --hash-table option. (details)
  12. [llvm-readobj] - Add a test for --dyn-symbols when there are no dynamic (details)
  13. [lldb][NFC] Improve documentation for CompletionRequest (details)
  14. [lldb][NFC] Give import-std-module tests a more unique file names (details)
  15. [Alignment][NFC] Use Align with CreateAlignedLoad (details)
  16. [llvm-readobj] - Refine --needed-libs implementation and add a test. (details)
  17. Don't separate imp/expl def handling for call site params (details)
  18. [ARM][LowOverheadLoops] Dont ignore VCTP (details)
  19. [ARM][MVE] Tail-predication: support constant trip count (details)
  20. [ASTMatchers] Fix parent traversal with InitListExpr (details)
  21. Improvements to call site register worklist (details)
  22. [clang-format] Handle escaped " in C# string-literals (details)
  23. [DWARF] Simplify DWARFExpression. NFC. (details)
  24. [DWARF] Do not pass Version to DWARFExpression. NFCI. (details)
  25. [LLDB] Fix build failures after removing Version from DWARFExpression. (details)
  26. Re-land [Support] Extend TimeProfiler to support multiple threads (details)
  27. GlobalISel: Translate vector GEPs (details)
  28. [MVE] Fixup order of gather writeback intrinsic outputs (details)
  29. GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results (details)
  30. [WPD] Emit vcall_visibility metadata for MicrosoftCXXABI (details)
  31. [AMDGPU] Fix GCN regpressure trackers for INLINEASM instructions. (details)
  32. [AMDGPU] Handle frame index base operands in memOpsHaveSameBasePtr (details)
  33. [AMDGPU] Handle multiple base operands in shouldClusterMemOps (details)
  34. [AMDGPU] Handle multiple base operands in (details)
  35. AMDGPU: Allow i16 shader arguments (details)
  36. Use pointer type size for offset constant when lowering load/stores (details)
  37. Add a warning, flags and pragmas to limit the number of pre-processor (details)
  38. [X86][AVX] Add test case from PR11210 (details)
  39. AMDGPU/GlobalISel: Initial selection of MUBUF addr64 load/store (details)
  40. [mlir] LLVM import: handle constant data and array/vector aggregates (details)
  41. [mlir] Harden error propagation in LLVM import (details)
  42. clang-format: [JS] options for arrow functions. (details)
  43. AMDPGPU/GlobalISel: Select more MUBUF global addressing modes (details)
  44. [DebugInfo] Make incorrect debug line extended opcode length non-fatal (details)
  45. [test][llvm-dwarfdump] Add extra test case for invalid MD5 form (details)
  46. [LoopUnroll] Remove remapInstruction(). (details)
  47. AMDGPU/GlobalISel: Fix not using global atomics on gfx9+ (details)
  48. Restore "[LTO/WPD] Enable aggressive WPD under LTO option" (details)
  49. [clangd] Only re-open files if their flags changed (details)
  50. Revert "AMDGPU: Temporary drop s_mul_hi_i/u32 patterns" (details)
  51. Revert "[StackColoring] Remap PseudoSourceValue frame indices via (details)
  52. Add pretty printers for llvm::PointerIntPair and llvm::PointerUnion. (details)
  53. AMDGPU/GlobalISel: Custom legalize v2s16 G_SHUFFLE_VECTOR (details)
  54. [X86][AVX] Add a more aggressive SimplifyMultipleUseDemandedBits to (details)
  55. [AMDGPU] Simplify test and extend to gfx9 and gfx10 (details)
  56. AMDGPU: Fix not using f16 fsin/fcos (details)
  57. AMDGPU/GlobalISel: Minor refactor of MUBUF complex patterns (details)
  58. AMDGPU/GlobalISel: Add baseline tests for fma/fmad selection (details)
  59. AMDGPU/GlobalISel: Handle VOP3NoMods (details)
  60. AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.load (details)
  61. [analyzer] Fix handle leak false positive when the handle dies too early (details)
  62. AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.load.format (details)
  63. AMDGPU/GlobalISel: Select llvm.amdgcn.struct.buffer.load (details)
  64. [llvm][TextAPI/MachO] Support writing single macCatalyst platform (details)
  65. [tablegen] Emit string literals instead of char arrays (details)
  66. AMDGPU/GlobalISel: Select llvm.amdgcn.struct.buffer.load.format (details)
  67. [AMDGPU] Attempt to reschedule withou clustering (details)
Commit 17b8f96d65e462c80cb76648edcc69b5acfa10d1 by pengfei.wang
[FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_INSTRUCTION,
and macro FUNCTION likewise. NFCI.
Some functions like fmuladd don't really have a node, we should divide
the declaration form those have node to avoid introducing fake nodes.
Differential Revision: https://reviews.llvm.org/D72871
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAGNodes.h (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (diff)
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp (diff)
The file was modifiedllvm/include/llvm/IR/IRBuilder.h (diff)
The file was modifiedllvm/lib/IR/IntrinsicInst.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h (diff)
The file was modifiedllvm/lib/IR/Verifier.cpp (diff)
The file was modifiedllvm/include/llvm/IR/ConstrainedOps.def (diff)
Commit 59d690850eebcd0e37f205bde16edbd4f2a54053 by qiucofan
[NFC] Fix typo in Clang docs
The file was modifiedclang/docs/LibASTMatchersReference.html (diff)
Commit b780df052dd2b246a760d00e00f7de9ebdab9d09 by martin
[libunwind] Treat assembly files as C on mingw
When targeting mingw, current CMake (3.16) fails to get the right flags
for assembly source files for windows gnu/clang targets
(see https://gitlab.kitware.com/cmake/cmake/merge_requests/4287 for a
fix), causing builds to fail due to `-fPIC` being unsupported in clang
for mingw targets
In the meantime, restore the behaviour from before c48974ffd7d1676
selectively on mingw targets, treating the assembly files as C.
Differential Revision: https://reviews.llvm.org/D73436
The file was modifiedlibunwind/src/CMakeLists.txt (diff)
Commit 941f20c3bd22f2b55815c6d5aa7914d9385fb3b3 by i
[MachineVerifier] Simplify and delete LLVM_VERIFY_MACHINEINSTRS from a
comment. NFC
The environment variable has been unused since r228079.
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp (diff)
Commit 2b66d32f3f4c4ef144e0835029e3ddd071b6ed5a by petar.avramovic
[MIPS GlobalISel] Select count leading zeros
llvm.ctlz.<type> intrinsic has additional i1 argument is_zero_undef, it
tells whether zero as the first argument produces a defined result. MIPS
clz instruction returns 32 for zero input. G_CTLZ is generated from
llvm.ctlz.<type> (<type> <src>, i1 false) intrinsics, clang generates
these intrinsics from __builtin_clz and
__builtin_clzll. G_CTLZ_ZERO_UNDEF can also be generated from llvm.ctlz
with true as second argument. It is also traditionally part of and many
algorithms that are now predicated on avoiding zero-value inputs.
Add narrow scalar for G_CTLZ (algorithm uses G_CTLZ_ZERO_UNDEF). Lower
G_CTLZ_ZERO_UNDEF and select G_CTLZ for MIPS32.
Differential Revision: https://reviews.llvm.org/D73214
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was addedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctlz.ll
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/Mips/GlobalISel/instruction-select/ctlz.mir
The file was addedllvm/test/CodeGen/Mips/GlobalISel/legalizer/ctlz.mir
The file was modifiedllvm/lib/Target/Mips/MipsRegisterBankInfo.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (diff)
The file was addedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/ctlz.mir
Commit 8bc7ba5b9ee04c697dcdbf0345e2fb06291806d2 by petar.avramovic
[MIPS GlobalISel] Select count trailing zeros
llvm.cttz.<type> intrinsic has additional i1 argument is_zero_undef, it
tells whether zero as the first argument produces a defined result.
G_CTTZ is generated from llvm.cttz.<type> (<type> <src>, i1 false)
intrinsics, clang generates these intrinsics from __builtin_ctz and
__builtin_ctzll. G_CTTZ_ZERO_UNDEF comes from llvm.cttz.<type> (<type>
<src>, i1 true). Clang generates such intrinsics as parts of expansion
of builtin_ffs and builtin_ffsll. It is also traditionally part of and
many algorithms that are now predicated on avoiding zero-value inputs.
Add narrow scalar (algorithm uses G_CTTZ_ZERO_UNDEF) for G_CTTZ. Lower
G_CTTZ and G_CTTZ_ZERO_UNDEF for MIPS32.
Differential Revision: https://reviews.llvm.org/D73215
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/Mips/GlobalISel/legalizer/cttz.mir
The file was addedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/cttz.ll
Commit cbf03aee6d8193ffd7a4f329feb4217455079da8 by petar.avramovic
[MIPS GlobalISel] Select population count (popcount)
G_CTPOP is generated from llvm.ctpop.<type> intrinsics, clang generates
these intrinsics from __builtin_popcount and __builtin_popcountll. Add
lower and narrow scalar for G_CTPOP. Lower G_CTPOP for MIPS32.
Differential Revision: https://reviews.llvm.org/D73216
The file was addedllvm/test/CodeGen/Mips/GlobalISel/legalizer/ctpop.mir
The file was addedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp (diff)
Commit 70f4c6e7b14f225f9628fbdab3620ce037613351 by adam.balogh
[clan-tidy] Fix false positive in bugprone-infinite-loop
The checker bugprone-infinite-loop does not track changes of variables
in the initialization expression of a variable declared inside the
condition of the while statement. This leads to false positives,
similarly to the one in the bug report
https://bugs.llvm.org/show_bug.cgi?id=44618. This patch fixes this issue
by enabling tracking of the variables of this expression as well.
Differential Revision: https://reviews.llvm.org/D73270
The file was modifiedclang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp (diff)
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/bugprone-infinite-loop.cpp (diff)
Commit 2c1a142a78ffe8ed06fd7bfd17750afdceeaecc9 by gchatelet
Fix missing dependency in LibcUnitTest
Summary: LibcUnitTest is missing a dependency on LLVMSupport. This
prevents building with shared libraries.
Reviewers: sivachandra
Subscribers: mgorny, MaskRay, libc-commits
Tags: #libc-project
Differential Revision: https://reviews.llvm.org/D73337
The file was modifiedlibc/utils/UnitTest/CMakeLists.txt (diff)
The file was modifiedlibc/cmake/modules/LLVMLibCRules.cmake (diff)
Commit d0a7cc717734ca85e9ad652671d8dfa2456243a7 by gchatelet
[Alignment][NFC] Use Align with CreateMaskedScatter/Gather
Summary: This is patch is part of a series to introduce an Alignment
type. See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this
patch for the introduction of the type: https://reviews.llvm.org/D64790
This patch shows that CreateMaskedScatter/CreateMaskedGather can only
take positive non zero alignment values.
Reviewers: courbet
Subscribers: hiraditya, llvm-commits, delena
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73361
The file was modifiedllvm/include/llvm/IR/IRBuilder.h (diff)
The file was modifiedllvm/lib/IR/IRBuilder.cpp (diff)
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp (diff)
Commit a33427447df06ccde496ac6d84abd6709063c6b4 by grimar
[llvm-readobj] - Add a test for --hash-table option.
We had no test for --hash-table in tools/llvm-readobj.
The one we had was in test/Object and checked that it is possible to
dump the hash table even when an object doesn't have a section header
table.
In this patch I created a test, moved and merged the existent one.
During moving I converted it to be YAML based to stop using the
precompiled binary.
Differential revision: https://reviews.llvm.org/D73105
The file was addedllvm/test/tools/llvm-readobj/ELF/hash-table.test
The file was removedllvm/test/Object/no-section-table.test
The file was removedllvm/test/Object/Inputs/no-section-table.so
Commit 5c6f8f73ff8117b328d9a7f29d249e38441db8f0 by grimar
[llvm-readobj] - Add a test for --dyn-symbols when there are no dynamic
symbols.
It removes the Object/readobj-absent.test test and creates a one more
case in dyn-symbols.test we have.
Differential revision: https://reviews.llvm.org/D73169
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dyn-symbols.test (diff)
The file was removedllvm/test/Object/readobj-absent.test
Commit 785c6b22914fa10455ef1bf349447b874bc1f37a by Raphael Isemann
[lldb][NFC] Improve documentation for CompletionRequest
The file was modifiedlldb/include/lldb/Utility/CompletionRequest.h (diff)
Commit a311bebb53d405597f7c66c86a8df7085ca2695c by Raphael Isemann
[lldb][NFC] Give import-std-module tests a more unique file names
We want that the *.py names for the tests have unique names but the
current ones are sometimes very simple (e.g., "TestUniquePtr.py") and
could collide with unrelated tests. This just gives all these tests a
"FromStdModule" suffix to make these collisions less likely.
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/deque-dbg-info-content/TestDbgInfoContentDequeFromStdModule.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list/Makefile
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-basic/main.cpp
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/shared_ptr/TestSharedPtrFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/deque-basic/TestBasicDeque.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/queue/TestQueue.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector/Makefile
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list-dbg-info-content/TestDbgInfoContentForwardList.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list/TestListFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/unique_ptr/TestUniquePtr.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-basic/Makefile
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list-basic/Makefile
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list-basic/Makefile
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/stack/TestStack.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/queue/TestQueueFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-basic/TestBasicVector.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list/main.cpp
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/shared_ptr-dbg-info-content/TestSharedPtrDbgInfoContent.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVector.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/shared_ptr/TestSharedPtr.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/weak_ptr-dbg-info-content/TestDbgInfoContentWeakPtrFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list-dbg-info-content/TestDbgInfoContentList.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list-basic/main.cpp
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list-dbg-info-content/TestDbgInfoContentForwardListFromStdModule.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list/Makefile
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list-dbg-info-content/TestDbgInfoContentListFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectors.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/weak_ptr-dbg-info-content/TestDbgInfoContentWeakPtr.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/stack/TestStackFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/deque-dbg-info-content/TestDbgInfoContentDeque.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list/main.cpp
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-bool/TestVectorBoolFromStdModule.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/shared_ptr-dbg-info-content/TestSharedPtrDbgInfoContentFromStdModule.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector/main.cpp
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/list-basic/TestBasicList.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list/TestForwardListFromStdModule.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list-basic/main.cpp
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/forward_list-basic/TestBasicForwardList.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/weak_ptr/TestWeakPtrFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector-bool/TestBoolVector.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/vector/TestVectorFromStdModule.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/weak_ptr/TestWeakPtr.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/unique_ptr/TestUniquePtrFromStdModule.py
Commit 07c9d5326648802560adbc1b1b61316c7d3c406d by gchatelet
[Alignment][NFC] Use Align with CreateAlignedLoad
Summary: This is patch is part of a series to introduce an Alignment
type. See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this
patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet, bollu
Subscribers: hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D73449
The file was modifiedclang/lib/CodeGen/CGCXX.cpp (diff)
The file was modifiedpolly/lib/CodeGen/BlockGenerators.cpp (diff)
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h (diff)
The file was modifiedllvm/include/llvm/IR/IRBuilder.h (diff)
The file was modifiedclang/lib/CodeGen/CGBuilder.h (diff)
The file was modifiedllvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp (diff)
Commit e77c149f0e4db4e51184f726bd3c5c83b17aa39a by grimar
[llvm-readobj] - Refine --needed-libs implementation and add a test.
We have no good test for --needed-libs option. The one we have as a part
of Object/readobj-shared-object.test is not complete.
In this patch I've did a minor NFC changes to the implementation and
added a test. This allowed to remove this piece from
Object/readobj-shared-object.test
Differential revision: https://reviews.llvm.org/D73174
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp (diff)
The file was addedllvm/test/tools/llvm-readobj/ELF/needed-libs.test
The file was modifiedllvm/test/Object/readobj-shared-object.test (diff)
Commit b46baa82fc3ec679cd6192b8ee04960c3e541ed1 by david.stenberg
Don't separate imp/expl def handling for call site params
Summary: Since D70431 the describeLoadedValue() hook takes a parameter
register, meaning that it can now be asked to describe any register.
This means that we can drop the difference between explicit and implicit
defines that we previously had in collectCallSiteParameters().
I have not found any case for any upstream targets where a parameter
register is only implicitly defined, and does not overlap with any
explicit defines. I don't know if such a case would even make sense. So
as far as I have tested, this patch should be a non-functional change.
However, this reduces the complexity of the code a bit, and it will
simplify the implementation of an upcoming patch which solves PR44118.
Reviewers: djtodoro, NikolaPrica, aprantl, vsk
Reviewed By: djtodoro, vsk
Subscribers: hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D73167
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (diff)
Commit 6c2df5d14f7adba1ec7decbece29162aa3a30861 by sam.parker
[ARM][LowOverheadLoops] Dont ignore VCTP
When expanding the LoopStart, we try to remove the iteration count
calculation. However, if part of the calculation was also used to
calculate the number of elements we could end up deleting instructions
that were required to feed DLSTP/WLSTP.
Differential Revision: https://reviews.llvm.org/D73275
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff)
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-ignore-vctp.mir
Commit b567ff2fa05c7df1b3bf74e7a79daa7aa5bd5912 by sjoerd.meijer
[ARM][MVE] Tail-predication: support constant trip count
We had support for runtime trip count values, but not constants, and
this adds supports for that.
And added a minor optimisation while I was add it: don't invoke Cleanup
when there's nothing to clean up.
Differential Revision: https://reviews.llvm.org/D73198
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp (diff)
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-const.ll
Commit 0a57d14abf993331111fbfab15fb918a863aa391 by steveire
[ASTMatchers] Fix parent traversal with InitListExpr
Children of InitListExpr are traversed twice by RAV, so this code
populates a vector to represent the possibly-multiple parents (in
reality in this situation the parent is the same and is therefore
de-duplicated).
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp (diff)
The file was modifiedclang/lib/AST/ParentMapContext.cpp (diff)
Commit 13d4ef9ac0fa02d2a8d5d01bf614b5fad852bb58 by david.stenberg
Improvements to call site register worklist
Summary: This fixes PR44118. For cases where we have a chain like this:
  R8 = R1 (entry value)
R0 = R8
call @foo R0
the code that emits call site entries using entry values would not
follow that chain, instead emitting a call site entry with R8 as
location rather than R0. Such a case was discovered when originally
adding dbgcall-site-orr-moves.mir. This patch fixes that issue. This is
done by changing the ForwardedRegWorklist set to a map in which the
worklist registers always map to the parameter registers that they
describe.
Another thing this patch fixes is that worklist registers now can
describe more than one parameter register at a time. Such a case
occurred in dbgcall-site-interpretation.mir, resulting in a call site
entry not being emitted for one of the parameters.
Reviewers: djtodoro, NikolaPrica, aprantl, vsk
Reviewed By: vsk
Subscribers: hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D73168
The file was modifiedllvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir (diff)
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (diff)
The file was modifiedllvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir (diff)
The file was modifiedllvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir (diff)
The file was addedllvm/test/DebugInfo/MIR/X86/dbgcall-site-partial-describe.mir
The file was addedllvm/test/DebugInfo/MIR/X86/dbgcall-site-reg-shuffle.mir
Commit 36a8f7f6d8f5a9620b1a091e54abacb517ecfbba by krasimir
[clang-format] Handle escaped " in C# string-literals
Reviewers: krasimir
Reviewed By: krasimir
Subscribers: klimek, MyDeveloperDay
Tags: #clang-format
Differential Revision: https://reviews.llvm.org/D73353
The file was modifiedclang/unittests/Format/FormatTestCSharp.cpp (diff)
The file was modifiedclang/lib/Format/FormatTokenLexer.cpp (diff)
Commit 548553eac7b5c9fafd63c56b0304f35c911dd9fc by ikudrin
[DWARF] Simplify DWARFExpression. NFC.
As DataExtractor already has a method to extract an unsigned value of a
specified size, there is no need to duplicate that.
Differential Revision: https://reviews.llvm.org/D73263
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFExpression.cpp (diff)
Commit 8f3d47c54ac21f99b25d8ad00598b7f5be00d6d8 by ikudrin
[DWARF] Do not pass Version to DWARFExpression. NFCI.
The Version was used only to determine the size of an operand of
DW_OP_call_ref. The size was 4 for all versions apart from 2, but the
DW_OP_call_ref operation was introduced only in DWARF3. Thus, the code
may be simplified and using of Version may be eliminated.
Differential Revision: https://reviews.llvm.org/D73264
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFExpression.h (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp (diff)
The file was modifiedllvm/lib/DWARFLinker/DWARFLinker.cpp (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp (diff)
The file was modifiedllvm/tools/llvm-dwarfdump/Statistics.cpp (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp (diff)
The file was addedllvm/test/DebugInfo/X86/DW_OP_call_ref_ver2.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFExpression.cpp (diff)
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (diff)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp (diff)
Commit 9a952fd462774e79d8dc514d71bf43ea0ca7f429 by ikudrin
[LLDB] Fix build failures after removing Version from DWARFExpression.
The file was modifiedlldb/source/Expression/DWARFExpression.cpp (diff)
Commit 77e6bb3cbad26f0a95be5c427fa7f87833d5843e by russell.gallop
Re-land [Support] Extend TimeProfiler to support multiple threads
This makes TimeTraceProfilerInstance thread local. Added
timeTraceProfilerFinishThread() which moves the thread local instance to
a global vector of instances. timeTraceProfilerWrite() then writes
recorded data from all instances.
Threads are identified based on their thread ids. Totals are reported
with artificial thread ids higher than the real ones.
This fixes the previous version to work with __thread as well as
thread_local.
Differential Revision: https://reviews.llvm.org/D71059
The file was modifiedllvm/lib/Support/TimeProfiler.cpp (diff)
The file was modifiedllvm/include/llvm/Support/TimeProfiler.h (diff)
Commit 06d9230fef996ca7d4d11d6b3f5f95e895a52198 by Matthew.Arsenault
GlobalISel: Translate vector GEPs
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp (diff)
Commit 8a6b948eb59267736a34a5deace9c7d947c63492 by david.green
[MVE] Fixup order of gather writeback intrinsic outputs
The MVE_VLDRWU32_qi_pre gather loads, like the other _pre/_post mve
loads returns the writeback as result 0, the value as result 1. The llvm
ir intrinsic seems to have this the other way around though, and so when
lowering from one to the other we need to switch the first two outputs.
I've also fixed up the types of _pre/_post on normal MVE loads. There we
were already getting the values the right way around, just not for the
types. I don't believe this was causing anything to go wrong, but it was
very confusing to read in the debug output.
Differential Revision: https://reviews.llvm.org/D73370
The file was modifiedllvm/test/CodeGen/Thumb2/mve-intrinsics/scatter-gather.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-intrinsics/vldr.ll (diff)
The file was modifiedllvm/lib/Target/ARM/ARMISelDAGToDAG.cpp (diff)
Commit 2a160ba5b0ad065ee7020c787e7f896416be3faa by Matthew.Arsenault
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results
Only use shifts if the requested type exactly matches the source type,
and create sub-unmerges otherwise.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
Commit af954e441a5170a75687699d91d85e0692929d43 by tejohnson
[WPD] Emit vcall_visibility metadata for MicrosoftCXXABI
Summary: The MicrosoftCXXABI uses a separate mechanism for emitting
vtable type metadata, and thus didn't pick up the change from D71907 to
emit the vcall_visibility metadata under -fwhole-program-vtables.
I believe this is the cause of a Windows bot failure when I committed
follow on change D71913 that required a revert. The failure occurred in
a CFI test that was expecting to not abort because it expected a
devirtualization to occur, and without the necessary vcall_visibility
metadata we would not get devirtualization.
Note in the equivalent code in CodeGenModule::EmitVTableTypeMetadata
(used by the ItaniumCXXABI), we also emit the vcall_visibility metadata
when Virtual Function Elimination is enabled. Since I am not as familiar
with the details of that optimization, I have marked that as a TODO and
am only inserting under -fwhole-program-vtables.
Reviewers: evgeny777
Subscribers: Prazek, ostannard, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73418
The file was modifiedclang/lib/CodeGen/MicrosoftCXXABI.cpp (diff)
The file was modifiedclang/test/CodeGenCXX/vcall-visibility-metadata.cpp (diff)
Commit 4332f1a4c826d9351f005a4b78e0b1823a5943e0 by vpykhtin
[AMDGPU] Fix GCN regpressure trackers for INLINEASM instructions.
Differential revision: https://reviews.llvm.org/D73338
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.cpp (diff)
Commit fcf5254fa792353852a6a7604206dd4e93ad0f99 by jay.foad
[AMDGPU] Handle frame index base operands in memOpsHaveSameBasePtr
Summary: This is in preparation for getMemOperandsWithOffset returning
more base operands.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, hiraditya, arphaman, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73454
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
Commit 6461eadf8fff54df69d5aa110f094b124efb6d96 by jay.foad
[AMDGPU] Handle multiple base operands in shouldClusterMemOps
Summary: This is in preparation for getMemOperandsWithOffset returning
more base operands.
Depends on D73454.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73455
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
Commit 1bf00219fc803d385e91e0a016f5235f1d6d89b7 by jay.foad
[AMDGPU] Handle multiple base operands in
areMemAccessesTriviallyDisjoint
Summary: This is in preparation for getMemOperandsWithOffset returning
more base operands.
Depends on D73455.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73456
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
Commit 2214bc81d0be66b212e20fd0c44367521e361ef7 by Matthew.Arsenault
AMDGPU: Allow i16 shader arguments
Not allowing this just creates unnecessary complications when writing
simple tests.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallingConv.td (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/calling-conventions.ll (diff)
Commit 9965b12fd1bcb78396fbea2c28d80068e43b31a3 by Matthew.Arsenault
Use pointer type size for offset constant when lowering load/stores
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
Commit 739b410f1ff51d507830774320c2db3a80d8610d by hans
Add a warning, flags and pragmas to limit the number of pre-processor
tokens in a translation unit
See
https://docs.google.com/document/d/1xMkTZMKx9llnMPgso0jrx3ankI4cv60xeZ0y4ksf4wc/preview
for background discussion.
This adds a warning, flags and pragmas to limit the number of
pre-processor tokens either at a certain point in a translation unit, or
overall.
The idea is that this would allow projects to limit the size of certain
widely included headers, or for translation units overall, as a way to
insert backstops for header bloat and prevent compile-time regressions.
Differential revision: https://reviews.llvm.org/D72703
The file was modifiedclang/lib/Parse/Parser.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td (diff)
The file was addedclang/test/Parser/max-tokens.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td (diff)
The file was modifiedclang/include/clang/Driver/Options.td (diff)
The file was modifiedclang/include/clang/Basic/LangOptions.def (diff)
The file was modifiedclang/test/Driver/autocomplete.c (diff)
The file was modifiedclang/include/clang/Lex/Preprocessor.h (diff)
The file was modifiedclang/lib/Lex/Preprocessor.cpp (diff)
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp (diff)
The file was modifiedclang/lib/Parse/ParsePragma.cpp (diff)
The file was modifiedclang/include/clang/Parse/Parser.h (diff)
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp (diff)
Commit d89180972be17ca4d27c649d125bdd90196a3a3a by llvm-dev
[X86][AVX] Add test case from PR11210
Shows failure to remove sign bit comparison when the result has multiple
uses
The file was modifiedllvm/test/CodeGen/X86/masked_store.ll (diff)
Commit fdaad485e620de39ea578e02535c6e75e44581ff by Matthew.Arsenault
AMDGPU/GlobalISel: Initial selection of MUBUF addr64 load/store
Fixes the main reason for compile failures on SI, but doesn't really try
to use the addressing modes yet.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.append.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.consume.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-inttoptr.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll (diff)
Commit 07328944efb6454b74563b61a97d61545888757b by zinenko
[mlir] LLVM import: handle constant data and array/vector aggregates
Summary: Implement the handling of llvm::ConstantDataSequential and
llvm::ConstantAggregate for (nested) array and vector types when
imporitng LLVM IR to MLIR. In all cases, the result is a
DenseElementsAttr that can be used in either a `llvm.mlir.global` or a
`llvm.mlir.constant`. Nested aggregates are unpacked recursively until
an element or a constant data is found. Nested arrays with innermost
scalar type are represented as DenseElementsAttr of tensor type. Nested
arrays with innermost vector type are represented as DenseElementsAttr
with (multidimensional) vector type.
Constant aggregates of struct type are not yet supported as the LLVM
dialect does not have a well-defined way of modeling struct-type
constants.
Differential Revision: https://reviews.llvm.org/D72834
The file was modifiedmlir/test/Target/import.ll (diff)
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp (diff)
Commit 84c3f05c8e3e28fd58c458f842e721bbbaa837b2 by zinenko
[mlir] Harden error propagation in LLVM import
Summary: LLVM importer to MLIR was implemented mostly as a prototype. As
such, it did not deal handle errors in a consistent way, reporting them
out stderr in some cases and continuing the execution in the error state
until eventually crashing. This is not desirable for a user-facing tool.
Make sure errors are returned from functions, consistently checked at
call sites and propagated further. Functions returning nullable IR
values return nullptr to denote the error state. Other functions return
LogicalResult. LLVM importer in mlir-translate should no longer crash on
unsupported inputs.
The errors are reported without association with the source file (and
therefore cannot be checked using -verify-diagnostics). Attaching them
to the actual input file is left for future work.
Differential Revision: https://reviews.llvm.org/D72839
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp (diff)
Commit 02656f29abda4eedd22e3b2b30bf2f422983514e by martin
clang-format: [JS] options for arrow functions.
Summary: clang-format currently always wraps the body of non-empty arrow
functions:
    const x = () => {
     z();
   };
This change implements support for the `AllowShortLambdasOnASingleLine`
style options, controlling the indent style for arrow function bodies
that have one or fewer statements. SLS_All puts all on a single line,
SLS_Inline only arrow functions used in an inline position.
    const x = () => { z(); };
Multi-statement arrow functions continue to be wrapped. Function
expressions (`a = function() {}`) and function/method declarations are
unaffected as well.
Reviewers: krasimir
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73335
The file was modifiedclang/unittests/Format/FormatTestJS.cpp (diff)
The file was modifiedclang/lib/Format/TokenAnnotator.cpp (diff)
The file was modifiedclang/lib/Format/Format.cpp (diff)
Commit ac0b9b4ccf3e356061f66f54b99588bc71071e73 by Matthew.Arsenault
AMDPGPU/GlobalISel: Select more MUBUF global addressing modes
The handling of the high bits of the resource descriptor seem weird to
me, where the 3rd dword changes based on the instruction.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll (diff)
Commit f1be770ff6886a145db08b63397e8ddb6ac59bd0 by james.henderson
[DebugInfo] Make incorrect debug line extended opcode length non-fatal
It is possible to try to keep parsing a debug line program even when the
length of an extended opcode does not match what is expected for that
opcode. This patch changes what was previously a fatal error to be
non-fatal. The parser now continues by assuming the the claimed length
is correct, even if it means moving the offset backwards.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72155
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp (diff)
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test (diff)
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp (diff)
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/Inputs/debug_line_malformed.s (diff)
Commit c963b5fbd61ad1407dda1b1e5bb87dc0fc207266 by james.henderson
[test][llvm-dwarfdump] Add extra test case for invalid MD5 form
A subsequent patch will change how an invalid file name table is handled
to allow parsing to continue. This patch adds a test case that will
demonstrate a difference in behaviour with that change between invalid
file tables where the error is before the end of the stated prologue
length and where the error occurs after the stated length.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72157
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test (diff)
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/Inputs/debug_line_malformed.s (diff)
Commit 2b335e9aae857b63300c70435cde585c73760690 by whitneyt
[LoopUnroll] Remove remapInstruction().
Summary: LoopUnroll can reuse the RemapInstruction() in ValueMapper, or
remapInstructionsInBlocks() in CloneFunction, depending on the needs.
There is no need to have its own version in LoopUnroll.
By calling RemapInstruction() without TypeMapper or Materializer and
with Flags (RF_NoModuleLevelChanges | RF_IgnoreMissingLocals), it does
the same as remapInstruction(). remapInstructionsInBlocks() calls
RemapInstruction() exactly as described.
Looking at the history, I cannot find any obvious reason to have its own
version. Reviewer: dmgreen, jdoerfert, Meinersbur, kbarton, bmahjour,
etiotto, foad, aprantl Reviewed By: jdoerfert Subscribers: hiraditya,
zzheng, llvm-commits, prithayan, anhtuyen Tag: LLVM Differential
Revision: https://reviews.llvm.org/D73277
The file was modifiedllvm/include/llvm/Transforms/Utils/UnrollLoop.h (diff)
The file was modifiedllvm/lib/Transforms/Utils/LoopUnroll.cpp (diff)
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp (diff)
Commit bc3d900fa5fc537163b8556a6b59925231bc4d09 by Matthew.Arsenault
AMDGPU/GlobalISel: Fix not using global atomics on gfx9+
For some reason the flat/global atomics end up in the generated matcher
table in a different order from SelectionDAG. Use AddedComplexity to
prefer checking for global atomics first.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/FLATInstructions.td (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-global.mir (diff)
Commit 2f63d549f1e1edd165392837aaa53f569f7fb88d by tejohnson
Restore "[LTO/WPD] Enable aggressive WPD under LTO option"
This restores 59733525d37cf9ad88b5021b33ecdbaf2e18911c (D71913), along
with bot fix 19c76989bb505c3117730c47df85fd3800ea2767.
The bot failure should be fixed by D73418, committed as
af954e441a5170a75687699d91d85e0692929d43.
I also added a fix for non-x86 bot failures by requiring x86 in new test
lld/test/ELF/lto/devirt_vcall_vis_public.ll.
The file was modifiedclang/lib/CodeGen/CodeGenModule.h (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/devirt-single-impl.ll (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt.ll (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt_external_comdat_same_guid.ll (diff)
The file was modifiedllvm/include/llvm/LTO/Config.h (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vcp-type-mismatch.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll (diff)
The file was modifiedllvm/lib/LTO/ThinLTOCodeGenerator.cpp (diff)
The file was modifiedllvm/include/llvm/Transforms/IPO.h (diff)
The file was modifiedclang/lib/CodeGen/CGClass.cpp (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt-after-icp.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vcp-too-wide-ints.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt_promote_legacy.ll (diff)
The file was modifiedllvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/constant-arg.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/non-constant-vtable.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/struct-vtable.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/soa-vtable.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll (diff)
The file was modifiedclang/test/CodeGen/thinlto-distributed-cfi-devirt.ll (diff)
The file was addedclang/test/CodeGenCXX/thinlto-distributed-type-metadata.cpp
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vtable-decl.ll (diff)
The file was modifiedlld/ELF/Options.td (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt2.ll (diff)
The file was addedlld/test/ELF/lto/devirt_vcall_vis_public.ll
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/export-vcp.ll (diff)
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/expand-check.ll (diff)
The file was modifiedclang/test/CodeGenCXX/lto-visibility-inference.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vcp-non-constant-arg.ll (diff)
The file was modifiedllvm/lib/LTO/LTOCodeGenerator.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/branch-funnel-threshold.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll (diff)
The file was modifiedllvm/tools/opt/opt.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/export-unsuccessful-checked.ll (diff)
The file was modifiedllvm/test/ThinLTO/X86/cfi-devirt.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/devirt-single-impl-check.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/export-nothing.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/uniform-retval.ll (diff)
The file was modifiedllvm/test/ThinLTO/X86/cache-typeid-resolutions.ll (diff)
The file was modifiedclang/lib/CodeGen/ItaniumCXXABI.cpp (diff)
The file was modifiedlld/ELF/Config.h (diff)
The file was modifiedllvm/lib/LTO/LTO.cpp (diff)
The file was modifiedllvm/include/llvm/Transforms/IPO/LowerTypeTests.h (diff)
The file was addedllvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
The file was modifiedllvm/test/ThinLTO/X86/devirt_available_externally.ll (diff)
The file was modifiedllvm/lib/Transforms/IPO/LowerTypeTests.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vcp-no-this.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vcp-uses-this.ll (diff)
The file was modifiedllvm/tools/gold/gold-plugin.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/unique-retval.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/uniform-retval-invoke.ll (diff)
The file was addedllvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/devirt-single-impl2.ll (diff)
The file was modifiedlld/ELF/LTO.cpp (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt_single_hybrid.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/pointer-vtable.ll (diff)
The file was modifiedlld/ELF/Driver.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vcp-accesses-memory.ll (diff)
The file was modifiedclang/test/CodeGenCXX/type-metadata.cpp (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/bad-read-from-vtable.ll (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt_promote.ll (diff)
The file was modifiedllvm/test/Transforms/WholeProgramDevirt/vcp-decl.ll (diff)
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp (diff)
The file was modifiedclang/lib/CodeGen/CGVTables.cpp (diff)
The file was modifiedllvm/test/ThinLTO/X86/devirt_alias.ll (diff)
The file was modifiedclang/test/CodeGenCXX/cfi-mfcall.cpp (diff)
The file was addedllvm/test/ThinLTO/X86/devirt_vcall_vis_hidden.ll
Commit 60249c2c3b9e268af6ade0a4be3c883d7d567940 by davg
[clangd] Only re-open files if their flags changed
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72647
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp (diff)
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.h (diff)
The file was modifiedclang-tools-extra/clangd/test/did-change-configuration-params.test (diff)
Commit 4e69df091d4fd63083783e2ed1e1adae81f3d572 by Matthew.Arsenault
Revert "AMDGPU: Temporary drop s_mul_hi_i/u32 patterns"
This reverts commit fe23ed2c681413e7baf517c79aee9be130579873.
It was never really clear this was responsible for the performance
regressions that caused this to be reverted. It's been a long time, and
we need to have scalar patterns for this to get GlobalISel working.
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/mul.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td (diff)
Commit 68051c122440b556e88a946bce12bae58fcfccb4 by thakis
Revert "[StackColoring] Remap PseudoSourceValue frame indices via
MachineFunction::getPSVManager()"
This reverts commit 7a8b0b1595e7dc878b48cf9bbaa652087a6895db. It seems
to break exception handling on 32-bit Windows, see
https://crbug.com/1045650
The file was modifiedllvm/lib/CodeGen/StackColoring.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/PseudoSourceValue.h (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir (diff)
Commit 97431831e5690275a453567430d1153c47ba1585 by csigg
Add pretty printers for llvm::PointerIntPair and llvm::PointerUnion.
Reviewers: aprantl, dblaikie, jdoerfert, nicolasvasilache
Reviewed By: dblaikie
Subscribers: jpienaar, dexonsmith, merge_guards_bot, llvm-commits
Tags: #llvm, #clang, #lldb, #openmp
Differential Revision: https://reviews.llvm.org/D72557
The file was modifieddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.gdb (diff)
The file was modifieddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.cpp (diff)
The file was modifiedllvm/include/llvm/ADT/PointerIntPair.h (diff)
The file was modifiedllvm/utils/gdb-scripts/prettyprinters.py (diff)
Commit a1d33ce73a5e39db71e630f641423db277d1e29f by Matthew.Arsenault
AMDGPU/GlobalISel: Custom legalize v2s16 G_SHUFFLE_VECTOR
Try to keep simple v2s16 cases as-is. This will more naturally map to
how the VOP3P op_sel modifiers work compared to the expansion involving
bitcasts and bitshifts.
This could maybe try harder with wider source vector types, although
that could be handled with a pre-legalize combine.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
Commit 2d5e281b0fa0b5babcd48e47d64e94224aea4a1f by llvm-dev
[X86][AVX] Add a more aggressive SimplifyMultipleUseDemandedBits to
simplify masked store masks.
Fixes a poor codegen issue noticed in PR11210.
The file was modifiedllvm/test/CodeGen/X86/masked_store.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit e37997cc0de0f9dc8b9b9d6efa706c7283fb04b7 by jay.foad
[AMDGPU] Simplify test and extend to gfx9 and gfx10
Summary: This is in preparation for adding more test cases for D69661
and other bug fixes in the same area.
Reviewers: tpr, dstuttard, critson, nhaehnle, arsenm
Subscribers: kzhuravl, jvesely, wdng, yaxunl, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70708
The file was modifiedllvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir (diff)
Commit bef27175c716252e4d0caec27b61c572dc92cc90 by Matthew.Arsenault
AMDGPU: Fix not using f16 fsin/fcos
I noticed this because this accidentally started working for GlobalISel.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll (diff)
Commit 0968234590d1bd2d1dd727f0254e16d8f39e1844 by Matthew.Arsenault
AMDGPU/GlobalISel: Minor refactor of MUBUF complex patterns
This will make it easier to support the small variants in the complex
patterns for atomics.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
Commit d309b4ebe471ecd30c71be5c7839b501d8c7e9b0 by Matthew.Arsenault
AMDGPU/GlobalISel: Add baseline tests for fma/fmad selection
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
Commit e60d6582604bd4367377074fef0ac459c0e3df26 by Matthew.Arsenault
AMDGPU/GlobalISel: Handle VOP3NoMods
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir (diff)
Commit fc90222a91418189a8342a4043b4ad006331c310 by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.load
Use intermediate instructions, unlike with buffer stores. This is
necessary because of the need to have an internal way to distinguish
between signed and unsigned extloads. This introduces some duplication
and near duplication with the buffer store selection path. The store
handling should maybe be moved into legalization to match and eliminate
the duplication.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
Commit c98d98ba9b0f917385c753becec4ddfef51bc47c by xazax
[analyzer] Fix handle leak false positive when the handle dies too early
Differential Revision: https://reviews.llvm.org/D73151
The file was modifiedclang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp (diff)
The file was modifiedclang/test/Analysis/fuchsia_handle.cpp (diff)
Commit 198624c39d1817c0ecc031c3c3ae895818e1ece9 by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.load.format
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
Commit ce7ca2caf2c2c71f6c003668c99729ee2f9c29e3 by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.struct.buffer.load
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)
Commit 3ed88b052b198285d4464166b728ec2e236f814e by Jonas Devlieghere
[llvm][TextAPI/MachO] Support writing single macCatalyst platform
TAPI currently lacks a way to emit the macCatalyst platform. For TBD_V3
is does support zippered frameworks given that both macOS and
macCatalyst are part of the PlatformSet.
Differential revision: https://reviews.llvm.org/D73325
The file was modifiedllvm/unittests/TextAPI/TextStubV3Tests.cpp (diff)
The file was modifiedllvm/lib/TextAPI/MachO/TextStubCommon.cpp (diff)
Commit 482e890d1f94d137d9893d1c41a79eec8e86c66b by luke.drummond
[tablegen] Emit string literals instead of char arrays
This changes the generated (Instr|Asm|Reg|Regclass)Name tables from this
form:
   extern const char HexagonInstrNameData[] = {
     /* 0 */ 'G', '_', 'F', 'L', 'O', 'G', '1', '0', 0,
     /* 9 */ 'E', 'N', 'D', 'L', 'O', 'O', 'P', '0', 0,
     /* 18 */ 'V', '6', '_', 'v', 'd', 'd', '0', 0,
     /* 26 */ 'P', 'S', '_', 'v', 'd', 'd', '0', 0,
     [...]
   };
...to this:
    extern const char HexagonInstrNameData[] = {
     /* 0 */ "G_FLOG10\0"
     /* 9 */ "ENDLOOP0\0"
     /* 18 */ "V6_vdd0\0"
     /* 26 */ "PS_vdd0\0"
     [...]
   };
This should make debugging and exploration a lot easier for mortals,
while providing a significant compile-time reduction for common
compilers.
To avoid issues with low implementation limits, this is disabled by
default for visual studio.
To force output one way or the other, pass
`--long-string-literals=<bool>` to `tablegen`
Reviewers: mstorsjo, rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D73044
A variation of this patch was originally committed in ce23515f5ab011 and
then reverted in e464b31c due to build failures.
The file was modifiedllvm/utils/TableGen/TableGen.cpp (diff)
The file was modifiedllvm/utils/TableGen/AsmWriterEmitter.cpp (diff)
The file was modifiedllvm/utils/TableGen/RegisterInfoEmitter.cpp (diff)
The file was modifiedllvm/cmake/modules/TableGen.cmake (diff)
The file was modifiedllvm/utils/TableGen/InstrInfoEmitter.cpp (diff)
The file was modifiedllvm/utils/TableGen/SequenceToOffsetTable.h (diff)
Commit 97711228fdaeaac5173d2f7b7c347c7aab4993e2 by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.struct.buffer.load.format
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
Commit 53eb0f8c07130d19cc79a439fbd797ffd45a49da by Stanislav.Mekhanoshin
[AMDGPU] Attempt to reschedule withou clustering
We want to have more load/store clustering but we also want to maintain
low register pressure which are oposit targets. Allow scheduler to
reschedule regions without mutations applied if we hit a register limit.
Differential Revision: https://reviews.llvm.org/D73386
The file was modifiedllvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
The file was modifiedllvm/lib/Target/AMDGPU/GCNSchedStrategy.h (diff)