Started 9 days 17 hr ago
Took 7 hr 26 min

Failed Build #2158 (Feb 9, 2020 3:39:51 PM)

  1. [X86] Rename matchShuffleAsRotate - matchShuffleAsByteRotate. NFCI. (details / githubweb)
  2. [X86][SSE] Add more tests showing failure to lower shuffles as bit (details / githubweb)
  3. [X86][XOP] Add XOP target to vXi16/vXi8 shuffle tests (details / githubweb)
  4. libclc: Move rsqrt implementation to a .cl file (details / githubweb)
  5. libclc/r600: Use target specific builtins to implement rsqrt and (details / githubweb)
  6. [X86] Remove isel patterns that include a vselect/X86selects and a (details / githubweb)
  7. [X86] Use MVT::i32 for the type of a MOV32r0 created in (details / githubweb)
  8. [X86] Add lowerShuffleAsBitRotate (PR44379) (details / githubweb)
  9. [X86] Add flag result VT to a MOV32r0 created in X86DAGToDAGISel::Select (details / githubweb)
  10. [X86] Use custom isel for (X86sbb_flag 0, 0) so we can use 32-bit SBB (details / githubweb)
  11. [X86] combineConcatVectorOps - combine VROTLI/VROTRI ops (details / githubweb)
  12. AMDGPU: Fix SI_IF lowering when the save exec reg has terminator uses (details / githubweb)
  13. AMDGPU: Remove dead kill handling (details / githubweb)
  14. AMDGPU/GlobalISel: Look through casts when legalizing vector indexing (details / githubweb)
  15. AMDGPU/GlobalISel: Don't mis-select vector index on a constant (details / githubweb)
  16. GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ (details / githubweb)

Started by upstream project clang-stage2-Rthinlto_relay build number 3972
originally caused by:

This run spent:

  • 8 min 36 sec waiting;
  • 7 hr 26 min build duration;
  • 7 hr 26 min total from scheduled to completion.
Revision: 6135f5eda48eb12a98f835d976e4916cfd44764c
  • refs/remotes/origin/master
Revision: 4f8623807f953758be938e0f176b4198839205fb
  • refs/remotes/origin/master

Identified problems

No identified problem

No problems were identified. If you know why this problem occurred, please add a suitable Cause for it.