FailedChanges

Summary

  1. Revert r361953 "[SVE][IR] Scalable Vector IR Type" This reverts commit f4fc01f8dd3a5dfd2060d1ad0df6b90e8351ddf7. It caused a 3-4x slowdown when doing thinlto links, PR42210.
  2. [TargetLowering] Simplify (ctpop x) == 1 Reviewers: craig.topper, spatel, RKSimon, bkramer Reviewed By: spatel Subscribers: javed.absar, lebedev.ri, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63004
  3. [InstCombine] foldICmpWithLowBitMaskedVal(): 'icmp sgt/sle': avoid miscompiles A precondition 'x != 0' was forgotten by me: https://rise4fun.com/Alive/JFNP https://rise4fun.com/Alive/jHvL These 4 folds with non-constants could be re-enabled, but for now let's go for the simplest solution. https://bugs.llvm.org/show_bug.cgi?id=42198
  4. [NFC][InstCombine] Revisit canonicalize-constant-low-bit-mask-and-icmp-s* tests in preparatio for PR42198. The `icmp sgt`/`icmp sle` variants are, too, miscompiles: https://rise4fun.com/Alive/JFNP https://rise4fun.com/Alive/jHvL A precondition 'x != 0' was forgotten by me. While ensuring test coverage for `-1`, also add test coverage for `0` mask. Mask `0` is allowed for all the folds, mask `-1` is allowed for all the folds with unsigned `icmp` pred. Constant mask `0` is missed though. https://bugs.llvm.org/show_bug.cgi?id=42198
  5. [InstCombine] change canonicalization to fabs() to use FMF on fneg This isn't the ideal fix (use FMF on the select), but it's still an improvement until we have better FMF propagation to selects and other FP math operators. I don't think there's much risk of regression from this change by not including the FMF on the fcmp any more. The nsz/nnan FMF should be the same on the fcmp and the fneg (fsub) because they have the same operand. This works around the most glaring FMF logical inconsistency cited in PR38086: https://bugs.llvm.org/show_bug.cgi?id=38086
  6. [NFC] Adjust test for D63004
  7. [NFC] Added test from PR19758
  8. [NFC] Added test from PR42084 for D63058
  9. [InstCombine] Add tests for usub.sat(x,y)+y etc; NFC For PR42178.
  10. [InstSimplify] reduce code duplication for fcmp folds; NFC
  11. [InstSimplify] enhance fcmp fold with never-nan operand This is another step towards correcting our usage of fast-math-flags when applied on an fcmp. In this case, we are checking for 'nnan' on the fcmp itself rather than the operand of the fcmp. But I'm leaving that clause in until we're more confident that we can stop relying on fcmp's FMF. By using the more general "isKnownNeverNaN()", we gain a simplification shown on the tests with 'uitofp' regardless of the FMF on the fcmp (uitofp never produces a NaN). On the tests with 'fabs', we are now relying on the FMF for the call fabs instruction in addition to the FMF on the fcmp. This is a continuation of D62979 / rL362879.
  12. [InstSimplify] add tests for fcmp with known-never-nan operands; NFC Opposite predicate for rL362742 / rL362879 / D62979
  13. [MIR] Add simple PRE pass to MachineCSE This is the second part of the commit fixing PR38917 (hoisting partitially redundant machine instruction). Most of PRE (partitial redundancy elimination) and CSE work is done on LLVM IR, but some of redundancy arises during DAG legalization. Machine CSE is not enough to deal with it. This simple PRE implementation works a little bit intricately: it passes before CSE, looking for partitial redundancy and transforming it to fully redundancy, anticipating that the next CSE step will eliminate this created redundancy. If CSE doesn't eliminate this, than created instruction will remain dead and eliminated later by Remove Dead Machine Instructions pass. The third part of the commit is supposed to refactor MachineCSE, to make it more clear and to merge MachinePRE with MachineCSE, so one need no rely on further Remove Dead pass to clear instrs not eliminated by CSE. First step: https://reviews.llvm.org/D54839 Fixes llvm.org/PR38917 This is fixed recommit of r361356 after PowerPC64 multistage build failure.
Revision 362913 by nico:
Revert r361953 "[SVE][IR] Scalable Vector IR Type"

This reverts commit f4fc01f8dd3a5dfd2060d1ad0df6b90e8351ddf7.
It caused a 3-4x slowdown when doing thinlto links, PR42210.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/docs/LangRef.rst (diff)llvm.src/docs/LangRef.rst
The file was modified/llvm/trunk/include/llvm/ADT/DenseMapInfo.h (diff)llvm.src/include/llvm/ADT/DenseMapInfo.h
The file was modified/llvm/trunk/include/llvm/IR/DerivedTypes.h (diff)llvm.src/include/llvm/IR/DerivedTypes.h
The file was modified/llvm/trunk/include/llvm/IR/Type.h (diff)llvm.src/include/llvm/IR/Type.h
The file was removed/llvm/trunk/include/llvm/Support/ScalableSize.hllvm.src/include/llvm/Support/ScalableSize.h
The file was modified/llvm/trunk/lib/AsmParser/LLLexer.cpp (diff)llvm.src/lib/AsmParser/LLLexer.cpp
The file was modified/llvm/trunk/lib/AsmParser/LLParser.cpp (diff)llvm.src/lib/AsmParser/LLParser.cpp
The file was modified/llvm/trunk/lib/AsmParser/LLToken.h (diff)llvm.src/lib/AsmParser/LLToken.h
The file was modified/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (diff)llvm.src/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modified/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (diff)llvm.src/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modified/llvm/trunk/lib/IR/AsmWriter.cpp (diff)llvm.src/lib/IR/AsmWriter.cpp
The file was modified/llvm/trunk/lib/IR/LLVMContextImpl.h (diff)llvm.src/lib/IR/LLVMContextImpl.h
The file was modified/llvm/trunk/lib/IR/Type.cpp (diff)llvm.src/lib/IR/Type.cpp
The file was modified/llvm/trunk/lib/IR/Verifier.cpp (diff)llvm.src/lib/IR/Verifier.cpp
The file was modified/llvm/trunk/test/Bitcode/compatibility.ll (diff)llvm.src/test/Bitcode/compatibility.ll
The file was removed/llvm/trunk/test/Verifier/scalable-aggregates.llllvm.src/test/Verifier/scalable-aggregates.ll
The file was removed/llvm/trunk/test/Verifier/scalable-global-vars.llllvm.src/test/Verifier/scalable-global-vars.ll
The file was modified/llvm/trunk/unittests/IR/CMakeLists.txt (diff)llvm.src/unittests/IR/CMakeLists.txt
The file was removed/llvm/trunk/unittests/IR/VectorTypesTest.cppllvm.src/unittests/IR/VectorTypesTest.cpp
Revision 362912 by xbolva00:
[TargetLowering] Simplify (ctpop x) == 1

Reviewers: craig.topper, spatel, RKSimon, bkramer

Reviewed By: spatel

Subscribers: javed.absar, lebedev.ri, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63004
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/AArch64/arm64-popcnt.ll (diff)llvm.src/test/CodeGen/AArch64/arm64-popcnt.ll
The file was modified/llvm/trunk/test/CodeGen/X86/ctpop-combine.ll (diff)llvm.src/test/CodeGen/X86/ctpop-combine.ll
Revision 362911 by lebedevri:
[InstCombine] foldICmpWithLowBitMaskedVal(): 'icmp sgt/sle': avoid miscompiles

A precondition 'x != 0' was forgotten by me:
https://rise4fun.com/Alive/JFNP
https://rise4fun.com/Alive/jHvL

These 4 folds with non-constants could be re-enabled,
but for now let's go for the simplest solution.

https://bugs.llvm.org/show_bug.cgi?id=42198
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)llvm.src/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
Revision 362910 by lebedevri:
[NFC][InstCombine] Revisit canonicalize-constant-low-bit-mask-and-icmp-s* tests in preparatio for PR42198.

The `icmp sgt`/`icmp sle` variants are, too, miscompiles:
https://rise4fun.com/Alive/JFNP
https://rise4fun.com/Alive/jHvL
A precondition 'x != 0' was forgotten by me.

While ensuring test coverage for `-1`, also add test coverage
for `0` mask. Mask `0` is allowed for all the folds,
mask `-1` is allowed for all the folds with unsigned `icmp` pred.
Constant mask `0` is missed though.

https://bugs.llvm.org/show_bug.cgi?id=42198
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll (diff)llvm.src/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll
Revision 362909 by spatel:
[InstCombine] change canonicalization to fabs() to use FMF on fneg

This isn't the ideal fix (use FMF on the select), but it's still an
improvement until we have better FMF propagation to selects and other
FP math operators.

I don't think there's much risk of regression from this change by
not including the FMF on the fcmp any more. The nsz/nnan FMF
should be the same on the fcmp and the fneg (fsub) because they
have the same operand.

This works around the most glaring FMF logical inconsistency cited
in PR38086:
https://bugs.llvm.org/show_bug.cgi?id=38086
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp (diff)llvm.src/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modified/llvm/trunk/test/Transforms/InstCombine/fabs.ll (diff)llvm.src/test/Transforms/InstCombine/fabs.ll
Revision 362908 by xbolva00:
[NFC] Adjust test for D63004
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/AArch64/arm64-popcnt.ll (diff)llvm.src/test/CodeGen/AArch64/arm64-popcnt.ll
Revision 362907 by xbolva00:
[NFC] Added test from PR19758
Change TypePath in RepositoryPath in Workspace
The file was added/llvm/trunk/test/CodeGen/X86/tree_way_unsigned_cmp.llllvm.src/test/CodeGen/X86/tree_way_unsigned_cmp.ll
Revision 362906 by xbolva00:
[NFC] Added test from PR42084 for D63058
Change TypePath in RepositoryPath in Workspace
The file was added/llvm/trunk/test/Transforms/Inline/inline_negative_result.llllvm.src/test/Transforms/Inline/inline_negative_result.ll
Revision 362905 by nikic:
[InstCombine] Add tests for usub.sat(x,y)+y etc; NFC

For PR42178.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/InstCombine/saturating-add-sub.ll (diff)llvm.src/test/Transforms/InstCombine/saturating-add-sub.ll
Revision 362904 by spatel:
[InstSimplify] reduce code duplication for fcmp folds; NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Analysis/InstructionSimplify.cpp (diff)llvm.src/lib/Analysis/InstructionSimplify.cpp
Revision 362903 by spatel:
[InstSimplify] enhance fcmp fold with never-nan operand

This is another step towards correcting our usage of fast-math-flags when applied on an fcmp.
In this case, we are checking for 'nnan' on the fcmp itself rather than the operand of
the fcmp. But I'm leaving that clause in until we're more confident that we can stop
relying on fcmp's FMF.

By using the more general "isKnownNeverNaN()", we gain a simplification shown on the
tests with 'uitofp' regardless of the FMF on the fcmp (uitofp never produces a NaN).
On the tests with 'fabs', we are now relying on the FMF for the call fabs instruction
in addition to the FMF on the fcmp.

This is a continuation of D62979 / rL362879.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Analysis/InstructionSimplify.cpp (diff)llvm.src/lib/Analysis/InstructionSimplify.cpp
The file was modified/llvm/trunk/test/Transforms/InstSimplify/floating-point-compare.ll (diff)llvm.src/test/Transforms/InstSimplify/floating-point-compare.ll
Revision 362902 by spatel:
[InstSimplify] add tests for fcmp with known-never-nan operands; NFC

Opposite predicate for rL362742 / rL362879 / D62979
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/InstSimplify/floating-point-compare.ll (diff)llvm.src/test/Transforms/InstSimplify/floating-point-compare.ll
Revision 362901 by anton-afanasyev:
[MIR] Add simple PRE pass to MachineCSE

This is the second part of the commit fixing PR38917 (hoisting
partitially redundant machine instruction). Most of PRE (partitial
redundancy elimination) and CSE work is done on LLVM IR, but some of
redundancy arises during DAG legalization. Machine CSE is not enough
to deal with it. This simple PRE implementation works a little bit
intricately: it passes before CSE, looking for partitial redundancy
and transforming it to fully redundancy, anticipating that the next
CSE step will eliminate this created redundancy. If CSE doesn't
eliminate this, than created instruction will remain dead and eliminated
later by Remove Dead Machine Instructions pass.

The third part of the commit is supposed to refactor MachineCSE,
to make it more clear and to merge MachinePRE with MachineCSE,
so one need no rely on further Remove Dead pass to clear instrs
not eliminated by CSE.

First step: https://reviews.llvm.org/D54839

Fixes llvm.org/PR38917

This is fixed recommit of r361356 after PowerPC64 multistage build failure.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/MachineCSE.cpp (diff)llvm.src/lib/CodeGen/MachineCSE.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/avx2-masked-gather.ll (diff)llvm.src/test/CodeGen/X86/avx2-masked-gather.ll
The file was modified/llvm/trunk/test/CodeGen/X86/masked_compressstore.ll (diff)llvm.src/test/CodeGen/X86/masked_compressstore.ll
The file was modified/llvm/trunk/test/CodeGen/X86/masked_gather.ll (diff)llvm.src/test/CodeGen/X86/masked_gather.ll
The file was modified/llvm/trunk/test/CodeGen/X86/masked_store.ll (diff)llvm.src/test/CodeGen/X86/masked_store.ll
The file was modified/llvm/trunk/test/CodeGen/X86/masked_store_trunc.ll (diff)llvm.src/test/CodeGen/X86/masked_store_trunc.ll
The file was modified/llvm/trunk/test/CodeGen/X86/masked_store_trunc_ssat.ll (diff)llvm.src/test/CodeGen/X86/masked_store_trunc_ssat.ll
The file was modified/llvm/trunk/test/CodeGen/X86/masked_store_trunc_usat.ll (diff)llvm.src/test/CodeGen/X86/masked_store_trunc_usat.ll