Started 2 mo 16 days ago
Took 10 hr on green-dragon-13

Failed Build #6457 (Jul 9, 2019 11:51:28 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 365517
  • http://llvm.org/svn/llvm-project/cfe/trunk : 365509
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 365513
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 365359
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 365463
Changes
  1. Remove a comment that has been obsolete since r327679 (detail)
    by nico
  2. [unittest] Add bogus register info.

    Reviewers: dstenb

    Subscribers: llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64421 (detail)
    by hliao
  3. Rename llvm/test/tools/llvm-pdbdump to llvm/test/tools/llvm-pdbutil

    llvm-pdbdump was renamed to llvm-pdbutil long ago. This updates the test
    to be where you'd expect them to be. (detail)
    by nico
  4. Make pdbdump-objfilename test work again

    - The test had extension .yaml, which lit doesn't execute in this
      directory. Rename to .test to make it run, and move the yaml bits
      into a dedicated file, like with all other tests in this dir.

    - llvm-pdbdump got renamed to llvm-pdbutil long ago, update test.

    - -dbi-module-info got renamed in r305032, update test for this too. (detail)
    by nico
  5. [TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.8

    Refine longjmp key management.  For Linux, re-implement key retrieval in
    C (instead of assembly).  Removal of `InitializeGuardPtr` and a final
    round of cleanups will be done in the next commit.

    Reviewed By: dvyukov

    Differential Revision: https://reviews.llvm.org/D64092 (detail)
    by yln
  6. [AMDGPU] Created a sub-register class for the return address operand in the return instruction.

    Function return instruction lowering, currently uses the fixed register pair s[30:31] for holding
    the return address. It can be any SGPR pair other than the CSRs. Created an SGPR pair sub-register class
    exclusive of the CSRs, and used this regclass while lowering the return instruction.

    Reviewed By: arsenm

    Differential Revision: https://reviews.llvm.org/D63924 (detail)
    by cdevadas
  7. [RISCV] Fix ICE in isDesirableToCommuteWithShift

    Summary:
    There was an error being thrown from isDesirableToCommuteWithShift in
    some tests. This was tracked down to the method being called before
    legalisation, with an extended value type, not a machine value type.

    In the case I diagnosed, the error was only hit with an instruction sequence
    involving `i24`s in the add and shift. `i24` is not a Machine ValueType, it is
    instead an Extended ValueType which was causing the issue.

    I have added a test to cover this case, and fixed the error in the callback.

    Reviewers: asb, luismarques

    Reviewed By: asb

    Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64425 (detail)
    by lenary
  8. [AArch64][GlobalISel] Optimize conditional branches followed by unconditional branches

    If we have an icmp->brcond->br sequence where the brcond just branches to the
    next block jumping over the br, while the br takes the false edge, then we can
    modify the conditional branch to jump to the br's target while inverting the
    condition of the incoming icmp. This means we can eliminate the br as an
    unconditional branch to the fallthrough block.

    Differential Revision: https://reviews.llvm.org/D64354 (detail)
    by aemerson
  9. Revert Revert Devirtualize destructor of final class.

    Revert r364359 and recommit r364100.

    r364100 was reverted as r364359 due to an internal test failure, but it was a
    false alarm. (detail)
    by yamauchi
  10. [mips] Show error in case of using FP64 mode on pre MIPS32R2 CPU (detail)
    by atanasyan
  11. [mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC

    Support for 64-bit coprocessors on a 32-bit architecture
    was added in `MIPS32 R2`. (detail)
    by atanasyan
  12. [NFC] Fixed tests (detail)
    by xbolva00
  13. [DAGCombine] LoadedSlice - keep getOffsetFromBase() uint64_t offset. NFCI.

    Keep the uint64_t type from getOffsetFromBase() to stop truncation/extension overflow warnings in MSVC in alignment math. (detail)
    by rksimon
  14. [BPF] Support for compile once and run everywhere

    Introduction
    ============

    This patch added intial support for bpf program compile once
    and run everywhere (CO-RE).

    The main motivation is for bpf program which depends on
    kernel headers which may vary between different kernel versions.
    The initial discussion can be found at https://lwn.net/Articles/773198/.

    Currently, bpf program accesses kernel internal data structure
    through bpf_probe_read() helper. The idea is to capture the
    kernel data structure to be accessed through bpf_probe_read()
    and relocate them on different kernel versions.

    On each host, right before bpf program load, the bpfloader
    will look at the types of the native linux through vmlinux BTF,
    calculates proper access offset and patch the instruction.

    To accommodate this, three intrinsic functions
       preserve_{array,union,struct}_access_index
    are introduced which in clang will preserve the base pointer,
    struct/union/array access_index and struct/union debuginfo type
    information. Later, bpf IR pass can reconstruct the whole gep
    access chains without looking at gep itself.

    This patch did the following:
      . An IR pass is added to convert preserve_*_access_index to
        global variable who name encodes the getelementptr
        access pattern. The global variable has metadata
        attached to describe the corresponding struct/union
        debuginfo type.
      . An SimplifyPatchable MachineInstruction pass is added
        to remove unnecessary loads.
      . The BTF output pass is enhanced to generate relocation
        records located in .BTF.ext section.

    Typical CO-RE also needs support of global variables which can
    be assigned to different values to different hosts. For example,
    kernel version can be used to guard different versions of codes.
    This patch added the support for patchable externals as well.

    Example
    =======

    The following is an example.

      struct pt_regs {
        long arg1;
        long arg2;
      };
      struct sk_buff {
        int i;
        struct net_device *dev;
      };

      #define _(x) (__builtin_preserve_access_index(x))
      static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr) =
              (void *) 4;
      extern __attribute__((section(".BPF.patchable_externs"))) unsigned __kernel_version;
      int bpf_prog(struct pt_regs *ctx) {
        struct net_device *dev = 0;

        // ctx->arg* does not need bpf_probe_read
        if (__kernel_version >= 41608)
          bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg1)->dev));
        else
          bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg2)->dev));
        return dev != 0;
      }

    In the above, we want to translate the third argument of
    bpf_probe_read() as relocations.

      -bash-4.4$ clang -target bpf -O2 -g -S trace.c

    The compiler will generate two new subsections in .BTF.ext,
    OffsetReloc and ExternReloc.
    OffsetReloc is to record the structure member offset operations,
    and ExternalReloc is to record the external globals where
    only u8, u16, u32 and u64 are supported.

       BPFOffsetReloc Size
       struct SecLOffsetReloc for ELF section #1
       A number of struct BPFOffsetReloc for ELF section #1
       struct SecOffsetReloc for ELF section #2
       A number of struct BPFOffsetReloc for ELF section #2
       ...
       BPFExternReloc Size
       struct SecExternReloc for ELF section #1
       A number of struct BPFExternReloc for ELF section #1
       struct SecExternReloc for ELF section #2
       A number of struct BPFExternReloc for ELF section #2

      struct BPFOffsetReloc {
        uint32_t InsnOffset;    ///< Byte offset in this section
        uint32_t TypeID;        ///< TypeID for the relocation
        uint32_t OffsetNameOff; ///< The string to traverse types
      };

      struct BPFExternReloc {
        uint32_t InsnOffset;    ///< Byte offset in this section
        uint32_t ExternNameOff; ///< The string for external variable
      };

    Note that only externs with attribute section ".BPF.patchable_externs"
    are considered for Extern Reloc which will be patched by bpf loader
    right before the load.

    For the above test case, two offset records and one extern record
    will be generated:
      OffsetReloc records:
            .long   .Ltmp12                 # Insn Offset
            .long   7                       # TypeId
            .long   242                     # Type Decode String
            .long   .Ltmp18                 # Insn Offset
            .long   7                       # TypeId
            .long   242                     # Type Decode String

      ExternReloc record:
            .long   .Ltmp5                  # Insn Offset
            .long   165                     # External Variable

      In string table:
            .ascii  "0:1"                   # string offset=242
            .ascii  "__kernel_version"      # string offset=165

    The default member offset can be calculated as
        the 2nd member offset (0 representing the 1st member) of struct "sk_buff".

    The asm code:
        .Ltmp5:
        .Ltmp6:
                r2 = 0
                r3 = 41608
        .Ltmp7:
        .Ltmp8:
                .loc    1 18 9 is_stmt 0        # t.c:18:9
        .Ltmp9:
                if r3 > r2 goto LBB0_2
        .Ltmp10:
        .Ltmp11:
                .loc    1 0 9                   # t.c:0:9
        .Ltmp12:
                r2 = 8
        .Ltmp13:
                .loc    1 19 66 is_stmt 1       # t.c:19:66
        .Ltmp14:
        .Ltmp15:
                r3 = *(u64 *)(r1 + 0)
                goto LBB0_3
        .Ltmp16:
        .Ltmp17:
        LBB0_2:
                .loc    1 0 66 is_stmt 0        # t.c:0:66
        .Ltmp18:
                r2 = 8
                .loc    1 21 66 is_stmt 1       # t.c:21:66
        .Ltmp19:
                r3 = *(u64 *)(r1 + 8)
        .Ltmp20:
        .Ltmp21:
        LBB0_3:
                .loc    1 0 66 is_stmt 0        # t.c:0:66
                r3 += r2
                r1 = r10
        .Ltmp22:
        .Ltmp23:
        .Ltmp24:
                r1 += -8
                r2 = 8
                call 4

    For instruction .Ltmp12 and .Ltmp18, "r2 = 8", the number
    8 is the structure offset based on the current BTF.
    Loader needs to adjust it if it changes on the host.

    For instruction .Ltmp5, "r2 = 0", the external variable
    got a default value 0, loader needs to supply an appropriate
    value for the particular host.

    Compiling to generate object code and disassemble:
       0000000000000000 bpf_prog:
               0:       b7 02 00 00 00 00 00 00         r2 = 0
               1:       7b 2a f8 ff 00 00 00 00         *(u64 *)(r10 - 8) = r2
               2:       b7 02 00 00 00 00 00 00         r2 = 0
               3:       b7 03 00 00 88 a2 00 00         r3 = 41608
               4:       2d 23 03 00 00 00 00 00         if r3 > r2 goto +3 <LBB0_2>
               5:       b7 02 00 00 08 00 00 00         r2 = 8
               6:       79 13 00 00 00 00 00 00         r3 = *(u64 *)(r1 + 0)
               7:       05 00 02 00 00 00 00 00         goto +2 <LBB0_3>

        0000000000000040 LBB0_2:
               8:       b7 02 00 00 08 00 00 00         r2 = 8
               9:       79 13 08 00 00 00 00 00         r3 = *(u64 *)(r1 + 8)

        0000000000000050 LBB0_3:
              10:       0f 23 00 00 00 00 00 00         r3 += r2
              11:       bf a1 00 00 00 00 00 00         r1 = r10
              12:       07 01 00 00 f8 ff ff ff         r1 += -8
              13:       b7 02 00 00 08 00 00 00         r2 = 8
              14:       85 00 00 00 04 00 00 00         call 4

    Instructions #2, #5 and #8 need relocation resoutions from the loader.

    Signed-off-by: Yonghong Song <yhs@fb.com>

    Differential Revision: https://reviews.llvm.org/D61524 (detail)
    by yhs
  15. [ADT] Remove MSVC-only "no two-phase name lookup" typename path.

    Now that we've dropped VS2015 support (D64326) we can use the regular codepath as VS2017+ correctly handles it (detail)
    by rksimon
  16. [NFC] Added tests for D64285 (detail)
    by xbolva00
  17. [OpenCL][Sema] Improve address space support for blocks

    Summary:
    This patch ensures that the following code is compiled identically with
    -cl-std=CL2.0 and -fblocks -cl-std=c++.

        kernel void test(void) {
          void (^const block_A)(void) = ^{
            return;
          };
        }

    A new test is not added because cl20-device-side-enqueue.cl will cover
    this once blocks are further improved for C++ for OpenCL.

    The changes to Sema::PerformImplicitConversion are based on
    the parts of Sema::CheckAssignmentConstraints on block pointer
    conversions.

    Reviewers: rjmccall, Anastasia

    Subscribers: yaxunl, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D64083 (detail)
    by mantognini
  18. [OpenCL][Sema] Fix builtin rewriting

    This patch ensures built-in functions are rewritten using the proper
    parent declaration.

    Existing tests are modified to run in C++ mode to ensure the
    functionality works also with C++ for OpenCL while not increasing the
    testing runtime. (detail)
    by mantognini
  19. Ignore trailing NullStmts in StmtExprs for GCC compatibility.

    Ignore trailing NullStmts in compound expressions when determining the result type and value. This is to match the GCC behavior which ignores semicolons at the end of compound expressions.

    Patch by Dominic Ferreira. (detail)
    by aaronballman
  20. [HardwareLoops] NFC - move hardware loop checking code to isHardwareLoopProfitable()

    Differential Revision: https://reviews.llvm.org/D64197 (detail)
    by shchenz
  21. [ARM] Add test for MVE and no floats. NFC

    Adds a simple test that MVE with no floating point will be promoted correctly
    to software float calls. (detail)
    by dmgreen
  22. [InferFunctionAttrs] add more tests for derefenceable; NFC (detail)
    by spatel
  23. [MIPS GlobalISel] Register bank select for G_PHI. Select i64 phi

    Select gprb or fprb when def/use register operand of G_PHI is
    used/defined by either:
    copy to/from physical register or
    instruction with only one mapping available for that use/def operand.

    Integer s64 phi is handled with narrowScalar when mapping is applied,
    produced artifacts are combined away. Manually set gprb to all register
    operands of instructions created during narrowScalar.

    Differential Revision: https://reviews.llvm.org/D64351 (detail)
    by petar.avramovic
  24. AMDGPU/GlobalISel: Prepare some tests for store selection

    Mostsly these would fail due to trying to use SI with a flat
    operation. Implementing global loads with MUBUF is more work than
    flat, so these won't be handled in the initial load selection.

    Others fail because store of s64 won't initially work, as the current
    set of patterns expect everything to be turned into v2i32. (detail)
    by arsenm
  25. [MIPS GlobalISel] Regbanks for G_SELECT. Select i64, f32 and f64 select

    Select gprb or fprb when def/use register operand of G_SELECT is
    used/defined by either:
    copy to/from physical register or
    instruction with only one mapping available for that use/def operand.

    Integer s64 select is handled with narrowScalar when mapping is applied,
    produced artifacts are combined away. Manually set gprb to all register
    operands of instructions created during narrowScalar.

    For selection of floating point s32 or s64 select it is enough to set
    fprb of appropriate size and selectImpl will do the rest.

    Differential Revision: https://reviews.llvm.org/D64350 (detail)
    by petar.avramovic
  26. AMDGPU/GlobalISel: Fix test (detail)
    by arsenm
  27. [libclang] Fix hang in release / assertion in debug when evaluating value-dependent types.

    Expression evaluator doesn't work in value-dependent types, so ensure that the
    precondition it asserts holds.

    This fixes https://bugs.llvm.org/show_bug.cgi?id=42532

    Differential Revision: https://reviews.llvm.org/D64409 (detail)
    by emilio
  28. [docs][llvm-dwarfdump] Fix wording (detail)
    by jhenderson
  29. AMDGPU/GlobalISel: Legalize more concat_vectors (detail)
    by arsenm
  30. AMDGPU/GlobalISel: Improve regbankselect for icmp s16

    Account for 64-bit scalar eq/ne when available. (detail)
    by arsenm
  31. AMDGPU/GlobalISel: Make s16 G_ICMP legal (detail)
    by arsenm
  32. [OPENMP]Fix the float point semantics handling on the device.

    The device should use the same float point representation as the host.
    Previous patch fixed the handling of the sizes of the float point types,
    but did not fixed the fp semantics. This patch makes target device to
    use the host fp semantics. this is required for the correct data
    transfer between host and device and correct codegen. (detail)
    by abataev
  33. AMDGPU/GlobalISel: Select G_SUB (detail)
    by arsenm
  34. AMDGPU/GlobalISel: Select G_UNMERGE_VALUES (detail)
    by arsenm
  35. AMDGPU/GlobalISel: Select G_MERGE_VALUES (detail)
    by arsenm
  36. gn build: Merge r365453 (detail)
    by nico
  37. [ItaniumMangle] Refactor long double/__float128 mangling and fix the mangled code

    In gcc PowerPC, long double has 3 mangling schemes:

    -mlong-double-64: `e`
    -mlong-double-128 -mabi=ibmlongdouble: `g`
    -mlong-double-128 -mabi=ieeelongdouble: `u9__ieee128` (gcc <= 8.1: `U10__float128`)

    The current useFloat128ManglingForLongDouble() bisection is not suitable
    when we support -mlong-double-128 in clang (D64277). Replace
    useFloat128ManglingForLongDouble() with getLongDoubleMangling() and
    getFloat128Mangling() to allow 3 mangling schemes.

    I also deleted the `getTriple().isOSBinFormatELF()` check (the Darwin
    support has gone: https://reviews.llvm.org/D50988).

    For x86, change the mangled code of __float128 from `U10__float128` to `g`. `U10__float128` was wrongly copied from PowerPC.
    The test will be added to `test/CodeGen/x86-long-double.cpp` in D64277.

    Reviewed By: erichkeane

    Differential Revision: https://reviews.llvm.org/D64276 (detail)
    by maskray
  38. [Syntax] Move roles into a separate enum

    To align with reviewer's suggestions. (detail)
    by ibiryukov
  39. [CodeGen] AccelTable - remove non-constexpr (MSVC) Atom defs

    Now that we've dropped VS2015 support (D64326) we can enable the constexpr variables on MSVC builds as VS2017+ correctly handles them (detail)
    by rksimon
  40. [mips] Implement sge/sgeu pseudo instructions

    The `sge/sgeu Dst, Src1, Src2/Imm` pseudo instructions set register
    `Dst` to 1 if register `Src1` is greater than or equal `Src2/Imm` and
    to 0 otherwise.

    Differential Revision: https://reviews.llvm.org/D64314 (detail)
    by atanasyan
  41. [mips] Implement sgt/sgtu pseudo instructions with immediate operand

    The `sgt/sgtu Dst, Src1, Src2/Imm` pseudo instructions set register
    `Dst` to 1 if register `Src1` is greater than `Src2/Imm` and to 0 otherwise.

    Differential Revision: https://reviews.llvm.org/D64313 (detail)
    by atanasyan
  42. [docs][llvm-objdump] Make some wording improvements/simplifications. (detail)
    by jhenderson
  43. [NFC] [X86] Fix scan-build complaining

    Summary:
    Remove unused variable. This fixes bug:
    https://bugs.llvm.org/show_bug.cgi?id=42526

    Signed-off-by: pengfei <pengfei.wang@intel.com>

    Reviewers: RKSimon, xiangzhangllvm, craig.topper

    Subscribers: cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D64389 (detail)
    by pengfei
  44. OpaquePtr: pass type to CreateLoad. NFC.

    This is the one place in LLVM itself that used the deprecated API for
    CreateLoad, so I just added the type in. (detail)
    by Tim Northover
  45. [ADT] Enable ArrayRef/StringRef is_assignable tests on MSVC

    Now that we've dropped VS2015 support (D64326) we can enable these static_asserts on MSVC builds as VS2017+ correctly handles them (detail)
    by rksimon
  46. [NFC][AsmPrinter] Fix the formatting for the rL365467

    In addition, fix the build failure for the 'unused'
    variable. The variable was used inside the 'LLVM_DEBUG()'. (detail)
    by djtodoro
  47. OpaquePtr: add Type parameter to Loads analysis API.

    This makes the functions in Loads.h require a type to be specified
    independently of the pointer Value so that when pointers have no structure
    other than address-space, it can still do its job.

    Most callers had an obvious memory operation handy to provide this type, but a
    SROA and ArgumentPromotion were doing more complicated analysis. They get
    updated to merge the properties of the various instructions they were
    considering. (detail)
    by Tim Northover
  48. [DwarfDebug] Dump call site debug info

    Dump the DWARF information about call sites and call site parameters into
    debug info sections.

    The patch also provides an interface for the interpretation of instructions
    that could load values of a call site parameters in order to generate DWARF
    about the call site parameters.

    ([13/13] Introduce the debug entry values.)

    Co-authored-by: Ananth Sowda <asowda@cisco.com>
    Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
    Co-authored-by: Ivan Baev <ibaev@cisco.com>

    Differential Revision: https://reviews.llvm.org/D60716 (detail)
    by djtodoro
  49. Reland r365355: [Syntax] Introduce syntax trees

    With a fix to a PS4 buildbot crash. (detail)
    by ibiryukov
  50. Revert rL365355 : [Syntax] Introduce syntax trees

    Summary:
    A tooling-focused alternative to the AST. This commit focuses on the
    memory-management strategy and the structure of the AST.

    More to follow later:
      - Operations to mutate the syntax trees and corresponding textual
        replacements.
      - Mapping between clang AST nodes and syntax tree nodes.
      - More node types corresponding to the language constructs.

    Reviewers: sammccall

    Reviewed By: sammccall

    Subscribers: llvm-commits, mgorny, cfe-commits

    Tags: #clang, #llvm

    Differential Revision: https://reviews.llvm.org/D61637
    ........
    Fixes buildbots which were crashing on SyntaxTests.exe (detail)
    by rksimon
  51. [ASTImporter] Added visibility context check for EnumDecl.

    Summary:
    ASTImporter makes now difference between enums with same name in different translation
    units if these are not visible outside.
    ("Scoped enums" are not handled yet.)

    Reviewers: martong, a.sidorin, shafik, a_sidorin

    Reviewed By: a_sidorin

    Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D62484 (detail)
    by balazske
  52. Enhance abseil-faster-strsplit-delimiter to handle other non-printable characters.

    Summary:
    Currently it fails on cases like '\001'.

    Note: Since `StringLiteral::outputString` dumps most nonprintable
    characters in octal value, the exact string literal format isn't preserved,
    e.g. `"\x01"` becomes `'\001'`.

    Reviewers: gribozavr

    Reviewed By: gribozavr

    Subscribers: lebedev.ri, Eugene.Zelenko, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D64151

    Patch by Xiaoyi Zhang. (detail)
    by gribozavr
  53. [RISCV] Fix RISCVTTIImpl::getIntImmCost for immediates where getMinSignedBits() > 64

    APInt::getSExtValue will assert if getMinSignedBits() > 64. This can happen,
    for instance, if examining an i128. Avoid this assertion by checking
    Imm.getMinSignedBits() <= 64 before doing
    getTLI()->isLegalAddImmediate(Imm.getSExtValue()). We could directly check
    getMinSignedBits() <= 12 but it seems better to reuse the isLegalAddImmediate
    helper for this.

    Differential Revision: https://reviews.llvm.org/D64390 (detail)
    by asb
  54. [docs][llvm-nm] Improve some wording

    In particular, the --debug-syms switch really doesn't have anything to
    do with debuggers, so I've updated the document accordingly. (detail)
    by jhenderson
  55. Fixed assertion (detail)
    by sureyeaah
  56. [SelectionDAG] Simplify some calls to getSetCCResultType. NFC

    DAGTypeLegalizer and SelectionDAGLegalize has helper
    functions wrapping the call to TLI.getSetCCResultType(...).
    Use those helpers in more places. (detail)
    by bjope
  57. [LegalizeTypes] Fix saturation bug for smul.fix.sat

    Summary:
    Make sure we use SETGE instead of SETGT when checking
    if the sign bit is zero at SMULFIXSAT expansion.

    The faulty expansion occured when doing "expand" of
    SMULFIXSAT and the scale was exactly matching the
    size of the smaller type. For example doing
      i64 Z = SMULFIXSAT X, Y, 32
    and expanding X/Y/Z into using two i32 values.

    The problem was that we sometimes did not saturate
    to min when overflowing.

    Here is an example using Q3.4 numbers:

    Consider that we are multiplying X and Y.
      X = 0x80 (-8.0 as Q3.4)
      Y = 0x20 (2.0 as Q3.4)
    To avoid loss of precision we do a widening
    multiplication, getting a 16 bit result
      Z = 0xF000 (-16.0 as Q7.8)

    To detect negative overflow we should check if
    the five most significant bits in Z are less than -1.
    Assume that we name the 4 most significant bits
    as HH and the next 4 bits as HL. Then we can do the
    check by examining if
    (HH < -1) or (HH == -1 && "sign bit in HL is zero").

    The fault was that we have been doing the check as
    (HH < -1) or (HH == -1 && HL > 0)
    instead of
    (HH < -1) or (HH == -1 && HL >= 0).

    In our example HH is -1 and HL is 0, so the old
    code did not trigger saturation and simply truncated
    the result to 0x00 (0.0). With the bugfix we instead
    detect that we should saturate to min, and the result
    will be set to 0x80 (-8.0).

    Reviewers: leonardchan, bevinh

    Reviewed By: leonardchan

    Subscribers: hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64331 (detail)
    by bjope
  58. Retire VS2015 Support

    As proposed here: https://lists.llvm.org/pipermail/llvm-dev/2019-June/133147.html

    This patch raises the minimum supported version to build LLVM/Clang to Visual Studio 2017.

    Differential Revision: https://reviews.llvm.org/D64326 (detail)
    by rksimon
  59. dummy variable extraction on a function scope

    Summary:
    - Added extraction to a dummy variable
    - using auto for the dummy variable type for now
    - Works on a function scope
    - Adding braces to create a compound statement not supported yet
    - added unit tests

    Reviewers: sammccall, kadircet

    Subscribers: mgorny, jkorous, arphaman, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D63773 (detail)
    by sureyeaah
  60. Retire VS2015 Support

    As proposed here: https://lists.llvm.org/pipermail/llvm-dev/2019-June/133147.html

    This patch raises the minimum supported version to build LLVM/Clang to Visual Studio 2017.

    Differential Revision: https://reviews.llvm.org/D64326 (detail)
    by rksimon
  61. [docs][llvm-dwarfdump] Make some option descriptions clearer and more precise

    Some of the wording in the doc (taken largely from the help text), was a
    little imprecise in some cases, so this patch makes it a little more
    precise.

    Reviewed by: JDevlieghere, probinson

    Differential Revision: https://reviews.llvm.org/D64332 (detail)
    by jhenderson
  62. [llvm-profdata] Don't make the output overwrite the input file.

    Some file systems may not allow this behavior, the test fails on our internal
    system ("Permission denied"). (detail)
    by hokein
  63. Fixing @llvm.memcpy not honoring volatile.
    This is explicitly not addressing target-specific code, or calls to memcpy.

    Summary: https://bugs.llvm.org/show_bug.cgi?id=42254

    Reviewers: courbet

    Subscribers: hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D63215 (detail)
    by gchatelet
  64. Revert r364515 and r364524

    Jordan reports on llvm-commits a performance regression with r364515,
    backing the patch out while it's investigated. (detail)
    by jmorse
  65. [NFC][PowerPC] Added a test to show current codegen of MachinePRE (detail)
    by lkail
  66. Remove trailing whitespaces in the Language Extensions doc (detail)
    by sylvestre
  67. Add AlignConsecutiveMacros to the clang release notes (detail)
    by sylvestre
  68. Reland "[LiveDebugValues] Emit the debug entry values"

    Emit replacements for clobbered parameters location if the parameter
    has unmodified value throughout the funciton. This is basic scenario
    where we can use the debug entry values.

    ([12/13] Introduce the debug entry values.)

    Co-authored-by: Ananth Sowda <asowda@cisco.com>
    Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
    Co-authored-by: Ivan Baev <ibaev@cisco.com>

    Differential Revision: https://reviews.llvm.org/D58042 (detail)
    by djtodoro

Started by upstream project clang-stage2-cmake-RgSan_relay build number 1173
originally caused by:

This run spent:

  • 1 ms waiting;
  • 10 hr build duration;
  • 10 hr total from scheduled to completion.
Test Result (no failures)

    Identified problems

    Regression test failed

    This build failed because a regression test in the test suite FAILed. See the test report for details.
    Indication 1

    Ninja target failed

    Below is a link to the first failed ninja target.
    Indication 2