Started 11 days ago
Took 1 hr 23 min on green-dragon-09

Success Build #17904 (Jul 9, 2019 10:33:49 AM)

  • : 365517
  • : 365518
  • : 365513
  • : 364589
  • : 365359
  • : 365463
  1. [ObjC] Add a warning for implicit conversions of a constant non-boolean value to BOOL


    Differential revision: (detail/ViewSVN)
    by epilk
  2. Remove a comment that has been obsolete since r327679 (detail/ViewSVN)
    by nico
  3. [unittest] Add bogus register info.

    Reviewers: dstenb

    Subscribers: llvm-commits

    Tags: #llvm

    Differential Revision: (detail/ViewSVN)
    by hliao
  4. Rename llvm/test/tools/llvm-pdbdump to llvm/test/tools/llvm-pdbutil

    llvm-pdbdump was renamed to llvm-pdbutil long ago. This updates the test
    to be where you'd expect them to be. (detail/ViewSVN)
    by nico
  5. Make pdbdump-objfilename test work again

    - The test had extension .yaml, which lit doesn't execute in this
      directory. Rename to .test to make it run, and move the yaml bits
      into a dedicated file, like with all other tests in this dir.

    - llvm-pdbdump got renamed to llvm-pdbutil long ago, update test.

    - -dbi-module-info got renamed in r305032, update test for this too. (detail/ViewSVN)
    by nico
  6. [TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.8

    Refine longjmp key management.  For Linux, re-implement key retrieval in
    C (instead of assembly).  Removal of `InitializeGuardPtr` and a final
    round of cleanups will be done in the next commit.

    Reviewed By: dvyukov

    Differential Revision: (detail/ViewSVN)
    by yln
  7. [AMDGPU] Created a sub-register class for the return address operand in the return instruction.

    Function return instruction lowering, currently uses the fixed register pair s[30:31] for holding
    the return address. It can be any SGPR pair other than the CSRs. Created an SGPR pair sub-register class
    exclusive of the CSRs, and used this regclass while lowering the return instruction.

    Reviewed By: arsenm

    Differential Revision: (detail/ViewSVN)
    by cdevadas
  8. [RISCV] Fix ICE in isDesirableToCommuteWithShift

    There was an error being thrown from isDesirableToCommuteWithShift in
    some tests. This was tracked down to the method being called before
    legalisation, with an extended value type, not a machine value type.

    In the case I diagnosed, the error was only hit with an instruction sequence
    involving `i24`s in the add and shift. `i24` is not a Machine ValueType, it is
    instead an Extended ValueType which was causing the issue.

    I have added a test to cover this case, and fixed the error in the callback.

    Reviewers: asb, luismarques

    Reviewed By: asb

    Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits

    Tags: #llvm

    Differential Revision: (detail/ViewSVN)
    by lenary
  9. [AArch64][GlobalISel] Optimize conditional branches followed by unconditional branches

    If we have an icmp->brcond->br sequence where the brcond just branches to the
    next block jumping over the br, while the br takes the false edge, then we can
    modify the conditional branch to jump to the br's target while inverting the
    condition of the incoming icmp. This means we can eliminate the br as an
    unconditional branch to the fallthrough block.

    Differential Revision: (detail/ViewSVN)
    by aemerson

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 57824
originally caused by:

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 57828
originally caused by:

This run spent:

  • 1 hr 13 min waiting;
  • 1 hr 23 min build duration;
  • 2 hr 36 min total from scheduled to completion.
LLVM/Clang Warnings: 0 warnings.
  • No warnings since build 17,881.
  • Still 68 days before reaching the previous zero warnings highscore.