SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [Support] Make UniqueStringSaver wrap a StringSet (details)
  2. [RS4GC] Fix algorithm to avoid setting vector BDV for scalar derived pointer"" (details)
  3. Fix test from 5f1f4a5 (details)
  4. [TargetLowering] Improve expansion of FSHL/FSHR (details)
  5. Re-commit: [ARM] CMSE code generation (details)
  6. AMDGPU/OpenCL: Accept -nostdlib in place of -nogpulib (details)
  7. [COFF] Move type merging to TpiSource::mergeDebugT virtual method (details)
  8. hwasan: Collect ring buffer statistics and include in dev note. (details)
  9. [test] NFC, add missing declarations and include to test files to avoid 'implicit-function-declaration' diagnostics in the tests (details)
  10. TargetLowering.cpp - remove non-constant EXTRACT_SUBVECTOR/INSERT_SUBVECTOR handling. NFC. (details)
  11. [X86] Fix a regression caused by moving combineLoopMAddPattern to IR (details)
  12. [LLD] Fix precomp-link.test (details)
Commit 29560a89ddcaf3af9b8a73d98d968a0911d21e27 by benny.kra
[Support] Make UniqueStringSaver wrap a StringSet

This is slightly more efficient while providing exactly the same
semantics.
The file was modifiedllvm/include/llvm/Support/StringSaver.h
The file was modifiedllvm/lib/Support/StringSaver.cpp
Commit eb282be9f8e96053dc7dda687cd0608997810ccf by anna
[RS4GC] Fix algorithm to avoid setting vector BDV for scalar derived pointer""

This is relanding of rGbb308b020522420413c7d3f2989a88f2fc423c56 after
speculatively fixing buildbot lit test failure which was seen on two
bots (I cannot reproduce the lit test failure locally either).

[RS4GC] Fix algorithm to avoid setting vector BDV for scalar derived
pointer

Summary:
This is a more general fix to 59029b9eef23 (D75704).
This patch does the following:

updates isKnownBaseValue to account for base pointer and
derived pointer having differing types.

This inturn allows us to populate the
lattice (States) for such derived pointers.

It also updates all states where the base and derived pointers have
differing types (vector versus scalar) and conservatively marks these
states as conflictcs.
Note that in 59029b9eef23, we were just fixing existing lattice values
and that too, only for uses of extractelement.

Reviewers: reames, skatkov, dantrushin

Reviewed By: skatkov

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D76305
The file was modifiedllvm/test/Transforms/RewriteStatepointsForGC/scalar-base-vector.ll
The file was modifiedllvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Commit 0c5db3e4aa197bab6e4d9f8c02ca0edf4fa9dce3 by erich.keane
Fix test from 5f1f4a5

My test needs a requires target clause to support inline assembly.  This
patch splits out the asm tests into a separate test so we don't skip the
rest of the conditions.
The file was modifiedclang/test/SemaCXX/ext-int.cpp
The file was addedclang/test/SemaCXX/ext-int-asm.cpp
Commit 17941437a2ed8abefef719345391da94e6df8ebb by jay.foad
[TargetLowering] Improve expansion of FSHL/FSHR

Use an extra shift-by-1 instead of a compare and select to handle the
shift-by-zero case. This sometimes saves one instruction (if the compare
couldn't be combined with a previous instruction). It also works better
on targets that don't have good select instructions.

Note that currently this change doesn't affect most targets because
expandFunnelShift is not used because funnel shift intrinsics are
lowered early in SelectionDAGBuilder. But there is work afoot to change
that; see D77152.

Differential Revision: https://reviews.llvm.org/D77301
The file was modifiedllvm/test/CodeGen/X86/fshl.ll
The file was modifiedllvm/test/CodeGen/X86/fshr.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit bc2e572f51dac4aed8ef86b2f09427109f0cabb8 by momchil.velikov
Re-commit: [ARM] CMSE code generation

This patch implements the final bits of CMSE code generation:

* emit special linker symbols

* restrict parameter passing to no use memory

* emit BXNS and BLXNS instructions for returns from non-secure entry
  functions, and non-secure function calls, respectively

* emit code to save/restore secure floating-point state around calls
  to non-secure functions

* emit code to save/restore non-secure floating-pointy state upon
  entry to non-secure entry function, and return to non-secure state

* emit code to clobber registers not used for arguments and returns

* when switching to no-secure state

Patch by Momchil Velikov, Bradley Smith, Javed Absar, David Green,
possibly others.

Differential Revision: https://reviews.llvm.org/D76518
The file was modifiedllvm/lib/Target/ARM/ARMRegisterInfo.td
The file was modifiedllvm/lib/Target/ARM/ARMFastISel.cpp
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was addedllvm/test/CodeGen/ARM/cmse.ll
The file was addedllvm/test/CodeGen/ARM/cmse-clear.ll
The file was addedllvm/test/CodeGen/ARM/cmse-clear-float-hard2.ll
The file was addedllvm/test/CodeGen/ARM/cmse-clear-float-bigend.mir
The file was modifiedllvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
The file was addedllvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
The file was addedllvm/test/CodeGen/ARM/cmse-expand-bxns-ret.mir
The file was addedllvm/test/CodeGen/ARM/cmse-clear-float-mve.ll
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was addedllvm/test/CodeGen/ARM/cmse-clrm-it-block.ll
The file was modifiedllvm/lib/Target/ARM/Thumb1FrameLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMMachineFunctionInfo.h
The file was addedllvm/test/CodeGen/ARM/cmse-clear-float.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb.td
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.cpp
Commit 235fb7dc24b1cf7034dfc76bb853ffb4ac5dec5d by Matthew.Arsenault
AMDGPU/OpenCL: Accept -nostdlib in place of -nogpulib

-nogpulib makes sense when there is a host (where -nostdlib would
apply) and offload target. Accept nostdlib when there is no offload
target as an alias.
The file was addedclang/test/Driver/rocm-detect.hip
The file was modifiedclang/test/Driver/rocm-not-found.cl
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
Commit 54a335a2f60b0f7bb85d01780bb6bbf653b1f399 by rnk
[COFF] Move type merging to TpiSource::mergeDebugT virtual method

This paves the way to doing more things in parallel, and allows us to
order type sources in dependency order. PDBs and PCH objects have to be
loaded before object files which use them.

This is a rebase of the unapplied remaining changes in
https://reviews.llvm.org/D59226. I found it very challenging to rebase
this across the LLD variable name style change. I recall there was a
tool for that, but I didn't take the time to use it.

Reviewers: aganea, akhuang

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79672
The file was modifiedlld/COFF/TypeMerger.h
The file was modifiedlld/COFF/PDB.cpp
The file was modifiedlld/COFF/Driver.h
The file was modifiedlld/test/COFF/precomp-link.test
The file was modifiedlld/COFF/DebugTypes.h
The file was modifiedlld/COFF/Driver.cpp
The file was modifiedlld/COFF/InputFiles.cpp
The file was modifiedlld/COFF/DebugTypes.cpp
The file was modifiedlld/COFF/InputFiles.h
Commit d2a26ad0dc2bd8e17f08cdef5af186de5657eaff by peter
hwasan: Collect ring buffer statistics and include in dev note.

These statistics are intended to help us tune the scudo MTE
implementation.

Differential Revision: https://reviews.llvm.org/D79913
The file was modifiedcompiler-rt/lib/hwasan/hwasan_report.cpp
Commit 10b49315faa6338eaf52bb782e7c53644ad17dab by Alex Lorenz
[test] NFC, add missing declarations and include to test files to avoid 'implicit-function-declaration' diagnostics in the tests
The file was modifiedcompiler-rt/test/profile/Inputs/instrprof-gcov-__gcov_flush-multiple.c
The file was modifiedcompiler-rt/test/profile/Inputs/instrprof-gcov-__gcov_flush-multiple.c.gcov
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/darwin-avoid-spinlock.m
The file was modifiedcompiler-rt/test/profile/instrprof-value-prof.c
Commit acb6f1ae096e8262fb30a267e9f40dea62432b26 by llvm-dev
TargetLowering.cpp - remove non-constant EXTRACT_SUBVECTOR/INSERT_SUBVECTOR handling. NFC.

Now that D79814 has landed, we can assume that subvector ops use constant, in-range indices.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 2b0b9b1148c205dfd73c70d195f51ef9895e2307 by craig.topper
[X86] Fix a regression caused by moving combineLoopMAddPattern to IR

When I moved combineLoopMAddPattern to an IR pass. I didn't match the behavior of canReduceVMulWidth that was used in the SelectionDAG version. canReduceVMulWidth just calls computeSignBits and assumes a truncate is always profitable. The version I put in IR just looks for constants and zext/sext. Though I neglected to check the number of bits in input of the zext/sext.

This patch adds a check for the number of input bits to the sext/zext. And it adds a special case for add/sub with zext/sext inputs which can be handled by combineTruncatedArithmetic. Match the original SelectionDAG behavior appears to be a regression in some cases if the truncate isn't removed and becomes pack and permq. So enabling only this specific case is the conservative approach.

Differential Revision: https://reviews.llvm.org/D79909
The file was modifiedllvm/lib/Target/X86/X86PartialReduction.cpp
The file was modifiedllvm/test/CodeGen/X86/madd.ll
Commit f5a79713b612376baae54cb47c8ec87b14f4b9b3 by rnk
[LLD] Fix precomp-link.test

I had a stale directory at %t, so the test passed locally, but not
remotely. Skip the %t directory altogether.
The file was modifiedlld/test/COFF/precomp-link.test