SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [AArch64] Precommit tests for D77316 (details)
  2. [VectorCombine] add reduction-like patterns; NFC (details)
  3. [ARM] Patterns for VQSHRN (details)
  4. [InstCombine] Clean up alignment handling (NFC) (details)
  5. [PhaseOrdering] add vector reduction tests; NFC (details)
  6. [VectorCombine] forward walk through instructions to improve chaining of transforms (details)
Commit 9a05547954a571cbe118d9cc9c0cb8a849afa1fd by jay.foad
[AArch64] Precommit tests for D77316
The file was modifiedllvm/test/CodeGen/AArch64/shift-amount-mod.ll
Commit 6211830fbabd439a41f4c83d3c8ede92019cde3f by spatel
[VectorCombine] add reduction-like patterns; NFC

These are based on tests originally included in:
D79078
The file was modifiedllvm/test/Transforms/VectorCombine/X86/extract-binop.ll
Commit 2123bb843e4baa699f435aca8f438d8888cf78ba by david.green
[ARM] Patterns for VQSHRN

Given a VQMOVN(VSHR), we can fold that into a VQSHRN simply enough using
a few tablegen patterns.

Differential Revision: https://reviews.llvm.org/D77720
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqshrn.ll
Commit 604f44977bd780c5d56b8129a9469faf7a3fcf4d by nikita.ppv
[InstCombine] Clean up alignment handling (NFC)

Now that load/store alignment is required, we can simplify code
in some places.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
Commit 43017ceb7841c7a0700e5401e79c2f1a28caec5e by spatel
[PhaseOrdering] add vector reduction tests; NFC

These are based on tests originally included in:
D79078
The file was addedllvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
Commit 81e9ede3a2db32487c15dc20d5d0be6392fb62bc by spatel
[VectorCombine] forward walk through instructions to improve chaining of transforms

This is split off from D79799 - where I was proposing to fully iterate
over a function until there are no more transforms. I suspect we are
still going to want to do something like that eventually.

But we can achieve the same gains much more efficiently on the current
set of regression tests just by reversing the order that we visit the
instructions.

This may also reduce the motivation for D79078, but we are still not
getting the optimal pattern for a reduction.
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
The file was modifiedllvm/test/Transforms/VectorCombine/X86/insert-binop.ll
The file was modifiedllvm/test/Transforms/VectorCombine/X86/extract-binop.ll