Started 1 mo 6 days ago
Took 1 hr 11 min on green-dragon-06

Success Build #21995 (Jan 22, 2021 10:18:15 PM)

Changes

Git (git http://labmaster3.local/git/llvm-zorg.git)

  1. Update branch names from master -> main (detail)

Git (git http://labmaster3.local/git/llvm-project.git)

  1. [NFC][libc++] Update the implementation status. (detail)
  2. [mlir][Linalg] Extend tile+fuse to work on Linalg operation on tensors. (detail)
  3. Add more explicit assert for failures (detail)
  4. [libc++] Bring back mach_absolute_time implementation of steady_clock (detail)
  5. [SimplifyLibCalls] Skip unused calls in sincos transform (detail)
  6. Remove obsolete TODOs (detail)
  7. [mlir][OpFormatGen] Add support for anchoring optional groups with types (detail)
  8. [CodeGen] Use getCharWidth() more consistently in CGRecordLowering. NFC (detail)
  9. [CGExpr] Use getCharWidth() more consistently in CCGExprConstant. NFC (detail)
  10. [libc++] Introduce __bits (detail)
  11. [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0 (detail)
  12. [Tests] Add willreturn to libcalls in some tests (detail)
  13. [RISCV] Rename pcnt->cpop to match 0.93 bitmanip spec. (detail)
  14. [RISCV] Remove addiwu, addwu, subwu, subuw, clmulw, clmulrw, clmulhw to match 0.93 bitmanip spec. (detail)
  15. [RISCV] Swap encodings of max and minu to match 0.93 bitmanip spec. (detail)
  16. [RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93 bitmanip spec. (detail)
  17. [RISCV] Add Zba feature and move add.uw and slli.uw to it. (detail)
  18. [RISCV] Add SH*ADD(.UW) instructions to Zba extension based on 0.93 bitmanip spec. (detail)
  19. [RISCV] Move Shift Ones instructions from Zbb to Zbp to match 0.93 bitmanip spec. (detail)
  20. [RISCV] Rename Zbs instructions to start with just 'b' instead of 'sb' to match 0.93 bitmanip spec. (detail)
  21. [RISCV] Modify add.uw patterns to put the masked operand in rs1 to match 0.93 bitmanip spec. (detail)
  22. [RISCV] Change zext.w to be an alias of add.uw rd, rs1, x0 instead of pack. (detail)
  23. [RISCV] Move pack instructions to Zbp extension only. (detail)
  24. [RISCV] Add zext.h instruction to Zbb. (detail)
  25. [RISCV] Add support for rev8 and orc.b to Zbb. (detail)
  26. [RISCV] Add xperm.* instructions to Zbp extension. (detail)
  27. [RISCV] Update B extension version to 0.93. (detail)
  28. [mlir][Linalg] Disable fusion of tensor_reshape op by expansion when unit-dims are involved (detail)
  29. [InstSimplify] Add willreturn to more libcall tests (NFC) (detail)
  30. [Analysis] Support AIX vec_malloc routines (detail)
  31. [RISCV] Add isel patterns for SH*ADD(.UW) (detail)
  32. [Inline] Precommit tests for dead calls and willreturn. (detail)
  33. [gn build] Port 622eaa4a4cea (detail)
  34. [lld-macho] Ignore -lto_library (detail)
  35. [RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted in RV32. (detail)
  36. [GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method (detail)
  37. [VFS] Fix inconsistencies between relative paths and fallthrough. (detail)
  38. [NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): fix instruction name preservation (detail)
  39. [NFC][SimplifyCFG] fold-branch-to-common-dest.ll: reduce complexity of @pr48450* test (detail)
  40. [NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): move instruction cloning to after CFG update (detail)
  41. [SimplifyCFG] FoldBranchToCommonDest(): re-lift restrictions on liveout uses of bonus instructions (detail)
  42. Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method" (detail)
  43. Revert "[AArch64][GlobalISel] Implement widenScalar for signed overflow" (detail)
  44. Revert "[AArch64][GlobalISel] Make G_USUBO legal and select it." (detail)
  45. [Matrix] Propagate shape information through fneg (detail)
  46. [mlir][Linalg] Make Fill operation work on tensors. (detail)
  47. [RISCV] Add more cmov isel patterns to handle seteq/ne with a small non-zero immediate. (detail)
  48. [RGT][ADT] Remove test assertion that will not be executed (detail)
  49. [lldb] FixFileSystem::GetExternalPath for VFS API change (detail)
  50. [RGT] Don't use EXPECT* macros in a subprocess that exits by signalling (detail)
  51. [RGT][TextAPI] Remove a zero-trip loop and the assertions within it (detail)
  52. [CodeComplete] Add ranged for loops code pattern. (detail)
  53. PR47682: Merge the DeclContext of a merged FunctionDecl before we inherit (detail)
  54. Change materializeFrameBaseRegister() to return register (detail)
  55. [AMDGPU] Fix FP materialization/resolve with flat scratch (detail)
  56. Change static buffer to be BSS instead of DATA in HandlePacket_qSpeedTest (detail)
  57. [libomptarget] Build cuda plugin without cuda installed locally (detail)
  58. ADT: Use 'using' to inherit assign and append in SmallString (detail)
  59. [LoopDeletion] Handle inner loops w/untaken backedges (detail)
  60. [RISCV] Implement vloxseg/vluxseg intrinsics. (detail)
  61. [RISCV] Add RV32 test cases for vluxseg. (detail)
  62. [RISCV] Add RV64 test cases for vluxseg. (detail)
  63. [RISCV] Add RV32 test cases for vloxseg. (detail)
  64. [RISCV] Add RV64 test cases for vloxseg. (detail)
  65. [RISCV] Implement vsoxseg/vsuxseg intrinsics. (detail)
  66. [RISCV] Add RV32 test cases for vsuxseg. (detail)
  67. [RISCV] Add RV64 test cases for vsuxseg. (detail)
  68. [RISCV] Add RV32 test cases for vsoxseg. (detail)
  69. [RISCV] Add RV64 test cases for vsoxseg. (detail)
  70. [OpenMP] Remove unnecessary pointer checks in a few locations (detail)
  71. [InstCombine] remove incompatible attribute when simplifying some lib calls (detail)
  72. Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it." (detail)
  73. [ELF][test] Add a test about --exclude-libs applying to version symbols (detail)
  74. [test] Add -mtriple (detail)
  75. [LSan] Introduce a callback mechanism to allow adding data reachable from ThreadContexts to the frontier. (detail)
  76. [TargetLowering] Use isOneConstant to simplify some code. NFC (detail)
  77. [Coroutine] Improve coro-elide-musttail.ll test (detail)
  78. [PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets (detail)

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 17969
originally caused by:

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 17970
originally caused by:

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 17971
originally caused by:

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 17972
originally caused by:

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 17973
originally caused by:

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 17974
originally caused by:

Started by upstream project Clang Stage 1: cmake, RA, using system compiler build number 17975
originally caused by:

This run spent:

  • 10 hr waiting;
  • 1 hr 11 min build duration;
  • 12 hr total from scheduled to completion.
Revision: 018984ae6833fae107aa9c502ab5536efceca88e
  • origin/main
Revision: f8837bec132947731bb9d2c87316e598d825396d
  • refs/remotes/origin/main
LLVM/Clang Warnings: 0 warnings.
  • No warnings since build 21,986.
  • Still 69 days before reaching the previous zero warnings highscore.