FailedChanges

Summary

  1. gn build: Merge r371488
  2. Revert "clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM" This reverts commit r371484: this broke sanitizer-x86_64-linux-fast bot.
  3. [X86] Add broadcast load unfolding support for VCMPPS/PD.
  4. [X86] Add broadcast load unfold tests for VCMPPS/PD.
  5. gn build: Merge r371484
  6. clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM This patch contains the basic functionality for reporting potentially incorrect usage of __builtin_expect() by comparing the developer's annotation against a collected PGO profile. A more detailed proposal and discussion appears on the CFE-dev mailing list (http://lists.llvm.org/pipermail/cfe-dev/2019-July/062971.html) and a prototype of the initial frontend changes appear here in D65300 We revised the work in D65300 by moving the misexpect check into the LLVM backend, and adding support for IR and sampling based profiles, in addition to frontend instrumentation. We add new misexpect metadata tags to those instructions directly influenced by the llvm.expect intrinsic (branch, switch, and select) when lowering the intrinsics. The misexpect metadata contains information about the expected target of the intrinsic so that we can check against the correct PGO counter when emitting diagnostics, and the compiler's values for the LikelyBranchWeight and UnlikelyBranchWeight. We use these branch weight values to determine when to emit the diagnostic to the user. A future patch should address the comment at the top of LowerExpectIntrisic.cpp to hoist the LikelyBranchWeight and UnlikelyBranchWeight values into a shared space that can be accessed outside of the LowerExpectIntrinsic pass. Once that is done, the misexpect metadata can be updated to be smaller. In the long term, it is possible to reconstruct portions of the misexpect metadata from the existing profile data. However, we have avoided this to keep the code simple, and because some kind of metadata tag will be required to identify which branch/switch/select instructions are influenced by the use of llvm.expect Patch By: paulkirth Differential Revision: https://reviews.llvm.org/D66324
  7. [PowerPC][NFC] Update test assertions using update_llc_test_checks.py Summary: This patch is made due to https://reviews.llvm.org/rL371289 where typo fixes failed. Differential Revision: https://reviews.llvm.org/D67317
  8. Revert [git-llvm] Do not reinvent `@{upstream}` This reverts r371290 (git commit 7faffd544b16f851a632d6b8f93e3c8485ff34bb) The change wasnt NFC and broke some users' workflow. Reverting while figuring out the best alternative to move forward.
  9. gn build: Merge r371466
  10. Remove REQUIRES:shell from tests that pass for me on Windows I see in the history for some of these tests REQUIRES:shell was used as a way to disable tests on Windows because they are flaky there. I tried not to re-enable such tests, but it's possible that I missed some and this will re-enable flaky tests on Windows. If so, we should disable them with UNSUPPORTED:system-windows and add a comment that they are flaky there. So far as I can tell, the lit internal shell is capable of running all of these tests, and we shouldn't use REQUIRES:shell as a proxy for Windows.
  11. gn build: (manually) merge r371429
  12. Fix crash mangling an explicit lambda non-type template parameter pack that is not a pack expansion.
  13. [llvm][ADT][NFC] Add test for makeArrayRef(std::array)
  14. Remove some unnecessary REQUIRES: shell lines This means these tests will run on Windows. Replace one with UNSUPPORTED: system-windows.
  15. AMDGPU/GlobalISel: Fix insert point when lowering fminnum/fmaxnum
  16. Fix incorrect demangling of call operator of lambda with explicit template parameters due to registering template parameters twice.
  17. PR43242: Fix crash when typo-correcting to an operator() that should not have been visible.
  18. AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67374
  19. [Windows] Replace TrapUnreachable with an int3 insertion pass This is an alternative to D66980, which was reverted. Instead of inserting a pseudo instruction that optionally expands to nothing, add a pass that inserts int3 when appropriate after basic block layout. Reviewers: hans Differential Revision: https://reviews.llvm.org/D67201
  20. [GlobalISel]: Fix a bug where we could dereference None getConstantVRegVal returns None when dealing with constants > 64 bits. Don't assume we always have a value in GISelKnownBits.
  21. Simplify demangler rule for lambda-expressions to match discussion on cxx-abi list.
  22. LangRef: mention MSan's problem with speculative conditional branches. Summary: This short blurb aims to disallow optimizations like we had to revert (under MSan) in https://reviews.llvm.org/D21165 https://bugs.llvm.org/show_bug.cgi?id=28054 https://reviews.llvm.org/D67205 Reviewers: vitalybuka, efriedma Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67244
  23. [Tests] Fix a typo in a test
  24. [Tests] Precommit test case for D67372
  25. Fix MSVC "not all control paths return a value" warning. NFCI.
  26. [UBSan] Follow up fix for r371442. Reviewers: vitalybuka, hctim, Dor1s Reviewed By: Dor1s Subscribers: delcypher, #sanitizers, llvm-commits Tags: #llvm, #sanitizers Differential Revision: https://reviews.llvm.org/D67371
  27. [LoopVectorize] Leverage speculation safety to avoid masked.loads If we're vectorizing a load in a predicated block, check to see if the load can be speculated rather than predicated. This allows us to generate a normal vector load instead of a masked.load. To do so, we must prove that all bytes accessed on any iteration of the original loop are dereferenceable, and that all loads (across all iterations) are properly aligned. This is equivelent to proving that hoisting the load into the loop header in the original scalar loop is safe. Note: There are a couple of code motion todos in the code. My intention is to wait about a day - to be sure this sticks - and then perform the NFC motion without furthe review. Differential Revision: https://reviews.llvm.org/D66688
  28. [analyzer] NFC: Simplify bug report equivalence classes to not be ilists. Use a vector of unique pointers instead. Differential Revision: https://reviews.llvm.org/D67024
  29. [analyzer] NFC: Introduce sub-classes for path-sensitive and basic reports. Checkers are now required to specify whether they're creating a path-sensitive report or a path-insensitive report by constructing an object of the respective type. This makes BugReporter more independent from the rest of the Static Analyzer because all Analyzer-specific code is now in sub-classes. Differential Revision: https://reviews.llvm.org/D66572
  30. [Tests] Add anyextend tests for unordered atomics Motivated by work on changing our representation of unordered atomics in SelectionDAG, but as an aside, all our lowerings for O3 are terrible. Even the ones which ignore the atomicity.
  31. Relax opcode checks in test to check for only a number instead of a specific number.
  32. [TSan] Add AnnotateIgnoreReadsBegin declaration to tsan/test.h Declare the family of AnnotateIgnore[Read,Write][Begin,End] TSan annotations in compiler-rt/test/tsan/test.h so that we don't have to declare them separately in every test that needs them. Replace usages. Leave usages that explicitly test the annotation mechanism: thread_end_with_ignore.cpp thread_end_with_ignore3.cpp
  33. [SDAG] Add a isSimple cover functon to MemSDNode, just as we have in IR/MI [NFC] Uses are in reviews D66322 and D66318. Submitted separately to control rebuild times.
  34. [Driver] Handle default case in refactored addOpenMPRuntime Summary: Appease failed builds (due to -Werror and -Wswitch) where OMPRT_Unknown is not handled in the switch statement (even though it's handled by the early exit). This fixes -Wswitch triggered by r371442. Reviewers: srhines, danalbert, jdoerfert Subscribers: guansong, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67364
  35. [Remarks] Fix warning for uint8_t < 0 comparison http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/19109/steps/build-stage1-compiler/logs/stdio
  36. [UBSan] Do not overwrite the default print_summary sanitizer option. Summary: This option is true by default in sanitizer common. The default false value was added a while ago without any reasoning in https://github.com/llvm-mirror/compiler-rt/commit/524e934112a593ac081bf2b05aa0d60a67987f05 so, presumably it's safe to remove for consistency. Reviewers: hctim, samsonov, morehouse, kcc, vitalybuka Reviewed By: hctim, samsonov, vitalybuka Subscribers: delcypher, #sanitizers, llvm-commits, kcc Tags: #llvm, #sanitizers Differential Revision: https://reviews.llvm.org/D67193
  37. Introduce infrastructure for an incremental port of SelectionDAG atomic load/store handling This is the first patch in a large sequence. The eventual goal is to have unordered atomic loads and stores - and possibly ordered atomics as well - handled through the normal ISEL codepaths for loads and stores. Today, there handled w/instances of AtomicSDNodes. The result of which is that all transforms need to be duplicated to work for unordered atomics. The benefit of the current design is that it's harder to introduce a silent miscompile by adding an transform which forgets about atomicity. See the thread on llvm-dev titled "FYI: proposed changes to atomic load/store in SelectionDAG" for further context. Note that this patch is NFC unless the experimental flag is set. The basic strategy I plan on taking is: introduce infrastructure and a flag for testing (this patch) Audit uses of isVolatile, and apply isAtomic conservatively* piecemeal conservative* update generic code and x86 backedge code in individual reviews w/tests for cases which didn't check volatile, but can be found with inspection flip the flag at the end (with minimal diffs) Work through todo list identified in (2) and (3) exposing performance ops (*) The "conservative" bit here is aimed at minimizing the number of diffs involved in (4). Ideally, there'd be none. In practice, getting it down to something reviewable by a human is the actual goal. Note that there are (currently) no paths which produce LoadSDNode or StoreSDNode with atomic MMOs, so we don't need to worry about preserving any behaviour there. We've taken a very similar strategy twice before with success - once at IR level, and once at the MI level (post ISEL). Differential Revision: https://reviews.llvm.org/D66309
  38. AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR v2s16 Handle it the same way as G_BUILD_VECTOR_TRUNC. Arguably only G_BUILD_VECTOR_TRUNC should be legal for this, but G_BUILD_VECTOR will probably be more convenient in most cases.
  39. [TSan] Add interceptors for mach_vm_[de]allocate I verified that the test is red without the interceptors. rdar://40334350 Reviewed By: kubamracek, vitalybuka Differential Revision: https://reviews.llvm.org/D66616
  40. AMDGPU: Make VReg_1 size be 1 This was getting chosen as the preferred 32-bit register class based on how TableGen selects subregister classes.
  41. [Driver] Add -static-openmp driver option Summary: For Gnu, FreeBSD and NetBSD, this option forces linking with the static OpenMP host runtime (similar to -static-libgcc and -static-libstdcxx). Android's NDK will start the shared OpenMP runtime in addition to the static libomp. In this scenario, the linker will prefer to use the shared library by default. Add this option to enable linking with the static libomp. Reviewers: Hahnfeld, danalbert, srhines, joerg, jdoerfert Subscribers: guansong, cfe-commits Tags: #clang Fixes https://github.com/android-ndk/ndk/issues/1028 Differential Revision: https://reviews.llvm.org/D67200
  42. AMDGPU/GlobalISel: Select llvm.amdgcn.class Also fixes missing SubtargetPredicate on f16 class instructions.
  43. AMDGPU/GlobalISel: Select fmed3
  44. [IfConversion] Correctly handle cases where analyzeBranch fails. If analyzeBranch fails, on some targets, the out parameters point to some blocks in the function. But we can't use that information, so make sure to clear it out. (In some places in IfConversion, we assume that any block with a TrueBB is analyzable.) The change to the testcase makes it trigger a bug on builds without this fix: IfConvertDiamond tries to perform a followup "merge" operation, which isn't legal, and we somehow end up with a branch to a deleted MBB. I'm not sure how this doesn't crash the compiler. Differential Revision: https://reviews.llvm.org/D67306
  45. [x86] add test for false dependency with minsize (PR43239); NFC
  46. AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics This enables GlobalISel to handle various intrinsics. The custom node pattern will be ignored, and the intrinsic will work. This will also allow SelectionDAG to directly select the intrinsics, but as they are all custom lowered to the nodes, this ends up leaving dead code in the table. Eventually either GlobalISel should add the equivalent of custom nodes equivalent, or intrinsics should be directly used. These each have different tradeoffs. There are a few more to handle, but these are easy to handle ones. Some others fail for other reasons.
  47. [SelectionDAG] Remove ISD::FP_ROUND_INREG I don't think anything in tree creates this node. So all of this code appears to be dead. Code coverage agrees http://lab.llvm.org:8080/coverage/coverage-reports/llvm/coverage/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp.html Differential Revision: https://reviews.llvm.org/D67312
  48. [X86] Allow _MM_FROUND_CUR_DIRECTION and _MM_FROUND_NO_EXC to be used together on instructions that only support SAE and not embedded rounding. Current for SAE instructions we only allow _MM_FROUND_CUR_DIRECTION(bit 2) or _MM_FROUND_NO_EXC(bit 3) to be used as the immediate passed to the inrinsics. But these instructions don't perform rounding so _MM_FROUND_CUR_DIRECTION is just sort of a default placeholder when you don't want to suppress exceptions. Using _MM_FROUND_NO_EXC by itself is really bit equivalent to (_MM_FROUND_NO_EXC | _MM_FROUND_TO_NEAREST_INT) since _MM_FROUND_TO_NEAREST_INT is 0. Since we aren't rounding on these instructions we should also accept (_MM_FROUND_CUR_DIRECTION | _MM_FROUND_NO_EXC) as equivalent to (_MM_FROUND_NO_EXC). icc allows this, but gcc does not. Differential Revision: https://reviews.llvm.org/D67289
  49. [Remarks] Add parser for bitstream remarks The bitstream remark serializer landed in r367372. This adds a bitstream remark parser that parser bitstream remark files to llvm::remarks::Remark objects through the RemarkParser interface. A few interesting things to point out: * There are parsing helpers to parse the different types of blocks * The main parsing helper allows us to parse remark metadata and open an external file containing the encoded remarks * This adds a dependency from the Remarks library to the BitstreamReader library * The testing strategy is to create a remark entry through YAML, parse it, serialize it to bitstream, parse that back and compare the objects. * There are close to no tests for malformed bitstream remarks, due to the lack of textual format for the bitstream format. * This adds a new C API for parsing bitstream remarks: LLVMRemarkParserCreateBitstream. * This bumps the REMARKS_API_VERSION to 1. Differential Revision: https://reviews.llvm.org/D67134
  50. [mips] Fix decoding of microMIPS JALX instruction microMIPS jump and link exchange instruction stores a target in a 26-bits field. Despite other microMIPS JAL instructions these bits are target address shifted right 2 bits [1]. The patch fixes the JALX instruction decoding and uses 2-bit shift. [1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set Differential Revision: https://reviews.llvm.org/D67320
  51. AMDGPU: Move MnemonicAlias out of instruction def hierarchy Unfortunately MnemonicAlias defines a "Predicates" field just like an instruction or pattern, with a somewhat different interpretation. This ends up overriding the intended Predicates set by PredicateControl on the pseudoinstruction defintions with an empty list. This allowed incorrectly selecting instructions that should have been rejected due to the SubtargetPredicate from patterns on the instruction definition. This does remove the divergent predicate from the 64-bit shift patterns, which were already not used for the 32-bit shift, so I'm not sure what the point was. This also removes a second, redundant copy of the 64-bit divergent patterns.
  52. [SLP] add test for over-vectorization (PR33958); NFC
  53. [GlobalISel][AArch64] Handle tail calls with non-void return types Just return once you emit the call, which is exactly what SelectionDAG does in this situation. Update call-translator-tail-call.ll. Also update dllimport.ll to show that we tail call here in GISel again. Add -verify-machineinstrs to the GISel line too, to defend against verifier failures. Differential revision: https://reviews.llvm.org/D67282
  54. AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE Handle the simple case that lowers to a constant.
  55. AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR_TRUNC Treat this as legal on gfx9 since it can use S_PACK_* instructions for this. This isn't used by anything yet. The same will probably apply to 16-bit G_BUILD_VECTOR without the trunc.
  56. [clangd] Attempt to fix failing Windows buildbots. The assertion is failing on Windows, probably because path separator is different. For the failure see: http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/28072/steps/test/logs/stdio
  57. Revert "[MachineCopyPropagation] Remove redundant copies after TailDup via machine-cp" This reverts commit 371359. I'm suspecting a miscompile, I posted a reproducer to https://reviews.llvm.org/D65267.
  58. [yaml2obj] Simplify p_filesz/p_memsz computing This fixes a bug as well. When "FileSize:" (p_filesz) is specified and different from the actual value, the following code probably should not use PHeader.p_filesz: if (SHeader->sh_offset == PHeader.p_offset + PHeader.p_filesz) PHeader.p_memsz += SHeader->sh_size; Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D67256
  59. [ARM] Fix loads and stores for predicate vectors These predicate vectors can usually be loaded and stored with a single instruction, a VSTR_P0. However this instruction will store the entire P0 predicate, 16 bits, zeroextended to 32bits. Each lane of the the v4i1/v8i1/v16i1 representing 4/2/1 bits. As far as I understand, when llvm says "store this v4i1", it really does need to store 4 bits (or 8, that being the size of a byte, with this bottom 4 as the interesting bits). For example a bitcast from a v8i1 to a i8 is defined as a store followed by a load, which is how the code is expanded. So this instead lowers the v4i1/v8i1 load/store through some shuffles to get the bits into the correct positions. This, as you might imagine, is not as efficient as a single instruction. But I believe it is needed for correctness. v16i1 equally should not load/store 32bits, only storing the 16bits of data. Stack loads/stores are still using the VSTR_P0 (as can be seen by the test not changing). This is fine as they are self-consistent, it is only "externally observable loads/stores" (from our point of view) that need to be corrected. Differential revision: https://reviews.llvm.org/D67085
  60. AMDGPU/GlobalISel: Select atomic loads A new check for an explicitly atomic MMO is needed to avoid incorrectly matching pattern for non-atomic loads
  61. AMDGPU/GlobalISel: Fix RegBankSelect for unaligned, uniform constant loads
  62. Fix typo in comment noticed in D60295. NFCI.
  63. AMDGPU/GlobalISel: Fix regbankselect for uniform extloads There are no scalar extloads.
  64. AMDGPU: Remove code address space predicates Fixes 8-byte, 8-byte aligned LDS loads. 16-byte case still broken due to not be reported as legal.
  65. AMDGPU/GlobalISel: Select G_PTR_MASK
  66. AMDGPU/GlobalISel: Fix reg bank for uniform LDS loads The pointer is always a VGPR. Also fix hardcoding the pointer size to 64.
  67. [NFC] Add aacps bitfields access test
  68. AMDGPU/GlobalISel: Use known bits for selection
  69. [clangd] Use pre-populated mappings for standard symbols Summary: This takes ~5% of time when running clangd unit tests. To achieve this, move mapping of system includes out of CanonicalIncludes and into a separate class Reviewers: sammccall, hokein Reviewed By: sammccall Subscribers: MaskRay, jkorous, arphaman, kadircet, jfb, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67172
  70. AMDGPU/GlobalISel: Legalize wavefrontsize intrinsic
  71. AMDGPU/GlobalISel: Try generated matcher before add/sub code This will allow optimization patterns which fold adds away to work.
  72. [ARM] Remove some spurious MVE reduction instructions. The family of 'dual-accumulating' vector multiply-add instructions (VMLADAV, VMLALDAV and VRMLALDAVH) can all operate on both signed and unsigned integer types, and they all have an 'exchange' variant (with an X in the name) that modifies which pairs of vector lanes in the two inputs are multiplied together. But there's a clause in the spec that says that the X variants //don't// operate on unsigned integer types, only signed. You can have X, or unsigned, or neither, but not both. We didn't notice that clause when we implemented the MC support for these instructions, so LLVM believes that things like VMLADAVX.U8 do exist, contradicting the spec. Here I fix that by conditioning them out in Tablegen. In order to do that, I've reversed the nesting order of the Tablegen multiclasses for those instructions. Previously, the innermost multiclass generated the X and not-X variants, and the one outside that generated the A and not-A variants. Now X is done by the outer multiclass, which allows me to bypass that one when I only want the two not-X variants. Changing the multiclass nesting order also changes the names of the instruction ids unless I make a special effort not to. I decided that while I was changing them anyway I'd make them look nicer; so now the instructions have names like MVE_VMLADAVs32 or MVE_VMLADAVaxs32, instead of cumbersome _noacc_noexch suffixes. The corresponding multiply-subtract instructions are unaffected. Those don't accept unsigned types at all, either in the spec or in LLVM. Reviewers: ostannard, dmgreen Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67214
  73. AMDGPU/GlobalISel: Remove dead patterns
  74. Merge note_ovl_builtin_candidate diagnostics; NFC There is no difference between the unary and binary case, so merge them.
  75. [clangd] Add a new highlighting kind for typedefs Summary: We still attempt to highlight them as underlying types, but fallback to the generic 'typedef' highlighting kind if the underlying type is too complicated. Reviewers: hokein Reviewed By: hokein Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67290
  76. [NFC][InstCombine] Fixup test i added in rL371352.
  77. compiler-rt: use fp_t instead of long double, for consistency Most builtins accepting or returning long double use the fp_t typedef. Change the remaining few cases to do so. Differential Revision: https://reviews.llvm.org/D35034
  78. [DFAPacketizer] Reapply: Track resources for packetized instructions Reapply with fix to reduce resources required by the compiler - use unsigned[2] instead of std::pair. This causes clang and gcc to compile the generated file multiple times faster, and hopefully will reduce the resource requirements on Visual Studio also. This fix is a little ugly but it's clearly the same issue the previous author of DFAPacketizer faced (the previous tables use unsigned[2] rather uglily too). This patch allows the DFAPacketizer to be queried after a packet is formed to work out which resources were allocated to the packetized instructions. This is particularly important for targets that do their own bundle packing - it's not sufficient to know simply that instructions can share a packet; which slots are used is also required for encoding. This extends the emitter to emit a side-table containing resource usage diffs for each state transition. The packetizer maintains a set of all possible resource states in its current state. After packetization is complete, all remaining resource states are possible packetization strategies. The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default (most uses of the packetizer like MachinePipeliner don't care and don't need the extra maintained state). Differential Revision: https://reviews.llvm.org/D66936
  79. [Inliner][NFC] Make test less brittle. Summary: This tests inlining size thresholds, but relies on the output of running the full O2 pipeline, making it brittle against changes in unrelated passes. Only run the inlining pass and set thresholds on the test RUN line instead. Found while investigating D60318. Reviewers: RKSimon, qcolombet Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67349
  80. [clang-tidy] Fix bug in bugprone-use-after-move check Summary: The bugprone-use-after-move check exhibits false positives for certain uses of the C++17 if/switch init statements. These false positives are caused by a bug in the ExprSequence calculations. This revision adds tests for the false positives and fixes the corresponding sequence calculation. Reviewers: gribozavr Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67292
  81. [ARM][MVE] VCTP instruction selection Add codegen support for vctp{8,16,32}. Differential Revision: https://reviews.llvm.org/D67344
  82. [clang-doc] sys::fs::F_None -> OF_None. NFC F_None, F_Text and F_Append are kept for compatibility.
  83. Revert rL371198 from llvm/trunk: [DFAPacketizer] Track resources for packetized instructions This patch allows the DFAPacketizer to be queried after a packet is formed to work out which resources were allocated to the packetized instructions. This is particularly important for targets that do their own bundle packing - it's not sufficient to know simply that instructions can share a packet; which slots are used is also required for encoding. This extends the emitter to emit a side-table containing resource usage diffs for each state transition. The packetizer maintains a set of all possible resource states in its current state. After packetization is complete, all remaining resource states are possible packetization strategies. The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default (most uses of the packetizer like MachinePipeliner don't care and don't need the extra maintained state). Differential Revision: https://reviews.llvm.org/D66936 ........ Reverted as this is causing "compiler out of heap space" errors on MSVC 2017/19 NDEBUG builds
  84. [clangd] Support multifile edits as output of Tweaks Summary: First patch for propogating multifile changes from tweak outputs to LSP WorkspaceEdits. Uses SM to convert tooling::Replacements to TextEdits. Errors out if there are any inconsistencies between the draft version and the version generated the edits. Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66637
  85. [clangd] Update clangd-vscode docs to be more user-focused. Summary: Relegate "updating the extension" docs to a separate file. Reviewers: hokein, kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67092
  86. [AArch64][SVE] Implement abs and neg intrinsics Summary: This patch implements two arithmetic intrinsics: * int_aarch64_sve_abs * int_aarch64_sve_neg testing the support for scalable vector types in intrinsics added in D65930. Reviewed By: greened Differential Revision: https://reviews.llvm.org/D65931
  87. [ARM] Prevent generating NEON stack accesses under MVE. We should not be generating Neon stack loads/stores even for these large registers. No test here because my understanding is we will only generate these QQPR regs for intrinsics and VLDn's. The tests will follow once those are available. Differential revision: https://reviews.llvm.org/D67169
  88. GlobalISel: fix unused warnings in release builds.
  89. GlobalISel: add combiner to form indexed loads. Loosely based on DAGCombiner version, but this part is slightly simpler in GlobalIsel because all address calculation is performed by G_GEP. That makes the inc/dec distinction moot so there's just pre/post to think about. No targets can handle it yet so testing is via a special flag that overrides target hooks.
  90. [yaml2obj] - Fix BB after r371380 Just a fix for an input file name.
  91. [lib/ObjectYAML] - Improve and cleanup error reporting in ELFState<ELFT> class. The aim of this patch is to refactor how we handle and report error. I suggest to use the same approach we use in LLD: delayed error reporting. For that I introduced 'HasError' flag which triggers when we report an error. Now we do not exit instantly on any error. The benefits are: 1) There are no more 'exit(1)' calls in the library code. 2) Code was simplified significantly in a few places. 3) It is now possible to print multiple errors instead of only one. Also, I changed the messages to be lower case and removed a full stop. Differential revision: https://reviews.llvm.org/D67182
  92. [clangd] Highlight typedefs to template parameters as template parameters Summary: Template parameters were handled outside `addType`, this led to lack of highlightings for typedefs to template types. This was never desirable, we want to highlight our typedefs as their underlying type. Note that typedefs to more complicated types, like pointers and references are still not highlighted. Original patch by Johan Vikström. Reviewers: hokein, jvikstrom Reviewed By: hokein Subscribers: nridge, javed.absar, kristof.beyls, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66516
  93. [clangd] Replace HighlightingKind::NumKinds with LastKind. NFC Summary: The latter simplifies the client code by avoiding the need to handle it as a separate case statement. Reviewers: hokein Reviewed By: hokein Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67277
  94. [ARM][MVE] Decoding of uqrshl and sqrshl accepts unpredictable encodings Specify the Unpredictable bits, and return softfails when appropriate. Patch by Mark Murray! Differential revision: https://reviews.llvm.org/D66939
  95. [clangd] Improve output of semantic highlighting tests in case of failures Summary: Instead of matching lists of highlightings, we annotate input code with resulting highlightings and diff it against the expected annotated input. In case of failures, this produces much nicer output in form of text-based diffs. Reviewers: hokein Reviewed By: hokein Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67274
  96. [ARM][ParallelDSP] Fix for sext input The incoming accumulator value can be discovered through a sext, in which case there will be a mismatch between the input and the result. So sign extend the accumulator input if we're performing a 64-bit mac. Differential Revision: https://reviews.llvm.org/D67220
  97. [SystemZ] NFC: use clearRegisterDeads() in SystemZElimCompare.cpp This is simpler than using findRegisterDefOperandIdx() + setIsDead(). Review: Ulrich Weigand.
  98. [X86] Add broadcast load unfolding support for vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
  99. [X86] Add broadcast load unfolding tests for vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
Revision 371489 by nico:
gn build: Merge r371488
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn (diff)llvm.src/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Revision 371488 by phosek:
Revert "clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM"

This reverts commit r371484: this broke sanitizer-x86_64-linux-fast bot.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/DiagnosticFrontendKinds.td (diff)clang.src/include/clang/Basic/DiagnosticFrontendKinds.td
The file was modified/cfe/trunk/include/clang/Basic/DiagnosticGroups.td (diff)clang.src/include/clang/Basic/DiagnosticGroups.td
The file was modified/cfe/trunk/lib/CodeGen/CodeGenAction.cpp (diff)clang.src/lib/CodeGen/CodeGenAction.cpp
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The file was removed/cfe/trunk/test/Profile/Inputs/misexpect-branch-nonconst-expect-arg.proftextclang.src/test/Profile/Inputs/misexpect-branch-nonconst-expect-arg.proftext
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The file was removed/cfe/trunk/test/Profile/misexpect-switch.cclang.src/test/Profile/misexpect-switch.c
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The file was modified/llvm/trunk/include/llvm/IR/FixedMetadataKinds.def (diff)llvm.src/include/llvm/IR/FixedMetadataKinds.def
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Revision 371487 by ctopper:
[X86] Add broadcast load unfolding support for VCMPPS/PD.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86InstrFoldTables.cpp (diff)llvm.src/lib/Target/X86/X86InstrFoldTables.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/avx512-broadcast-unfold.ll (diff)llvm.src/test/CodeGen/X86/avx512-broadcast-unfold.ll
Revision 371486 by ctopper:
[X86] Add broadcast load unfold tests for VCMPPS/PD.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/avx512-broadcast-unfold.ll (diff)llvm.src/test/CodeGen/X86/avx512-broadcast-unfold.ll
Revision 371485 by nico:
gn build: Merge r371484
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn (diff)llvm.src/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Revision 371484 by phosek:
clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM

This patch contains the basic functionality for reporting potentially
incorrect usage of __builtin_expect() by comparing the developer's
annotation against a collected PGO profile. A more detailed proposal and
discussion appears on the CFE-dev mailing list
(http://lists.llvm.org/pipermail/cfe-dev/2019-July/062971.html) and a
prototype of the initial frontend changes appear here in D65300

We revised the work in D65300 by moving the misexpect check into the
LLVM backend, and adding support for IR and sampling based profiles, in
addition to frontend instrumentation.

We add new misexpect metadata tags to those instructions directly
influenced by the llvm.expect intrinsic (branch, switch, and select)
when lowering the intrinsics. The misexpect metadata contains
information about the expected target of the intrinsic so that we can
check against the correct PGO counter when emitting diagnostics, and the
compiler's values for the LikelyBranchWeight and UnlikelyBranchWeight.
We use these branch weight values to determine when to emit the
diagnostic to the user.

A future patch should address the comment at the top of
LowerExpectIntrisic.cpp to hoist the LikelyBranchWeight and
UnlikelyBranchWeight values into a shared space that can be accessed
outside of the LowerExpectIntrinsic pass. Once that is done, the
misexpect metadata can be updated to be smaller.

In the long term, it is possible to reconstruct portions of the
misexpect metadata from the existing profile data. However, we have
avoided this to keep the code simple, and because some kind of metadata
tag will be required to identify which branch/switch/select instructions
are influenced by the use of llvm.expect

Patch By: paulkirth
Differential Revision: https://reviews.llvm.org/D66324
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/DiagnosticFrontendKinds.td (diff)clang.src/include/clang/Basic/DiagnosticFrontendKinds.td
The file was modified/cfe/trunk/include/clang/Basic/DiagnosticGroups.td (diff)clang.src/include/clang/Basic/DiagnosticGroups.td
The file was modified/cfe/trunk/lib/CodeGen/CodeGenAction.cpp (diff)clang.src/lib/CodeGen/CodeGenAction.cpp
The file was modified/cfe/trunk/lib/Frontend/CompilerInvocation.cpp (diff)clang.src/lib/Frontend/CompilerInvocation.cpp
The file was added/cfe/trunk/test/Profile/Inputs/misexpect-branch-nonconst-expect-arg.proftextclang.src/test/Profile/Inputs/misexpect-branch-nonconst-expect-arg.proftext
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The file was added/cfe/trunk/test/Profile/misexpect-branch-nonconst-expected-val.cclang.src/test/Profile/misexpect-branch-nonconst-expected-val.c
The file was added/cfe/trunk/test/Profile/misexpect-branch-unpredictable.cclang.src/test/Profile/misexpect-branch-unpredictable.c
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The file was added/cfe/trunk/test/Profile/misexpect-switch-only-default-case.cclang.src/test/Profile/misexpect-switch-only-default-case.c
The file was added/cfe/trunk/test/Profile/misexpect-switch.cclang.src/test/Profile/misexpect-switch.c
The file was modified/llvm/trunk/include/llvm/IR/DiagnosticInfo.h (diff)llvm.src/include/llvm/IR/DiagnosticInfo.h
The file was modified/llvm/trunk/include/llvm/IR/FixedMetadataKinds.def (diff)llvm.src/include/llvm/IR/FixedMetadataKinds.def
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The file was added/llvm/trunk/include/llvm/Transforms/Utils/MisExpect.hllvm.src/include/llvm/Transforms/Utils/MisExpect.h
The file was modified/llvm/trunk/lib/IR/DiagnosticInfo.cpp (diff)llvm.src/lib/IR/DiagnosticInfo.cpp
The file was modified/llvm/trunk/lib/IR/MDBuilder.cpp (diff)llvm.src/lib/IR/MDBuilder.cpp
The file was modified/llvm/trunk/lib/Transforms/IPO/SampleProfile.cpp (diff)llvm.src/lib/Transforms/IPO/SampleProfile.cpp
The file was modified/llvm/trunk/lib/Transforms/Instrumentation/PGOInstrumentation.cpp (diff)llvm.src/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
The file was modified/llvm/trunk/lib/Transforms/Scalar/LowerExpectIntrinsic.cpp (diff)llvm.src/lib/Transforms/Scalar/LowerExpectIntrinsic.cpp
The file was modified/llvm/trunk/lib/Transforms/Utils/CMakeLists.txt (diff)llvm.src/lib/Transforms/Utils/CMakeLists.txt
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The file was modified/llvm/trunk/test/ThinLTO/X86/lazyload_metadata.ll (diff)llvm.src/test/ThinLTO/X86/lazyload_metadata.ll
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Revision 371483 by lkail:
[PowerPC][NFC] Update test assertions using update_llc_test_checks.py

Summary:
This patch is made due to https://reviews.llvm.org/rL371289 where typo
fixes failed.

Differential Revision: https://reviews.llvm.org/D67317
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/PowerPC/store-combine.ll (diff)llvm.src/test/CodeGen/PowerPC/store-combine.ll
Revision 371480 by Mehdi Amini:
Revert [git-llvm] Do not reinvent `@{upstream}`

This reverts r371290 (git commit 7faffd544b16f851a632d6b8f93e3c8485ff34bb)

The change wasnt NFC and broke some users' workflow. Reverting while figuring
out the best alternative to move forward.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/git-svn/git-llvm (diff)llvm.src/utils/git-svn/git-llvm
Revision 371479 by nico:
gn build: Merge r371466
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn (diff)llvm.src/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Revision 371478 by rnk:
Remove REQUIRES:shell from tests that pass for me on Windows

I see in the history for some of these tests REQUIRES:shell was used as
a way to disable tests on Windows because they are flaky there. I tried
not to re-enable such tests, but it's possible that I missed some and
this will re-enable flaky tests on Windows. If so, we should disable
them with UNSUPPORTED:system-windows and add a comment that they are
flaky there. So far as I can tell, the lit internal shell is capable of
running all of these tests, and we shouldn't use REQUIRES:shell as a
proxy for Windows.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/test/Analysis/crash-trace.c (diff)clang.src/test/Analysis/crash-trace.c
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The file was modified/cfe/trunk/test/OpenMP/taskloop_lastprivate_codegen.cpp (diff)clang.src/test/OpenMP/taskloop_lastprivate_codegen.cpp
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The file was modified/cfe/trunk/test/OpenMP/taskloop_simd_firstprivate_codegen.cpp (diff)clang.src/test/OpenMP/taskloop_simd_firstprivate_codegen.cpp
The file was modified/cfe/trunk/test/OpenMP/taskloop_simd_lastprivate_codegen.cpp (diff)clang.src/test/OpenMP/taskloop_simd_lastprivate_codegen.cpp
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The file was modified/cfe/trunk/test/Parser/crash-report.c (diff)clang.src/test/Parser/crash-report.c
Revision 371477 by nico:
gn build: (manually) merge r371429
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The file was modified/llvm/trunk/utils/gn/secondary/llvm/lib/Remarks/BUILD.gn (diff)llvm.src/utils/gn/secondary/llvm/lib/Remarks/BUILD.gn
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Revision 371476 by rsmith:
Fix crash mangling an explicit lambda non-type template parameter pack
that is not a pack expansion.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/AST/ItaniumMangle.cpp (diff)clang.src/lib/AST/ItaniumMangle.cpp
The file was modified/cfe/trunk/test/CodeGenCXX/mangle-lambda-explicit-template-params.cpp (diff)clang.src/test/CodeGenCXX/mangle-lambda-explicit-template-params.cpp
Revision 371475 by Jan Korous:
[llvm][ADT][NFC] Add test for makeArrayRef(std::array)
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/unittests/ADT/ArrayRefTest.cpp (diff)llvm.src/unittests/ADT/ArrayRefTest.cpp
Revision 371473 by rnk:
Remove some unnecessary REQUIRES: shell lines

This means these tests will run on Windows. Replace one with
UNSUPPORTED: system-windows.
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The file was modified/llvm/trunk/test/Linker/datalayout.ll (diff)llvm.src/test/Linker/datalayout.ll
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The file was modified/llvm/trunk/test/tools/llvm-cov/copy_block_helper.m (diff)llvm.src/test/tools/llvm-cov/copy_block_helper.m
The file was modified/llvm/trunk/test/tools/llvm-cov/cov-comdat.test (diff)llvm.src/test/tools/llvm-cov/cov-comdat.test
The file was modified/llvm/trunk/test/tools/llvm-cov/gcov47_compatibility.cpp (diff)llvm.src/test/tools/llvm-cov/gcov47_compatibility.cpp
The file was modified/llvm/trunk/test/tools/llvm-cov/range_based_for.cpp (diff)llvm.src/test/tools/llvm-cov/range_based_for.cpp
The file was modified/llvm/trunk/test/tools/llvm-dwp/X86/dwos_list_from_exec_simple.test (diff)llvm.src/test/tools/llvm-dwp/X86/dwos_list_from_exec_simple.test
Revision 371471 by arsenm:
AMDGPU/GlobalISel: Fix insert point when lowering fminnum/fmaxnum
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The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
Revision 371469 by rsmith:
Fix incorrect demangling of call operator of lambda with explicit
template parameters due to registering template parameters twice.
Change TypePath in RepositoryPath in Workspace
The file was modified/libcxxabi/trunk/src/demangle/ItaniumDemangle.h (diff)N/A
The file was modified/libcxxabi/trunk/test/test_demangle.pass.cpp (diff)N/A
The file was modified/llvm/trunk/include/llvm/Demangle/ItaniumDemangle.h (diff)llvm.src/include/llvm/Demangle/ItaniumDemangle.h
Revision 371468 by rsmith:
PR43242: Fix crash when typo-correcting to an operator() that should not
have been visible.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/Sema/SemaExpr.cpp (diff)clang.src/lib/Sema/SemaExpr.cpp
The file was modified/cfe/trunk/test/SemaCXX/lambda-expressions.cpp (diff)clang.src/test/SemaCXX/lambda-expressions.cpp
Revision 371467 by kerbowa:
AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67374
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPUCallLowering.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
Revision 371466 by rnk:
[Windows] Replace TrapUnreachable with an int3 insertion pass

This is an alternative to D66980, which was reverted. Instead of
inserting a pseudo instruction that optionally expands to nothing, add a
pass that inserts int3 when appropriate after basic block layout.

Reviewers: hans

Differential Revision: https://reviews.llvm.org/D67201
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/CMakeLists.txt (diff)llvm.src/lib/Target/X86/CMakeLists.txt
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The file was modified/llvm/trunk/test/CodeGen/X86/funclet-layout.ll (diff)llvm.src/test/CodeGen/X86/funclet-layout.ll
The file was added/llvm/trunk/test/CodeGen/X86/noreturn-call-win64.llllvm.src/test/CodeGen/X86/noreturn-call-win64.ll
The file was modified/llvm/trunk/test/CodeGen/X86/pr24374.ll (diff)llvm.src/test/CodeGen/X86/pr24374.ll
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The file was modified/llvm/trunk/test/CodeGen/X86/win64_call_epi.ll (diff)llvm.src/test/CodeGen/X86/win64_call_epi.ll
The file was modified/llvm/trunk/test/CodeGen/X86/win64_eh.ll (diff)llvm.src/test/CodeGen/X86/win64_eh.ll
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The file was modified/llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll (diff)llvm.src/test/DebugInfo/COFF/local-variable-gap.ll
Revision 371465 by aditya_nandakumar:
[GlobalISel]: Fix a bug where we could dereference None

getConstantVRegVal returns None when dealing with constants > 64 bits.
Don't assume we always have a value in GISelKnownBits.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/GISelKnownBits.cpp (diff)llvm.src/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Revision 371462 by rsmith:
Simplify demangler rule for lambda-expressions to match discussion on
cxx-abi list.
Change TypePath in RepositoryPath in Workspace
The file was modified/libcxxabi/trunk/src/demangle/ItaniumDemangle.h (diff)N/A
The file was modified/libcxxabi/trunk/test/test_demangle.pass.cpp (diff)N/A
The file was modified/llvm/trunk/include/llvm/Demangle/ItaniumDemangle.h (diff)llvm.src/include/llvm/Demangle/ItaniumDemangle.h
Revision 371461 by eugenis:
LangRef: mention MSan's problem with speculative conditional branches.

Summary:
This short blurb aims to disallow optimizations like we had to revert
(under MSan) in
  https://reviews.llvm.org/D21165
  https://bugs.llvm.org/show_bug.cgi?id=28054
  https://reviews.llvm.org/D67205

Reviewers: vitalybuka, efriedma

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67244
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/docs/LangRef.rst (diff)llvm.src/docs/LangRef.rst
Revision 371456 by reames:
[Tests] Fix a typo in a test
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/LoopVectorize/X86/load-deref-pred.ll (diff)llvm.src/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
Revision 371455 by reames:
[Tests] Precommit test case for D67372
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/LoopVectorize/X86/load-deref-pred.ll (diff)llvm.src/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
Revision 371454 by rksimon:
Fix MSVC "not all control paths return a value" warning. NFCI.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Remarks/BitstreamRemarkParser.cpp (diff)llvm.src/lib/Remarks/BitstreamRemarkParser.cpp
Revision 371453 by dor1s:
[UBSan] Follow up fix for r371442.

Reviewers: vitalybuka, hctim, Dor1s

Reviewed By: Dor1s

Subscribers: delcypher, #sanitizers, llvm-commits

Tags: #llvm, #sanitizers

Differential Revision: https://reviews.llvm.org/D67371
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/test/sanitizer_common/TestCases/Posix/fpe.cpp (diff)compiler-rt.src/test/sanitizer_common/TestCases/Posix/fpe.cpp
Revision 371452 by reames:
[LoopVectorize] Leverage speculation safety to avoid masked.loads

If we're vectorizing a load in a predicated block, check to see if the load can be speculated rather than predicated.  This allows us to generate a normal vector load instead of a masked.load.

To do so, we must prove that all bytes accessed on any iteration of the original loop are dereferenceable, and that all loads (across all iterations) are properly aligned.  This is equivelent to proving that hoisting the load into the loop header in the original scalar loop is safe.

Note: There are a couple of code motion todos in the code.  My intention is to wait about a day - to be sure this sticks - and then perform the NFC motion without furthe review.

Differential Revision: https://reviews.llvm.org/D66688
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp (diff)llvm.src/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modified/llvm/trunk/test/Transforms/LoopVectorize/X86/load-deref-pred.ll (diff)llvm.src/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
The file was modified/llvm/trunk/test/Transforms/LoopVectorize/hoist-loads.ll (diff)llvm.src/test/Transforms/LoopVectorize/hoist-loads.ll
Revision 371451 by dergachev:
[analyzer] NFC: Simplify bug report equivalence classes to not be ilists.

Use a vector of unique pointers instead.

Differential Revision: https://reviews.llvm.org/D67024
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h (diff)clang.src/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h
The file was modified/cfe/trunk/lib/StaticAnalyzer/Core/BugReporter.cpp (diff)clang.src/lib/StaticAnalyzer/Core/BugReporter.cpp
The file was modified/cfe/trunk/lib/StaticAnalyzer/Core/ExprEngine.cpp (diff)clang.src/lib/StaticAnalyzer/Core/ExprEngine.cpp
Revision 371450 by dergachev:
[analyzer] NFC: Introduce sub-classes for path-sensitive and basic reports.

Checkers are now required to specify whether they're creating a
path-sensitive report or a path-insensitive report by constructing an
object of the respective type.

This makes BugReporter more independent from the rest of the Static Analyzer
because all Analyzer-specific code is now in sub-classes.

Differential Revision: https://reviews.llvm.org/D66572
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h (diff)clang.src/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h
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The file was modified/cfe/trunk/lib/StaticAnalyzer/Checkers/ValistChecker.cpp (diff)clang.src/lib/StaticAnalyzer/Checkers/ValistChecker.cpp
The file was modified/cfe/trunk/lib/StaticAnalyzer/Checkers/VforkChecker.cpp (diff)clang.src/lib/StaticAnalyzer/Checkers/VforkChecker.cpp
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Revision 371449 by reames:
[Tests] Add anyextend tests for unordered atomics

Motivated by work on changing our representation of unordered atomics in SelectionDAG, but as an aside, all our lowerings for O3 are terrible.  Even the ones which ignore the atomicity.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/atomic-unordered.ll (diff)llvm.src/test/CodeGen/X86/atomic-unordered.ll
Revision 371447 by dyung:
Relax opcode checks in test to check for only a number instead of a specific number.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir (diff)llvm.src/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Revision 371446 by yln:
[TSan] Add AnnotateIgnoreReadsBegin declaration to tsan/test.h

Declare the family of AnnotateIgnore[Read,Write][Begin,End] TSan
annotations in compiler-rt/test/tsan/test.h so that we don't have to
declare them separately in every test that needs them.  Replace usages.

Leave usages that explicitly test the annotation mechanism:
  thread_end_with_ignore.cpp
  thread_end_with_ignore3.cpp
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/test/tsan/Darwin/mach_vm_allocate.c (diff)compiler-rt.src/test/tsan/Darwin/mach_vm_allocate.c
The file was modified/compiler-rt/trunk/test/tsan/ignore_free.cpp (diff)compiler-rt.src/test/tsan/ignore_free.cpp
The file was modified/compiler-rt/trunk/test/tsan/ignore_malloc.cpp (diff)compiler-rt.src/test/tsan/ignore_malloc.cpp
The file was modified/compiler-rt/trunk/test/tsan/ignore_race.cpp (diff)compiler-rt.src/test/tsan/ignore_race.cpp
The file was modified/compiler-rt/trunk/test/tsan/ignored-interceptors-mmap.cpp (diff)compiler-rt.src/test/tsan/ignored-interceptors-mmap.cpp
The file was modified/compiler-rt/trunk/test/tsan/test.h (diff)compiler-rt.src/test/tsan/test.h
Revision 371445 by reames:
[SDAG] Add a isSimple cover functon to MemSDNode, just as we have in IR/MI [NFC]

Uses are in reviews D66322 and D66318.  Submitted separately to control rebuild times.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (diff)llvm.src/include/llvm/CodeGen/SelectionDAGNodes.h
Revision 371444 by pirama:
[Driver] Handle default case in refactored addOpenMPRuntime

Summary:
Appease failed builds (due to -Werror and -Wswitch) where OMPRT_Unknown
is not handled in the switch statement (even though it's handled by the
early exit).

This fixes -Wswitch triggered by r371442.

Reviewers: srhines, danalbert, jdoerfert

Subscribers: guansong, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67364
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (diff)clang.src/lib/Driver/ToolChains/CommonArgs.cpp
Revision 371443 by thegameg:
[Remarks] Fix warning for uint8_t < 0 comparison

http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/19109/steps/build-stage1-compiler/logs/stdio
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Remarks/BitstreamRemarkParser.cpp (diff)llvm.src/lib/Remarks/BitstreamRemarkParser.cpp
Revision 371442 by dor1s:
[UBSan] Do not overwrite the default print_summary sanitizer option.

Summary:
This option is true by default in sanitizer common. The default
false value was added a while ago without any reasoning in
https://github.com/llvm-mirror/compiler-rt/commit/524e934112a593ac081bf2b05aa0d60a67987f05

so, presumably it's safe to remove for consistency.

Reviewers: hctim, samsonov, morehouse, kcc, vitalybuka

Reviewed By: hctim, samsonov, vitalybuka

Subscribers: delcypher, #sanitizers, llvm-commits, kcc

Tags: #llvm, #sanitizers

Differential Revision: https://reviews.llvm.org/D67193
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/lib/ubsan/ubsan_flags.cpp (diff)compiler-rt.src/lib/ubsan/ubsan_flags.cpp
The file was added/compiler-rt/trunk/test/ubsan/TestCases/Misc/print_summary.ccompiler-rt.src/test/ubsan/TestCases/Misc/print_summary.c
Revision 371441 by reames:
Introduce infrastructure for an incremental port of SelectionDAG atomic load/store handling

This is the first patch in a large sequence. The eventual goal is to have unordered atomic loads and stores - and possibly ordered atomics as well - handled through the normal ISEL codepaths for loads and stores. Today, there handled w/instances of AtomicSDNodes. The result of which is that all transforms need to be duplicated to work for unordered atomics. The benefit of the current design is that it's harder to introduce a silent miscompile by adding an transform which forgets about atomicity.  See the thread on llvm-dev titled "FYI: proposed changes to atomic load/store in SelectionDAG" for further context.

Note that this patch is NFC unless the experimental flag is set.

The basic strategy I plan on taking is:

    introduce infrastructure and a flag for testing (this patch)
    Audit uses of isVolatile, and apply isAtomic conservatively*
    piecemeal conservative* update generic code and x86 backedge code in individual reviews w/tests for cases which didn't check volatile, but can be found with inspection
    flip the flag at the end (with minimal diffs)
    Work through todo list identified in (2) and (3) exposing performance ops

(*) The "conservative" bit here is aimed at minimizing the number of diffs involved in (4). Ideally, there'd be none. In practice, getting it down to something reviewable by a human is the actual goal. Note that there are (currently) no paths which produce LoadSDNode or StoreSDNode with atomic MMOs, so we don't need to worry about preserving any behaviour there.

We've taken a very similar strategy twice before with success - once at IR level, and once at the MI level (post ISEL).

Differential Revision: https://reviews.llvm.org/D66309
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (diff)llvm.src/include/llvm/CodeGen/SelectionDAGNodes.h
The file was modified/llvm/trunk/include/llvm/CodeGen/TargetLowering.h (diff)llvm.src/include/llvm/CodeGen/TargetLowering.h
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.h (diff)llvm.src/lib/Target/X86/X86ISelLowering.h
The file was modified/llvm/trunk/test/CodeGen/X86/atomic-unordered.ll (diff)llvm.src/test/CodeGen/X86/atomic-unordered.ll
Revision 371440 by arsenm:
AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR v2s16

Handle it the same way as G_BUILD_VECTOR_TRUNC. Arguably only
G_BUILD_VECTOR_TRUNC should be legal for this, but G_BUILD_VECTOR will
probably be more convenient in most cases.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.v2s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.v2s16.mir
Revision 371439 by yln:
[TSan] Add interceptors for mach_vm_[de]allocate

I verified that the test is red without the interceptors.

rdar://40334350

Reviewed By: kubamracek, vitalybuka

Differential Revision: https://reviews.llvm.org/D66616
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/lib/tsan/CMakeLists.txt (diff)compiler-rt.src/lib/tsan/CMakeLists.txt
The file was modified/compiler-rt/trunk/lib/tsan/rtl/tsan_interceptors.cpp (diff)compiler-rt.src/lib/tsan/rtl/tsan_interceptors.cpp
The file was added/compiler-rt/trunk/lib/tsan/rtl/tsan_interceptors_mach_vm.cppcompiler-rt.src/lib/tsan/rtl/tsan_interceptors_mach_vm.cpp
The file was modified/compiler-rt/trunk/lib/tsan/rtl/tsan_rtl.cpp (diff)compiler-rt.src/lib/tsan/rtl/tsan_rtl.cpp
The file was modified/compiler-rt/trunk/lib/tsan/rtl/tsan_rtl.h (diff)compiler-rt.src/lib/tsan/rtl/tsan_rtl.h
The file was added/compiler-rt/trunk/test/tsan/Darwin/mach_vm_allocate.ccompiler-rt.src/test/tsan/Darwin/mach_vm_allocate.c
Revision 371438 by arsenm:
AMDGPU: Make VReg_1 size be 1

This was getting chosen as the preferred 32-bit register class based
on how TableGen selects subregister classes.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/SILowerI1Copies.cpp (diff)llvm.src/lib/Target/AMDGPU/SILowerI1Copies.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.td (diff)llvm.src/lib/Target/AMDGPU/SIRegisterInfo.td
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir (diff)llvm.src/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir (diff)llvm.src/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir (diff)llvm.src/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
Revision 371437 by pirama:
[Driver] Add -static-openmp driver option

Summary:
For Gnu, FreeBSD and NetBSD, this option forces linking with the static
OpenMP host runtime (similar to -static-libgcc and -static-libstdcxx).

Android's NDK will start the shared OpenMP runtime in addition to the static
libomp.  In this scenario, the linker will prefer to use the shared library by
default.  Add this option to enable linking with the static libomp.

Reviewers: Hahnfeld, danalbert, srhines, joerg, jdoerfert

Subscribers: guansong, cfe-commits

Tags: #clang

Fixes https://github.com/android-ndk/ndk/issues/1028

Differential Revision: https://reviews.llvm.org/D67200
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Driver/Options.td (diff)clang.src/include/clang/Driver/Options.td
The file was modified/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (diff)clang.src/lib/Driver/ToolChains/CommonArgs.cpp
The file was modified/cfe/trunk/lib/Driver/ToolChains/CommonArgs.h (diff)clang.src/lib/Driver/ToolChains/CommonArgs.h
The file was modified/cfe/trunk/lib/Driver/ToolChains/FreeBSD.cpp (diff)clang.src/lib/Driver/ToolChains/FreeBSD.cpp
The file was modified/cfe/trunk/lib/Driver/ToolChains/Gnu.cpp (diff)clang.src/lib/Driver/ToolChains/Gnu.cpp
The file was modified/cfe/trunk/lib/Driver/ToolChains/NetBSD.cpp (diff)clang.src/lib/Driver/ToolChains/NetBSD.cpp
The file was modified/cfe/trunk/test/Driver/fopenmp.c (diff)clang.src/test/Driver/fopenmp.c
Revision 371436 by arsenm:
AMDGPU/GlobalISel: Select llvm.amdgcn.class

Also fixes missing SubtargetPredicate on f16 class instructions.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUGISel.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstrInfo.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/VOPCInstructions.td (diff)llvm.src/lib/Target/AMDGPU/VOPCInstructions.td
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
Revision 371435 by arsenm:
AMDGPU/GlobalISel: Select fmed3
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUGISel.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstrInfo.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
Revision 371434 by efriedma:
[IfConversion] Correctly handle cases where analyzeBranch fails.

If analyzeBranch fails, on some targets, the out parameters point to
some blocks in the function. But we can't use that information, so make
sure to clear it out.  (In some places in IfConversion, we assume that
any block with a TrueBB is analyzable.)

The change to the testcase makes it trigger a bug on builds without this
fix: IfConvertDiamond tries to perform a followup "merge" operation,
which isn't legal, and we somehow end up with a branch to a deleted MBB.
I'm not sure how this doesn't crash the compiler.

Differential Revision: https://reviews.llvm.org/D67306
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/IfConversion.cpp (diff)llvm.src/lib/CodeGen/IfConversion.cpp
The file was modified/llvm/trunk/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir (diff)llvm.src/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
Revision 371433 by spatel:
[x86] add test for false dependency with minsize (PR43239); NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/sqrt-partial.ll (diff)llvm.src/test/CodeGen/X86/sqrt-partial.ll
Revision 371432 by arsenm:
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics

This enables GlobalISel to handle various intrinsics. The custom node
pattern will be ignored, and the intrinsic will work. This will also
allow SelectionDAG to directly select the intrinsics, but as they are
all custom lowered to the nodes, this ends up leaving dead code in the
table.

Eventually either GlobalISel should add the equivalent of custom nodes
equivalent, or intrinsics should be directly used. These each have
different tradeoffs.

There are a few more to handle, but these are easy to handle
ones. Some others fail for other reasons.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstrInfo.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstrInfo.td
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
Revision 371431 by ctopper:
[SelectionDAG] Remove ISD::FP_ROUND_INREG

I don't think anything in tree creates this node. So all of this
code appears to be dead.

Code coverage agrees
http://lab.llvm.org:8080/coverage/coverage-reports/llvm/coverage/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp.html

Differential Revision: https://reviews.llvm.org/D67312
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/docs/ReleaseNotes.rst (diff)llvm.src/docs/ReleaseNotes.rst
The file was modified/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (diff)llvm.src/include/llvm/CodeGen/ISDOpcodes.h
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (diff)llvm.src/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 371430 by ctopper:
[X86] Allow _MM_FROUND_CUR_DIRECTION and _MM_FROUND_NO_EXC to be used together on instructions that only support SAE and not embedded rounding.

Current for SAE instructions we only allow _MM_FROUND_CUR_DIRECTION(bit 2) or _MM_FROUND_NO_EXC(bit 3) to be used as the immediate passed to the inrinsics. But these instructions don't perform rounding so _MM_FROUND_CUR_DIRECTION is just sort of a default placeholder when you don't want to suppress exceptions. Using _MM_FROUND_NO_EXC by itself is really bit equivalent to (_MM_FROUND_NO_EXC | _MM_FROUND_TO_NEAREST_INT) since _MM_FROUND_TO_NEAREST_INT is 0. Since we aren't rounding on these instructions we should also accept (_MM_FROUND_CUR_DIRECTION | _MM_FROUND_NO_EXC) as equivalent to (_MM_FROUND_NO_EXC). icc allows this, but gcc does not.

Differential Revision: https://reviews.llvm.org/D67289
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/Sema/SemaChecking.cpp (diff)clang.src/lib/Sema/SemaChecking.cpp
The file was modified/cfe/trunk/test/Sema/builtins-x86.c (diff)clang.src/test/Sema/builtins-x86.c
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll (diff)llvm.src/test/CodeGen/X86/avx512-intrinsics.ll
Revision 371429 by thegameg:
[Remarks] Add parser for bitstream remarks

The bitstream remark serializer landed in r367372.

This adds a bitstream remark parser that parser bitstream remark files
to llvm::remarks::Remark objects through the RemarkParser interface.

A few interesting things to point out:

* There are parsing helpers to parse the different types of blocks
* The main parsing helper allows us to parse remark metadata and open an
external file containing the encoded remarks
* This adds a dependency from the Remarks library to the BitstreamReader
library
* The testing strategy is to create a remark entry through YAML, parse
it, serialize it to bitstream, parse that back and compare the objects.
* There are close to no tests for malformed bitstream remarks, due to
the lack of textual format for the bitstream format.
* This adds a new C API for parsing bitstream remarks:
LLVMRemarkParserCreateBitstream.
* This bumps the REMARKS_API_VERSION to 1.

Differential Revision: https://reviews.llvm.org/D67134
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm-c/Remarks.h (diff)llvm.src/include/llvm-c/Remarks.h
The file was modified/llvm/trunk/include/llvm/Bitstream/BitstreamReader.h (diff)llvm.src/include/llvm/Bitstream/BitstreamReader.h
The file was added/llvm/trunk/include/llvm/Remarks/BitstreamRemarkParser.hllvm.src/include/llvm/Remarks/BitstreamRemarkParser.h
The file was added/llvm/trunk/lib/Remarks/BitstreamRemarkParser.cppllvm.src/lib/Remarks/BitstreamRemarkParser.cpp
The file was added/llvm/trunk/lib/Remarks/BitstreamRemarkParser.hllvm.src/lib/Remarks/BitstreamRemarkParser.h
The file was modified/llvm/trunk/lib/Remarks/CMakeLists.txt (diff)llvm.src/lib/Remarks/CMakeLists.txt
The file was modified/llvm/trunk/lib/Remarks/LLVMBuild.txt (diff)llvm.src/lib/Remarks/LLVMBuild.txt
The file was modified/llvm/trunk/lib/Remarks/RemarkParser.cpp (diff)llvm.src/lib/Remarks/RemarkParser.cpp
The file was modified/llvm/trunk/tools/remarks-shlib/Remarks.exports (diff)llvm.src/tools/remarks-shlib/Remarks.exports
The file was added/llvm/trunk/unittests/Remarks/BitstreamRemarksParsingTest.cppllvm.src/unittests/Remarks/BitstreamRemarksParsingTest.cpp
The file was modified/llvm/trunk/unittests/Remarks/CMakeLists.txt (diff)llvm.src/unittests/Remarks/CMakeLists.txt
Revision 371428 by atanasyan:
[mips] Fix decoding of microMIPS JALX instruction

microMIPS jump and link exchange instruction stores a target in a
26-bits field. Despite other microMIPS JAL instructions these bits
are target address shifted right 2 bits [1]. The patch fixes the
JALX instruction decoding and uses 2-bit shift.

[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set

Differential Revision: https://reviews.llvm.org/D67320
Change TypePath in RepositoryPath in Workspace
The file was modified/lld/trunk/test/ELF/mips-micro-cross-calls.s (diff)N/A
The file was modified/llvm/trunk/lib/Target/Mips/Disassembler/MipsDisassembler.cpp (diff)llvm.src/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
The file was modified/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (diff)llvm.src/lib/Target/Mips/MicroMipsInstrInfo.td
The file was modified/llvm/trunk/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt (diff)llvm.src/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt
The file was modified/llvm/trunk/test/MC/Disassembler/Mips/micromips32r3/valid.txt (diff)llvm.src/test/MC/Disassembler/Mips/micromips32r3/valid.txt
Revision 371427 by arsenm:
AMDGPU: Move MnemonicAlias out of instruction def hierarchy

Unfortunately MnemonicAlias defines a "Predicates" field just like an
instruction or pattern, with a somewhat different interpretation.

This ends up overriding the intended Predicates set by
PredicateControl on the pseudoinstruction defintions with an empty
list. This allowed incorrectly selecting instructions that should have
been rejected due to the SubtargetPredicate from patterns on the
instruction definition.

This does remove the divergent predicate from the 64-bit shift
patterns, which were already not used for the 32-bit shift, so I'm not
sure what the point was. This also removes a second, redundant copy of
the 64-bit divergent patterns.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/VOP1Instructions.td (diff)llvm.src/lib/Target/AMDGPU/VOP1Instructions.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/VOP2Instructions.td (diff)llvm.src/lib/Target/AMDGPU/VOP2Instructions.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/VOP3Instructions.td (diff)llvm.src/lib/Target/AMDGPU/VOP3Instructions.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/VOPInstructions.td (diff)llvm.src/lib/Target/AMDGPU/VOPInstructions.td
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
Revision 371426 by spatel:
[SLP] add test for over-vectorization (PR33958); NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/SLPVectorizer/X86/consecutive-access.ll (diff)llvm.src/test/Transforms/SLPVectorizer/X86/consecutive-access.ll
Revision 371425 by paquette:
[GlobalISel][AArch64] Handle tail calls with non-void return types

Just return once you emit the call, which is exactly what SelectionDAG does in
this situation.

Update call-translator-tail-call.ll.

Also update dllimport.ll to show that we tail call here in GISel again. Add
-verify-machineinstrs to the GISel line too, to defend against verifier
failures.

Differential revision: https://reviews.llvm.org/D67282
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp (diff)llvm.src/lib/Target/AArch64/AArch64CallLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll (diff)llvm.src/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
The file was modified/llvm/trunk/test/CodeGen/AArch64/dllimport.ll (diff)llvm.src/test/CodeGen/AArch64/dllimport.ll
Revision 371424 by arsenm:
AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE

Handle the simple case that lowers to a constant.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPUISelLowering.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.ll
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/lds-size.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/lds-size.ll
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
Revision 371423 by arsenm:
AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR_TRUNC

Treat this as legal on gfx9 since it can use S_PACK_* instructions for
this.

This isn't used by anything yet. The same will probably apply to
16-bit G_BUILD_VECTOR without the trunc.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector-trunc.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector-trunc.mir
Revision 371422 by ibiryukov:
[clangd] Attempt to fix failing Windows buildbots.

The assertion is failing on Windows, probably because path separator is different.

For the failure see:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/28072/steps/test/logs/stdio
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/index/CanonicalIncludes.cpp (diff)clang-tools-extra.src/clangd/index/CanonicalIncludes.cpp
Revision 371421 by gribozavr:
Revert "[MachineCopyPropagation] Remove redundant copies after TailDup via machine-cp"

This reverts commit 371359. I'm suspecting a miscompile, I posted a
reproducer to https://reviews.llvm.org/D65267.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp (diff)llvm.src/lib/CodeGen/MachineCopyPropagation.cpp
The file was modified/llvm/trunk/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll (diff)llvm.src/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll
The file was modified/llvm/trunk/test/CodeGen/X86/mul-i512.ll (diff)llvm.src/test/CodeGen/X86/mul-i512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/umulo-128-legalisation-lowering.ll (diff)llvm.src/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
Revision 371420 by maskray:
[yaml2obj] Simplify p_filesz/p_memsz computing

This fixes a bug as well. When "FileSize:" (p_filesz) is specified and
different from the actual value, the following code probably should not
use PHeader.p_filesz:

  if (SHeader->sh_offset == PHeader.p_offset + PHeader.p_filesz)
    PHeader.p_memsz += SHeader->sh_size;

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D67256
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/ObjectYAML/ELFEmitter.cpp (diff)llvm.src/lib/ObjectYAML/ELFEmitter.cpp
The file was modified/llvm/trunk/test/tools/yaml2obj/program-header-size-offset.yaml (diff)llvm.src/test/tools/yaml2obj/program-header-size-offset.yaml
Revision 371419 by dmgreen:
[ARM] Fix loads and stores for predicate vectors

These predicate vectors can usually be loaded and stored with a single
instruction, a VSTR_P0. However this instruction will store the entire P0
predicate, 16 bits, zeroextended to 32bits. Each lane of the the
v4i1/v8i1/v16i1 representing 4/2/1 bits.

As far as I understand, when llvm says "store this v4i1", it really does need
to store 4 bits (or 8, that being the size of a byte, with this bottom 4 as the
interesting bits). For example a bitcast from a v8i1 to a i8 is defined as a
store followed by a load, which is how the code is expanded.

So this instead lowers the v4i1/v8i1 load/store through some shuffles to get
the bits into the correct positions. This, as you might imagine, is not as
efficient as a single instruction. But I believe it is needed for correctness.
v16i1 equally should not load/store 32bits, only storing the 16bits of data.
Stack loads/stores are still using the VSTR_P0 (as can be seen by the test not
changing). This is fine as they are self-consistent, it is only "externally
observable loads/stores" (from our point of view) that need to be corrected.

Differential revision: https://reviews.llvm.org/D67085
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (diff)llvm.src/lib/Target/ARM/ARMISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/ARM/ARMInstrMVE.td (diff)llvm.src/lib/Target/ARM/ARMInstrMVE.td
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-masked-ldst.ll (diff)llvm.src/test/CodeGen/Thumb2/mve-masked-ldst.ll
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-masked-load.ll (diff)llvm.src/test/CodeGen/Thumb2/mve-masked-load.ll
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-masked-store.ll (diff)llvm.src/test/CodeGen/Thumb2/mve-masked-store.ll
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-pred-bitcast.ll (diff)llvm.src/test/CodeGen/Thumb2/mve-pred-bitcast.ll
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-pred-loadstore.ll (diff)llvm.src/test/CodeGen/Thumb2/mve-pred-loadstore.ll
Revision 371418 by arsenm:
AMDGPU/GlobalISel: Select atomic loads

A new check for an explicitly atomic MMO is needed to avoid
incorrectly matching pattern for non-atomic loads
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Target/GlobalISel/SelectionDAGCompat.td (diff)llvm.src/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUGISel.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td (diff)llvm.src/lib/Target/AMDGPU/SIInstrInfo.td
The file was modified/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll (diff)llvm.src/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
The file was modified/llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp (diff)llvm.src/utils/TableGen/GlobalISelEmitter.cpp
Revision 371416 by arsenm:
AMDGPU/GlobalISel: Fix RegBankSelect for unaligned, uniform constant loads
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
Revision 371415 by rksimon:
Fix typo in comment noticed in D60295. NFCI.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/SwitchLoweringUtils.h (diff)llvm.src/include/llvm/CodeGen/SwitchLoweringUtils.h
Revision 371414 by arsenm:
AMDGPU/GlobalISel: Fix regbankselect for uniform extloads

There are no scalar extloads.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
Revision 371413 by arsenm:
AMDGPU: Remove code address space predicates

Fixes 8-byte, 8-byte aligned LDS loads. 16-byte case still broken due
to not be reported as legal.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUGISel.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/DSInstructions.td (diff)llvm.src/lib/Target/AMDGPU/DSInstructions.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td (diff)llvm.src/lib/Target/AMDGPU/SIInstrInfo.td
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir
The file was modified/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (diff)llvm.src/utils/TableGen/CodeGenDAGPatterns.cpp
Revision 371412 by arsenm:
AMDGPU/GlobalISel: Select G_PTR_MASK
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mir
Revision 371411 by arsenm:
AMDGPU/GlobalISel: Fix reg bank for uniform LDS loads

The pointer is always a VGPR. Also fix hardcoding the pointer size to
64.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
Revision 371410 by dnsampaio:
[NFC] Add aacps bitfields access test
Change TypePath in RepositoryPath in Workspace
The file was added/cfe/trunk/test/CodeGen/aapcs-bitfield.cclang.src/test/CodeGen/aapcs-bitfield.c
Revision 371409 by arsenm:
AMDGPU/GlobalISel: Use known bits for selection
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
Revision 371408 by ibiryukov:
[clangd] Use pre-populated mappings for standard symbols

Summary:
This takes ~5% of time when running clangd unit tests.

To achieve this, move mapping of system includes out of CanonicalIncludes
and into a separate class

Reviewers: sammccall, hokein

Reviewed By: sammccall

Subscribers: MaskRay, jkorous, arphaman, kadircet, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67172
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/ParsedAST.cpp (diff)clang-tools-extra.src/clangd/ParsedAST.cpp
The file was modified/clang-tools-extra/trunk/clangd/Preamble.cpp (diff)clang-tools-extra.src/clangd/Preamble.cpp
The file was modified/clang-tools-extra/trunk/clangd/index/CanonicalIncludes.cpp (diff)clang-tools-extra.src/clangd/index/CanonicalIncludes.cpp
The file was modified/clang-tools-extra/trunk/clangd/index/CanonicalIncludes.h (diff)clang-tools-extra.src/clangd/index/CanonicalIncludes.h
The file was modified/clang-tools-extra/trunk/clangd/index/IndexAction.cpp (diff)clang-tools-extra.src/clangd/index/IndexAction.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/CanonicalIncludesTests.cpp (diff)clang-tools-extra.src/clangd/unittests/CanonicalIncludesTests.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/SymbolCollectorTests.cpp (diff)clang-tools-extra.src/clangd/unittests/SymbolCollectorTests.cpp
Revision 371407 by arsenm:
AMDGPU/GlobalISel: Legalize wavefrontsize intrinsic
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir
Revision 371406 by arsenm:
AMDGPU/GlobalISel: Try generated matcher before add/sub code

This will allow optimization patterns which fold adds away to work.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Revision 371405 by statham:
[ARM] Remove some spurious MVE reduction instructions.

The family of 'dual-accumulating' vector multiply-add instructions
(VMLADAV, VMLALDAV and VRMLALDAVH) can all operate on both signed and
unsigned integer types, and they all have an 'exchange' variant (with
an X in the name) that modifies which pairs of vector lanes in the two
inputs are multiplied together. But there's a clause in the spec that
says that the X variants //don't// operate on unsigned integer types,
only signed. You can have X, or unsigned, or neither, but not both.

We didn't notice that clause when we implemented the MC support for
these instructions, so LLVM believes that things like VMLADAVX.U8 do
exist, contradicting the spec. Here I fix that by conditioning them
out in Tablegen.

In order to do that, I've reversed the nesting order of the Tablegen
multiclasses for those instructions. Previously, the innermost
multiclass generated the X and not-X variants, and the one outside
that generated the A and not-A variants. Now X is done by the outer
multiclass, which allows me to bypass that one when I only want the
two not-X variants.

Changing the multiclass nesting order also changes the names of the
instruction ids unless I make a special effort not to. I decided that
while I was changing them anyway I'd make them look nicer; so now the
instructions have names like MVE_VMLADAVs32 or MVE_VMLADAVaxs32,
instead of cumbersome _noacc_noexch suffixes.

The corresponding multiply-subtract instructions are unaffected. Those
don't accept unsigned types at all, either in the spec or in LLVM.

Reviewers: ostannard, dmgreen

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67214
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMInstrMVE.td (diff)llvm.src/lib/Target/ARM/ARMInstrMVE.td
The file was modified/llvm/trunk/test/MC/ARM/mve-reductions.s (diff)llvm.src/test/MC/ARM/mve-reductions.s
The file was modified/llvm/trunk/test/MC/Disassembler/ARM/mve-reductions.txt (diff)llvm.src/test/MC/Disassembler/ARM/mve-reductions.txt
Revision 371404 by arsenm:
AMDGPU/GlobalISel: Remove dead patterns
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUGISel.td (diff)llvm.src/lib/Target/AMDGPU/AMDGPUGISel.td
Revision 371403 by svenvh:
Merge note_ovl_builtin_candidate diagnostics; NFC

There is no difference between the unary and binary case, so
merge them.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td (diff)clang.src/include/clang/Basic/DiagnosticSemaKinds.td
The file was modified/cfe/trunk/lib/Sema/SemaOverload.cpp (diff)clang.src/lib/Sema/SemaOverload.cpp
Revision 371402 by ibiryukov:
[clangd] Add a new highlighting kind for typedefs

Summary:
We still attempt to highlight them as underlying types, but fallback to
the generic 'typedef' highlighting kind if the underlying type is too
complicated.

Reviewers: hokein

Reviewed By: hokein

Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67290
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/SemanticHighlighting.cpp (diff)clang-tools-extra.src/clangd/SemanticHighlighting.cpp
The file was modified/clang-tools-extra/trunk/clangd/SemanticHighlighting.h (diff)clang-tools-extra.src/clangd/SemanticHighlighting.h
The file was modified/clang-tools-extra/trunk/clangd/test/semantic-highlighting.test (diff)clang-tools-extra.src/clangd/test/semantic-highlighting.test
The file was modified/clang-tools-extra/trunk/clangd/unittests/SemanticHighlightingTests.cpp (diff)clang-tools-extra.src/clangd/unittests/SemanticHighlightingTests.cpp
Revision 371401 by lebedevri:
[NFC][InstCombine] Fixup test i added in rL371352.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll (diff)llvm.src/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll
Revision 371400 by emaste:
compiler-rt: use fp_t instead of long double, for consistency

Most builtins accepting or returning long double use the fp_t typedef.
Change the remaining few cases to do so.

Differential Revision: https://reviews.llvm.org/D35034
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/lib/builtins/addtf3.c (diff)compiler-rt.src/lib/builtins/addtf3.c
The file was modified/compiler-rt/trunk/lib/builtins/divtf3.c (diff)compiler-rt.src/lib/builtins/divtf3.c
The file was modified/compiler-rt/trunk/lib/builtins/extenddftf2.c (diff)compiler-rt.src/lib/builtins/extenddftf2.c
The file was modified/compiler-rt/trunk/lib/builtins/extendsftf2.c (diff)compiler-rt.src/lib/builtins/extendsftf2.c
Revision 371399 by jamesm:
[DFAPacketizer] Reapply: Track resources for packetized instructions

Reapply with fix to reduce resources required by the compiler - use
unsigned[2] instead of std::pair. This causes clang and gcc to compile
the generated file multiple times faster, and hopefully will reduce
the resource requirements on Visual Studio also. This fix is a little
ugly but it's clearly the same issue the previous author of
DFAPacketizer faced (the previous tables use unsigned[2] rather uglily
too).

This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.

This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.

This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.

The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).

Differential Revision: https://reviews.llvm.org/D66936
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/DFAPacketizer.h (diff)llvm.src/include/llvm/CodeGen/DFAPacketizer.h
The file was modified/llvm/trunk/lib/CodeGen/DFAPacketizer.cpp (diff)llvm.src/lib/CodeGen/DFAPacketizer.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp (diff)llvm.src/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
The file was added/llvm/trunk/test/CodeGen/Hexagon/packetizer-resources.llllvm.src/test/CodeGen/Hexagon/packetizer-resources.ll
The file was modified/llvm/trunk/utils/TableGen/DFAPacketizerEmitter.cpp (diff)llvm.src/utils/TableGen/DFAPacketizerEmitter.cpp
Revision 371397 by courbet:
[Inliner][NFC] Make test less brittle.

Summary:
This tests inlining size thresholds, but relies on the output of running
the full O2 pipeline, making it brittle against changes in unrelated
passes.

Only run the inlining pass and set thresholds on the test RUN line
instead.

Found while investigating D60318.

Reviewers: RKSimon, qcolombet

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67349
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/Inline/inline_minisize.ll (diff)llvm.src/test/Transforms/Inline/inline_minisize.ll
Revision 371396 by ymandel:
[clang-tidy] Fix bug in bugprone-use-after-move check

Summary:
The bugprone-use-after-move check exhibits false positives for certain uses of
the C++17 if/switch init statements. These false positives are caused by a bug
in the ExprSequence calculations.

This revision adds tests for the false positives and fixes the corresponding
sequence calculation.

Reviewers: gribozavr

Subscribers: xazax.hun, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67292
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clang-tidy/utils/ExprSequence.cpp (diff)clang-tools-extra.src/clang-tidy/utils/ExprSequence.cpp
The file was modified/clang-tools-extra/trunk/test/clang-tidy/bugprone-use-after-move.cpp (diff)clang-tools-extra.src/test/clang-tidy/bugprone-use-after-move.cpp
Revision 371395 by sam_parker:
[ARM][MVE] VCTP instruction selection
   
Add codegen support for vctp{8,16,32}.

Differential Revision: https://reviews.llvm.org/D67344
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMInstrMVE.td (diff)llvm.src/lib/Target/ARM/ARMInstrMVE.td
The file was added/llvm/trunk/test/CodeGen/Thumb2/mve-vctp.llllvm.src/test/CodeGen/Thumb2/mve-vctp.ll
Revision 371394 by maskray:
[clang-doc] sys::fs::F_None -> OF_None. NFC

F_None, F_Text and F_Append are kept for compatibility.
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clang-doc/HTMLGenerator.cpp (diff)clang-tools-extra.src/clang-doc/HTMLGenerator.cpp
The file was modified/clang-tools-extra/trunk/clang-doc/tool/ClangDocMain.cpp (diff)clang-tools-extra.src/clang-doc/tool/ClangDocMain.cpp
Revision 371393 by rksimon:
Revert rL371198 from llvm/trunk: [DFAPacketizer] Track resources for packetized instructions

This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.

This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.

This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.

The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).

Differential Revision: https://reviews.llvm.org/D66936
........
Reverted as this is causing "compiler out of heap space" errors on MSVC 2017/19 NDEBUG builds
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/DFAPacketizer.h (diff)llvm.src/include/llvm/CodeGen/DFAPacketizer.h
The file was modified/llvm/trunk/lib/CodeGen/DFAPacketizer.cpp (diff)llvm.src/lib/CodeGen/DFAPacketizer.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp (diff)llvm.src/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
The file was removed/llvm/trunk/test/CodeGen/Hexagon/packetizer-resources.llllvm.src/test/CodeGen/Hexagon/packetizer-resources.ll
The file was modified/llvm/trunk/utils/TableGen/DFAPacketizerEmitter.cpp (diff)llvm.src/utils/TableGen/DFAPacketizerEmitter.cpp
Revision 371392 by kadircet:
[clangd] Support multifile edits as output of Tweaks

Summary:
First patch for propogating multifile changes from tweak outputs to LSP
WorkspaceEdits.

Uses SM to convert tooling::Replacements to TextEdits.
Errors out if there are any inconsistencies between the draft version and the
version generated the edits.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66637
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/ClangdLSPServer.cpp (diff)clang-tools-extra.src/clangd/ClangdLSPServer.cpp
The file was modified/clang-tools-extra/trunk/clangd/ClangdServer.cpp (diff)clang-tools-extra.src/clangd/ClangdServer.cpp
The file was modified/clang-tools-extra/trunk/clangd/SourceCode.cpp (diff)clang-tools-extra.src/clangd/SourceCode.cpp
The file was modified/clang-tools-extra/trunk/clangd/SourceCode.h (diff)clang-tools-extra.src/clangd/SourceCode.h
The file was modified/clang-tools-extra/trunk/clangd/refactor/Tweak.cpp (diff)clang-tools-extra.src/clangd/refactor/Tweak.cpp
The file was modified/clang-tools-extra/trunk/clangd/refactor/Tweak.h (diff)clang-tools-extra.src/clangd/refactor/Tweak.h
The file was modified/clang-tools-extra/trunk/clangd/refactor/tweaks/AnnotateHighlightings.cpp (diff)clang-tools-extra.src/clangd/refactor/tweaks/AnnotateHighlightings.cpp
The file was modified/clang-tools-extra/trunk/clangd/refactor/tweaks/ExpandAutoType.cpp (diff)clang-tools-extra.src/clangd/refactor/tweaks/ExpandAutoType.cpp
The file was modified/clang-tools-extra/trunk/clangd/refactor/tweaks/ExpandMacro.cpp (diff)clang-tools-extra.src/clangd/refactor/tweaks/ExpandMacro.cpp
The file was modified/clang-tools-extra/trunk/clangd/refactor/tweaks/ExtractFunction.cpp (diff)clang-tools-extra.src/clangd/refactor/tweaks/ExtractFunction.cpp
The file was modified/clang-tools-extra/trunk/clangd/refactor/tweaks/ExtractVariable.cpp (diff)clang-tools-extra.src/clangd/refactor/tweaks/ExtractVariable.cpp
The file was modified/clang-tools-extra/trunk/clangd/refactor/tweaks/RawStringLiteral.cpp (diff)clang-tools-extra.src/clangd/refactor/tweaks/RawStringLiteral.cpp
The file was modified/clang-tools-extra/trunk/clangd/refactor/tweaks/SwapIfBranches.cpp (diff)clang-tools-extra.src/clangd/refactor/tweaks/SwapIfBranches.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/TweakTesting.cpp (diff)clang-tools-extra.src/clangd/unittests/TweakTesting.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/TweakTests.cpp (diff)clang-tools-extra.src/clangd/unittests/TweakTests.cpp
Revision 371390 by sammccall:
[clangd] Update clangd-vscode docs to be more user-focused.

Summary: Relegate "updating the extension" docs to a separate file.

Reviewers: hokein, kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67092
Change TypePath in RepositoryPath in Workspace
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/DEVELOPING.mdclang-tools-extra.src/clangd/clients/clangd-vscode/DEVELOPING.md
The file was modified/clang-tools-extra/trunk/clangd/clients/clangd-vscode/README.md (diff)clang-tools-extra.src/clangd/clients/clangd-vscode/README.md
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assetsclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assets/complete.pngclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets/complete.png
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assets/diagnostics.pngclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets/diagnostics.png
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assets/extract.pngclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets/extract.png
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assets/format.pngclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets/format.png
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assets/include.pngclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets/include.png
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assets/symbolsearch.pngclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets/symbolsearch.png
The file was added/clang-tools-extra/trunk/clangd/clients/clangd-vscode/doc-assets/xrefs.pngclang-tools-extra.src/clangd/clients/clangd-vscode/doc-assets/xrefs.png
Revision 371388 by c-rhodes:
[AArch64][SVE] Implement abs and neg intrinsics

Summary:
This patch implements two arithmetic intrinsics:

      * int_aarch64_sve_abs
      * int_aarch64_sve_neg

testing the support for scalable vector types in intrinsics added in D65930.

Reviewed By: greened

Differential Revision: https://reviews.llvm.org/D65931
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td (diff)llvm.src/include/llvm/IR/IntrinsicsAArch64.td
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td (diff)llvm.src/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modified/llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td (diff)llvm.src/lib/Target/AArch64/SVEInstrFormats.td
The file was added/llvm/trunk/test/CodeGen/AArch64/sve-intrinsics-int-arith.llllvm.src/test/CodeGen/AArch64/sve-intrinsics-int-arith.ll
Revision 371386 by dmgreen:
[ARM] Prevent generating NEON stack accesses under MVE.

We should not be generating Neon stack loads/stores even for these large
registers.

No test here because my understanding is we will only generate these QQPR regs
for intrinsics and VLDn's. The tests will follow once those are available.

Differential revision: https://reviews.llvm.org/D67169
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (diff)llvm.src/lib/Target/ARM/ARMBaseInstrInfo.cpp
Revision 371385 by Tim Northover:
GlobalISel: fix unused warnings in release builds.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/CombinerHelper.cpp (diff)llvm.src/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Revision 371384 by Tim Northover:
GlobalISel: add combiner to form indexed loads.

Loosely based on DAGCombiner version, but this part is slightly simpler in
GlobalIsel because all address calculation is performed by G_GEP. That makes
the inc/dec distinction moot so there's just pre/post to think about.

No targets can handle it yet so testing is via a special flag that overrides
target hooks.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/GlobalISel/CombinerHelper.h (diff)llvm.src/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modified/llvm/trunk/include/llvm/CodeGen/TargetLowering.h (diff)llvm.src/include/llvm/CodeGen/TargetLowering.h
The file was modified/llvm/trunk/include/llvm/Support/TargetOpcodes.def (diff)llvm.src/include/llvm/Support/TargetOpcodes.def
The file was modified/llvm/trunk/include/llvm/Target/GenericOpcodes.td (diff)llvm.src/include/llvm/Target/GenericOpcodes.td
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/CombinerHelper.cpp (diff)llvm.src/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64.h (diff)llvm.src/lib/Target/AArch64/AArch64.h
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp (diff)llvm.src/lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (diff)llvm.src/lib/Target/AArch64/AArch64TargetMachine.cpp
The file was added/llvm/trunk/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.llllvm.src/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll
The file was modified/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll (diff)llvm.src/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
The file was modified/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir (diff)llvm.src/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Revision 371383 by grimar:
[yaml2obj] - Fix BB after r371380

Just a fix for an input file name.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/tools/yaml2obj/dynamic-symbols.yaml (diff)llvm.src/test/tools/yaml2obj/dynamic-symbols.yaml
Revision 371380 by grimar:
[lib/ObjectYAML] - Improve and cleanup error reporting in ELFState<ELFT> class.

The aim of this patch is to refactor how we handle and report error.

I suggest to use the same approach we use in LLD: delayed error reporting.
For that I introduced 'HasError' flag which triggers when we report an error.
Now we do not exit instantly on any error. The benefits are:

1) There are no more 'exit(1)' calls in the library code.
2) Code was simplified significantly in a few places.
3) It is now possible to print multiple errors instead of only one.

Also, I changed the messages to be lower case and removed a full stop.

Differential revision: https://reviews.llvm.org/D67182
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/ObjectYAML/ELFEmitter.cpp (diff)llvm.src/lib/ObjectYAML/ELFEmitter.cpp
The file was modified/llvm/trunk/test/tools/yaml2obj/duplicate-section-names.test (diff)llvm.src/test/tools/yaml2obj/duplicate-section-names.test
The file was modified/llvm/trunk/test/tools/yaml2obj/duplicate-symbol-names.test (diff)llvm.src/test/tools/yaml2obj/duplicate-symbol-names.test
The file was modified/llvm/trunk/test/tools/yaml2obj/dynamic-section-raw-content.yaml (diff)llvm.src/test/tools/yaml2obj/dynamic-section-raw-content.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/dynamic-symbols.yaml (diff)llvm.src/test/tools/yaml2obj/dynamic-symbols.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/dynsymtab-implicit-sections-size-content.yaml (diff)llvm.src/test/tools/yaml2obj/dynsymtab-implicit-sections-size-content.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/elf-comdat-broken-info.yaml (diff)llvm.src/test/tools/yaml2obj/elf-comdat-broken-info.yaml
The file was added/llvm/trunk/test/tools/yaml2obj/elf-comdat-broken-members.yamlllvm.src/test/tools/yaml2obj/elf-comdat-broken-members.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/elf-custom-null-section.yaml (diff)llvm.src/test/tools/yaml2obj/elf-custom-null-section.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/program-header.yaml (diff)llvm.src/test/tools/yaml2obj/program-header.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/reloc-sec-info.yaml (diff)llvm.src/test/tools/yaml2obj/reloc-sec-info.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/relocation-missing-symbol.yaml (diff)llvm.src/test/tools/yaml2obj/relocation-missing-symbol.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/section-link.yaml (diff)llvm.src/test/tools/yaml2obj/section-link.yaml
The file was modified/llvm/trunk/test/tools/yaml2obj/symtab-implicit-sections-size-content.yaml (diff)llvm.src/test/tools/yaml2obj/symtab-implicit-sections-size-content.yaml
Revision 371379 by ibiryukov:
[clangd] Highlight typedefs to template parameters as template parameters

Summary:
Template parameters were handled outside `addType`, this led to lack of highlightings for typedefs
to template types.

This was never desirable, we want to highlight our typedefs as their underlying type.
Note that typedefs to more complicated types, like pointers and references are still not highlighted.

Original patch by Johan Vikström.

Reviewers: hokein, jvikstrom

Reviewed By: hokein

Subscribers: nridge, javed.absar, kristof.beyls, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66516
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/SemanticHighlighting.cpp (diff)clang-tools-extra.src/clangd/SemanticHighlighting.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/SemanticHighlightingTests.cpp (diff)clang-tools-extra.src/clangd/unittests/SemanticHighlightingTests.cpp
Revision 371375 by ibiryukov:
[clangd] Replace HighlightingKind::NumKinds with LastKind. NFC

Summary:
The latter simplifies the client code by avoiding the need to handle it
as a separate case statement.

Reviewers: hokein

Reviewed By: hokein

Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67277
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/ClangdLSPServer.cpp (diff)clang-tools-extra.src/clangd/ClangdLSPServer.cpp
The file was modified/clang-tools-extra/trunk/clangd/SemanticHighlighting.cpp (diff)clang-tools-extra.src/clangd/SemanticHighlighting.cpp
The file was modified/clang-tools-extra/trunk/clangd/SemanticHighlighting.h (diff)clang-tools-extra.src/clangd/SemanticHighlighting.h
Revision 371374 by ostannard:
[ARM][MVE] Decoding of uqrshl and sqrshl accepts unpredictable encodings

Specify the Unpredictable bits, and return softfails when appropriate.

Patch by Mark Murray!

Differential revision: https://reviews.llvm.org/D66939
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMInstrMVE.td (diff)llvm.src/lib/Target/ARM/ARMInstrMVE.td
The file was modified/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (diff)llvm.src/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was added/llvm/trunk/test/MC/Disassembler/ARM/mve-scalar-shift-unpredictable.txtllvm.src/test/MC/Disassembler/ARM/mve-scalar-shift-unpredictable.txt
Revision 371373 by ibiryukov:
[clangd] Improve output of semantic highlighting tests in case of failures

Summary:
Instead of matching lists of highlightings, we annotate input code with
resulting highlightings and diff it against the expected annotated input.

In case of failures, this produces much nicer output in form of text-based
diffs.

Reviewers: hokein

Reviewed By: hokein

Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67274
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/SemanticHighlighting.cpp (diff)clang-tools-extra.src/clangd/SemanticHighlighting.cpp
The file was modified/clang-tools-extra/trunk/clangd/SemanticHighlighting.h (diff)clang-tools-extra.src/clangd/SemanticHighlighting.h
The file was modified/clang-tools-extra/trunk/clangd/unittests/SemanticHighlightingTests.cpp (diff)clang-tools-extra.src/clangd/unittests/SemanticHighlightingTests.cpp
Revision 371370 by sam_parker:
[ARM][ParallelDSP] Fix for sext input
   
The incoming accumulator value can be discovered through a sext, in
which case there will be a mismatch between the input and the result.
So sign extend the accumulator input if we're performing a 64-bit mac.

Differential Revision: https://reviews.llvm.org/D67220
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARMParallelDSP.cpp (diff)llvm.src/lib/Target/ARM/ARMParallelDSP.cpp
The file was modified/llvm/trunk/test/CodeGen/ARM/ParallelDSP/blocks.ll (diff)llvm.src/test/CodeGen/ARM/ParallelDSP/blocks.ll
The file was added/llvm/trunk/test/CodeGen/ARM/ParallelDSP/sext-acc.llllvm.src/test/CodeGen/ARM/ParallelDSP/sext-acc.ll
Revision 371369 by jonpa:
[SystemZ]  NFC: use clearRegisterDeads() in SystemZElimCompare.cpp

This is simpler than using findRegisterDefOperandIdx() + setIsDead().

Review: Ulrich Weigand.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp (diff)llvm.src/lib/Target/SystemZ/SystemZElimCompare.cpp
Revision 371368 by ctopper:
[X86] Add broadcast load unfolding support for vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86InstrFoldTables.cpp (diff)llvm.src/lib/Target/X86/X86InstrFoldTables.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/avx512-broadcast-unfold.ll (diff)llvm.src/test/CodeGen/X86/avx512-broadcast-unfold.ll
Revision 371367 by ctopper:
[X86] Add broadcast load unfolding tests for vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
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The file was modified/llvm/trunk/test/CodeGen/X86/avx512-broadcast-unfold.ll (diff)llvm.src/test/CodeGen/X86/avx512-broadcast-unfold.ll