Commit
35af6f11e04b777b73035f59bfabb68a08ca4ad9
by n.james93Reland Fix gn build after 943660f
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 | llvm/utils/gn/secondary/llvm/lib/Frontend/OpenMP/BUILD.gn |
Commit
09a95f51fb1fb86442418d891f67a43e2a3ca698
by thakis[gn build] (manually) merge 943660fd15f193
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 | llvm/lib/Frontend/OpenMP/CMakeLists.txt |
 | llvm/utils/gn/secondary/llvm/lib/Frontend/OpenMP/BUILD.gn |
 | llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenMP/BUILD.gn |
Commit
4500db8c59621a31c622862a2946457fdee481ce
by lebedev.riRevert "Reland "[InstCombine] Lower infinite combine loop detection thresholds"""
And there's a new hit: https://bugs.llvm.org/show_bug.cgi?id=46680 This reverts commit 7103c87596efccd532e9fe04a6ba6a200fed8481.
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 | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp |
Commit
f7907e9d223d8484f9afd457ba614c2db2ae4743
by a.v.lapshin[TRE] allow TRE for non-capturing calls.
The current implementation of Tail Recursion Elimination has a very restricted pre-requisite: AllCallsAreTailCalls. i.e. it requires that no function call receives a pointer to local stack. Generally, function calls that receive a pointer to local stack but do not capture it - should not break TRE. This fix allows us to do TRE if it is proved that no pointer to the local stack is escaped.
Reviewed by: efriedma
Differential Revision: https://reviews.llvm.org/D82085
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 | llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp |
 | llvm/test/Transforms/TailCallElim/basic.ll |
 | llvm/test/Transforms/TailCallElim/tre-noncapturing-alloca-calls.ll |
 | llvm/test/Transforms/TailCallElim/tre-multiple-exits.ll |
Commit
d7a05698efcfa6c596bcaadd8d5154612990f8f3
by cdevadas[AMDGPU] Move LowerSwitch pass to CodeGenPrepare.
It is possible that LowerSwitch pass leaves certain blocks unreachable from the entry. If not removed, these dead blocks can cause undefined behavior in the subsequent passes. It caused a crash in the AMDGPU backend after the instruction selection when a PHI node has its incoming values coming from these unreachable blocks.
In the AMDGPU pass flow, the last invocation of UnreachableBlockElim precedes where LowerSwitch is currently placed and eventually missed out on the opportunity to get these blocks eliminated. This patch ensures that LowerSwitch pass get inserted earlier to make use of the existing unreachable block elimination pass.
Reviewed By: sameerds, arsenm
Differential Revision: https://reviews.llvm.org/D83584
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 | llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |
Commit
850b150cff3dfb5f2113d9c3c483e2d22b318ced
by sstipanovic[Attributor][NFC] Add more debug output for deleted functions
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 | llvm/lib/Transforms/IPO/Attributor.cpp |
Commit
0b4cf802fad4f504aefbeb70c061e60cff10d153
by michael.hliao[fix-irreducible] Skip unreachable predecessors.
Summary: - Skip unreachable predecessors during header detection in SCC. Those unreachable blocks would be generated in the switch lowering pass in the corner cases or other frontends. Even though they could be removed through the CFG simplification, we should skip them during header detection.
Reviewers: sameerds
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83562
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 | llvm/test/Transforms/FixIrreducible/unreachable.ll |
 | llvm/lib/Transforms/Utils/FixIrreducible.cpp |
Commit
81db614411bdc8f95e5b7e2acaf551507eb7201b
by michael.hliaoFix `-Wunused-variable` warnings. NFC.
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 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
Commit
102828249c8ec9ab43ee84f496274f2853ed899c
by uday[MLIR] Parallelize affine.for op to 1-D affine.parallel op
Introduce pass to convert parallel affine.for op into 1-D affine.parallel op. Run using --affine-parallelize. Removes test-detect-parallel: pass for checking parallel affine.for ops.
Signed-off-by: Yash Jain <yash.jain@polymagelabs.com>
Differential Revision: https://reviews.llvm.org/D83193
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 | mlir/lib/Dialect/Affine/Transforms/AffineParallelize.cpp |
 | mlir/lib/Dialect/Affine/Utils/Utils.cpp |
 | mlir/include/mlir/Dialect/Affine/Passes.td |
 | mlir/test/Dialect/Affine/parallelism-detection.mlir |
 | mlir/include/mlir/Dialect/Affine/Utils.h |
 | mlir/test/Dialect/Affine/parallelize.mlir |
 | mlir/tools/mlir-opt/mlir-opt.cpp |
 | mlir/include/mlir/Dialect/Affine/Passes.h |
 | mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt |
 | mlir/test/lib/Dialect/Affine/CMakeLists.txt |
 | mlir/test/lib/Dialect/Affine/TestParallelismDetection.cpp |
Commit
6e42a417bacbfd5a1f58b0ccb7c9b34ff9e54523
by clementval[flang][openmp] Check clauses allowed semantic with tablegen generated map
Summary: This patch is enabling the generation of clauses enum sets for semantics check in Flang through tablegen. Enum sets and directive - sets map is generated by the new tablegen infrsatructure for OpenMP and other directive languages. The semantic checks for OpenMP are modified to use this newly generated map.
Reviewers: DavidTruby, sscalpone, kiranchandramohan, ichoyjx, jdoerfert
Reviewed By: DavidTruby, ichoyjx
Subscribers: mgorny, yaxunl, hiraditya, guansong, sstefan1, aaron.ballman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D83326
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 | llvm/test/TableGen/directive2.td |
 | llvm/include/llvm/Frontend/OpenMP/OMP.td |
 | llvm/utils/TableGen/DirectiveEmitter.cpp |
 | flang/lib/Semantics/check-omp-structure.h |
 | llvm/test/TableGen/directive1.td |
 | llvm/include/llvm/Frontend/OpenMP/CMakeLists.txt |
 | llvm/utils/TableGen/TableGenBackends.h |
 | llvm/utils/TableGen/TableGen.cpp |
 | flang/test/Semantics/omp-clause-validity01.f90 |
 | flang/lib/Semantics/check-omp-structure.cpp |
 | llvm/include/llvm/Frontend/Directive/DirectiveBase.td |
Commit
5d2c3e031a6861b3e95673d0e238c09938dd9c0d
by Yaxun.LiuFix regression due to test hip-version.hip
Added RocmInstallationDetector to Darwin and MinGW.
Fixed duplicate ROCm detector in ROCm toolchain.
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 | clang/lib/Driver/ToolChains/Darwin.h |
 | clang/lib/Driver/ToolChains/FreeBSD.h |
 | clang/lib/Driver/ToolChains/FreeBSD.cpp |
 | clang/lib/Driver/ToolChains/AMDGPU.cpp |
 | clang/lib/Driver/ToolChains/HIP.cpp |
 | clang/test/Driver/hip-version.hip |
 | clang/lib/Driver/ToolChains/MinGW.cpp |
 | clang/lib/Driver/ToolChains/MinGW.h |
 | clang/lib/Driver/ToolChains/AMDGPU.h |
 | clang/lib/Driver/ToolChains/Darwin.cpp |
Commit
5937434677afc5be47977f8d340ff499589f2ef3
by johannes[OpenMP] Silence unused symbol warning with proper ifdefs
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 | openmp/libomptarget/deviceRTLs/common/src/reduction.cu |
Commit
8f183d9f3d13d66a679bd449b1f5d34942560028
by clementval[openmp] Remove unused variable in DirectiveEmitter
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 | llvm/utils/TableGen/DirectiveEmitter.cpp |
Commit
d8c35031a39e7b1bf9524ddd325c7a91dbb05f1d
by stephen.neuendorffer[examples] fix ExceptionDemo
Code didn't compile in a release build. Guard debug output with ifndef NDEBUG.
Differential Revision: https://reviews.llvm.org/D83628
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 | llvm/examples/ExceptionDemo/ExceptionDemo.cpp |
Commit
47872adf6ae236c798d05b7229e00f363ab2fe0f
by craig.topper[X86] Add test cases for missed opportunities to use vpternlog due to a bitcast between the logic ops.
These test cases fail to use vpternlog because the AND was converted to a blend shuffle and then converted back to AND during shuffle lowering. This results in the AND having a different type than it started with. This prevents our custom matching logic from seeing the two logic ops.
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 | llvm/test/CodeGen/X86/avx512-logic.ll |
 | llvm/test/CodeGen/X86/avx512vl-logic.ll |
Commit
3b04af4d84fbffa6a2e90cfd187ed01092b45684
by joker.ephFix some memory leak in MLIRContext with respect to registered types/attributes interfaces
Differential Revision: https://reviews.llvm.org/D83618
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 | mlir/lib/IR/MLIRContext.cpp |
Commit
44b0b7cf6605c41728f445c363415b9b6f48db04
by joker.ephFix one memory leak in the MLIRParser by using std::unique_ptr to hold the new block pointer
This is NFC when there is no parsing error.
Differential Revision: https://reviews.llvm.org/D83619
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 | mlir/lib/Parser/Parser.cpp |
Commit
b8409c03ed90807f3d49c7d98dceea98cf461f7a
by michael.hliaoFix `-Wreturn-type` warning. NFC.
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 | clang/lib/Tooling/Syntax/BuildTree.cpp |
Commit
6792069a3fdb412d06dd3cc42a6181c6fb7db860
by nikita.ppv[NewGVN] Regenerate test checks (NFC)
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 | llvm/test/Transforms/NewGVN/assumes.ll |
Commit
4dbe82eef34e5ab8a9b0dabdbca194ff6858fc7f
by kuterdinel[Attributor] Introudce attribute seed allow list.
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 | llvm/lib/Transforms/IPO/Attributor.cpp |
 | llvm/test/Transforms/Attributor/allow_list.ll |
 | llvm/include/llvm/Transforms/IPO/Attributor.h |