Started 26 days ago
Took 5 hr 30 min

Success Build #1976 (Sep 30, 2020 5:16:48 AM)

Changes
  1. [AMDGPU] Do not generate mul with 1 in AMDGPU Atomic Optimizer (details)
  2. [SplitKit] Cope with no live subranges in defFromParent (details)
  3. [SystemZ]  Support bare nop instructions (details)
  4. [MLIR][SPIRV] Support different function control in (de)serialization (details)
  5. [X86] Support Intel Key Locker (details)
  6. [gn build] Port 413577a8790 (details)
  7. [InstCombine] recognizeBSwapOrBitReverseIdiom - assert for correct bit providence indices. NFCI. (details)
  8. [InstCombine] recognizeBSwapOrBitReverseIdiom - recognise zext(bswap(trunc(x))) patterns (PR39793) (details)
  9. [mlir] Added support for rank reducing subviews (details)
  10. [NFC][ARM] Add more LowOverheadLoop tests. (details)
  11. [mlir][Linalg] Tile sizes for Conv ops vectorization added as pass arguments (details)
  12. [SCEV] Verify that all mapped SCEV AddRecs refer to valid loops. (details)
  13. InstCombine] collectBitParts - cleanup variable names. NFCI. (details)
  14. [InstCombine] recognizeBSwapOrBitReverseIdiom - use ArrayRef::back() helper. NFCI. (details)
  15. [RDA] isSafeToDefRegAt: Look at global uses (details)
  16. [InstCombine] recognizeBSwapOrBitReverseIdiom - cleanup bswap/bitreverse detection loop. NFCI. (details)
  17. [InstCombine] Add PR47191 bswap tests (details)
  18. [lldb] Fix FreeBSD Arm Process Plugin build (details)
  19. [VPlan] Change recipes to inherit from VPUser instead of a member var. (details)
  20. [lldb] [Process/NetBSD] Fix operating on ftag register (details)
  21. [InstCombine] recognizeBSwapOrBitReverseIdiom - remove unnecessary cast. NFCI. (details)
  22. [InstCombine] Remove %tmp variable names from bswap tests (details)
  23. [InstCombine] recognizeBSwapOrBitReverseIdiom - merge the regular/trunc+zext paths. NFCI. (details)
  24. [clangd] Fix invalid UTF8 when extracting doc comments. (details)
  25. [PowerPC] Remove support for VRSAVE save/restore/update. (details)
  26. [GlobalISel] Fix incorrect setting of ValNo when splitting (details)
  27. Move AffineMapAttr into BaseOps.td (details)

Started by upstream project LLDB Incremental build number 24021
originally caused by:

  • Started by timer
  • Started by timer
  • Started by timer
  • Started by timer

Started by upstream project LLDB Incremental build number 24022
originally caused by:

  • Started by timer
  • Started by timer
  • Started by timer
  • Started by timer

This run spent:

  • 5 hr 12 min waiting;
  • 5 hr 30 min build duration;
  • 8 hr 32 min total from scheduled to completion.
Revision: 05481260c40e502d68e8d523b66eb8e23641c8b9
  • refs/remotes/origin/master
Revision: f33f8a2b30325d89c4b7daef1b7d11d6da38fd56
  • refs/remotes/origin/master
Revision: 05481260c40e502d68e8d523b66eb8e23641c8b9
  • refs/remotes/origin/master
Test Result (no failures)
    Revision: 6a075b6de4cafebec9ca1ff9eec7229a617c93f6
    • llvmorg-5.0.2
    Revision: d0d8eb2e5415b8be29343e3c17a18e49e67b5551
    • llvmorg-7.0.1
    Revision: 0399d5a9682b3cef71c653373e38890c63c4c365
    • llvmorg-9.0.0