Changes

[X86] Autogenerate complete checks. NFC

[DAGCombiner] Teach SimplifySetCC SETUGE X, SINTMIN -> SETLT X, 0 and SETULE X, SINTMAX  -> SETGT X, -1.

These aren't the canonical forms we'd get from InstCombine, but
we do have X86 tests for them. Recognizing them is pretty cheap.

While there make use of APInt:isSignedMinValue/isSignedMaxValue
instead of creating a new APInt to compare with. Also use
SelectionDAG::getAllOnesConstant helper to hide the all ones
APInt creation.

[MLIR][NFC] Fix misleading diagnostic error + clang-tidy fix

Fix misleading diagnostic error in affine.yield verifier + a clang-tidy fix.

Differential Revision: https://reviews.llvm.org/D85587

[X86][GlobalISel] Remove unneeded code for handling zext i8->16, i8->i64, i16->i64, i32->i64.

These all seem to be handled by tablegen pattern imports.

[llvm-readobj] - Remove 3 excessive test cases.

This patch does the following:

1) Removes mips-options.test and the corresponding Inputs/mips-options.elf-mips64el binary:
This is a test that checks that --dynamic-table is able to print the DT_MIPS_OPTIONS tag.
We are testing it in dynamic-tags-machine-specific.test already.
(https://github.com/llvm/llvm-project/blob/master/llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test#L235)

2) Removes mips-rld-map-rel.test and the corresponding Inputs/mips-rld-map-rel.elf-mipsel binary.
This is a test that checks that --dynamic-table is able to print the DT_MIPS_RLD_MAP_REL tag.
We are testing it in dynamic-tags-machine-specific.test already.
(https://github.com/llvm/llvm-project/blob/master/llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test#L257)

3) Removes ppc64-glink.test test and the corresponding Inputs/ppc64.exe binary.
This is a test that checks that --dynamic-table is able to print the DT_PPC64_GLINK tag.
We are testing it in dynamic-tags-machine-specific.test already.
(https://github.com/llvm/llvm-project/blob/master/llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test#L337)

Differential revision: https://reviews.llvm.org/D85515

[llvm-readelf/obj] - Refine the implementation of printMipsReginfo().

It adds the proper warnings reporting and updates the mips-reginfo.test to
remove using of the precompiled binary.

Differential revision: https://reviews.llvm.org/D85511

[ARM] Some formatting and predicate VRHADD patterns. NFC

This formats some of the MVE patterns, and adds a missing
Predicates = [HasMVEInt] to some VRHADD patterns I noticed
as going through. Although I don't believe NEON would ever
use the patterns (as it would use ADDL and VSHRN instead)
they should ideally be predicated on having MVE instructions.

[ARM] Allow vecreduce_add in tail predicated loops

This allows vecreduce_add in loops so that we can tailpredicate them.

Differential Revision: https://reviews.llvm.org/D85454

[ARM] Add VADDV and VMLAV patterns for v16i16

This adds patterns for v16i16's vecreduce, using all the existing code
to go via an i32 VADDV/VMLAV and truncating the result.

Differential Revision: https://reviews.llvm.org/D85452

[Diagnostics] Turn string concat warning to avoid false positives

[Polly] Reuse LLVM's build rules for gtest/gmock

Reuse LLVM's CMakeLists.txt for gtest/gmock instead of reinventing
them in Polly.  This fixes a lot of linking errors due to not linking
LLVMSupport in for me.

Differential Revision: https://reviews.llvm.org/D85280

[SCEVExpander] Avoid re-using existing casts if it means updating users.

Currently the SCEVExpander tries to re-use existing casts, even if they
are not exactly at the insertion point it was asked to create the cast.
To do so in some case, it creates a new cast at the insertion point and
updates all users to use the new cast.

This behavior is problematic, because it changes the IR outside of the
instructions created during the expansion. Therefore we cannot
completely undo all changes made during expansion.

This re-use should be only an extra optimization, so only using the new
cast in the expanded instructions should not be a correctness issue.
There are many cases equivalent instructions are created during
expansion.

This patch also adjusts findInsertPointAfter to skip instructions
inserted during expansion. This enables re-using existing casts without
the renaming any uses, by picking a better insertion point.

Reviewed By: efriedma, lebedev.ri

Differential Revision: https://reviews.llvm.org/D84399

[VectorCombine] try to create vector loads from scalar loads

This patch was adjusted to match the most basic pattern that starts with an insertelement
(so there's no extract created here). Hopefully, that removes any concern about
interfering with other passes. Ie, the transform should almost always be profitable.

We could make an argument that this could be part of canonicalization, but we
conservatively try not to create vector ops from scalar ops in passes like instcombine.

If the transform is not profitable, the backend should be able to re-scalarize the load.

Differential Revision: https://reviews.llvm.org/D81766

[Diagnostics] Handle string concat pattern and avoid false positives

[Tests] Precommit tests for D85593