Changes

[InstSimplify] reduce code for min/max analysis; NFC

This should probably be moved up to some common area eventually
when there's another user.

[InstSimplify] add tests for min/max with constants; NFC

[mlir] switch the modeling of LLVM types to use the new mechanism

A new first-party modeling for LLVM IR types in the LLVM dialect has been
developed in parallel to the existing modeling based on wrapping LLVM `Type *`
instances. It resolves the long-standing problem of modeling identified
structure types, including recursive structures, and enables future removal of
LLVMContext and related locking mechanisms from LLVMDialect.

This commit only switches the modeling by (a) renaming LLVMTypeNew to LLVMType,
(b) removing the old implementaiton of LLVMType, and (c) updating the tests. It
is intentionally minimal. Separate commits will remove the infrastructure built
for the transition and update API uses where appropriate.

Depends On D85020

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85021

[mlir] Fix GCC5 compilation problem in MLIR->LLVM type translation

GCC5 seems to dislike generic lambdas calling a method of the class
containing the lambda without explicit `this`.

[InstSimplify] fold nested min/max intrinsics with constant operands

This is based on the existing code for the non-intrinsic idioms
in InstCombine.

The vector constant constraint is non-obvious: undefs should be
ok in the outer call, but they can't propagate safely from the
inner call in all cases. Example:

https://alive2.llvm.org/ce/z/-2bVbM
  define <2 x i8> @src(<2 x i8> %x) {
  %0:
    %m = umin <2 x i8> %x, { 7, undef }
    %m2 = umin <2 x i8> { 9, 9 }, %m
    ret <2 x i8> %m2
  }
  =>
  define <2 x i8> @tgt(<2 x i8> %x) {
  %0:
    %m = umin <2 x i8> %x, { 7, undef }
    ret <2 x i8> %m
  }
  Transformation doesn't verify!
  ERROR: Value mismatch

  Example:
  <2 x i8> %x = < undef, undef >

  Source:
  <2 x i8> %m = < #x00 (0)	[based on undef value], #x00 (0) >
  <2 x i8> %m2 = < #x00 (0), #x00 (0) >

  Target:
  <2 x i8> %m = < #x07 (7), #x10 (16) >
  Source value: < #x00 (0), #x00 (0) >
  Target value: < #x07 (7), #x10 (16) >

[mlir][Vector] Add linalg.copy-based pattern for splitting vector.transfer_read into full and partial copies.

This revision adds a transformation and a pattern that rewrites a "maybe masked" `vector.transfer_read %view[...], %pad `into a pattern resembling:

```
   %1:3 = scf.if (%inBounds) {
      scf.yield %view : memref<A...>, index, index
    } else {
      %2 = linalg.fill(%extra_alloc, %pad)
      %3 = subview %view [...][...][...]
      linalg.copy(%3, %alloc)
      memref_cast %extra_alloc: memref<B...> to memref<A...>
      scf.yield %4 : memref<A...>, index, index
   }
   %res= vector.transfer_read %1#0[%1#1, %1#2] {masked = [false ... false]}
```
where `extra_alloc` is a top of the function alloca'ed buffer of one vector.

This rewrite makes it possible to realize the "always full tile" abstraction where vector.transfer_read operations are guaranteed to read from a padded full buffer.
The extra work only occurs on the boundary tiles.

[lit] Add --time-trace-output to lit

This produces a chrome://tracing compatible trace file in the same way
as -ftime-trace.

This can be useful in optimising test time where one long test is causing
long overall test time on a wide machine.

This also helped in finding tests which have side effects on others
(e.g. https://reviews.llvm.org/D84885).

Differential Revision: https://reviews.llvm.org/D84931

[X86][AVX] isHorizontalBinOp - relax lane-crossing limits for AVX1-only targets.

Permit lane-crossing post shuffles on AVX1 targets as long as every element comes from the same source lane, which for v8f32/v4f64 cases can be efficiently lowered with the LowerShuffleAsLanePermuteAnd* style methods.

[X86] Remove unused canScaleShuffleElements helper

The only use was removed at rG36750ba5bd0e9e72

Thanks to @nemanjai for the heads up

[Concepts] Include the found concept decl when dumping the ConceptSpecializationExpr

Differential Revision: https://reviews.llvm.org/D85124

[Support][PPC] Fix bot failures due to cd53ded557c3

Commit https://reviews.llvm.org/rGcd53ded557c3 attempts to fix the
computation in computeHostNumPhysicalCores() to respect Affinity.
However, the GLIBC wrapper of the affinity system call fails with
a default size of cpu_set_t on systems that have more than 1024 CPUs.
This just fixes the computation on such large machines.

[SyntaxTree] Add support for `LiteralExpression`

We use inheritance to model the grammar's disjunction rule:
literal:
  integer-literal
  character-literal
  floating-point-literal
  string-literal
  boolean-literal
  pointer-literal
  user-defined-literal

Differential Revision: https://reviews.llvm.org/D85186

[mlir][Vector] Relax condition for `splitFullAndPartialTransferPrecondition`

The `splitFullAndPartialTransferPrecondition` has a restrictive condition to
prevent the pattern to be applied recursively if it is nested under an scf.IfOp.
Relaxing the condition to the immediate parent op must not be an scf.IfOp lets
the pattern be applied more generally while still preventing recursion.

Differential Revision: https://reviews.llvm.org/D85209

[SyntaxTree] Fix crash on pointer to member function

Differential Revision: https://reviews.llvm.org/D85146

Improve diagnostics for disallowed attributes used with multiversioning

Since we permit using SOME attributes (at the moment, just 1) with
multiversioning, we should improve the message as it still implies that
no attributes should be combined with multiversioning.

Permit nowthrow and nonnull with multiversioning.

Some shipped versions of stdlib.h use nonnull and nothrow with function
multiversioning.  Support these, as they are generally harmless.

Fix sphinx indentation warning.

Don't double indent and make it clear we're referting to the latency mode.

[X86] getFauxShuffleMask - drop unnecessary computeKnownBits OR(X,Y) shuffle decoding.

Now that rG47cea9e82dda941e lets us aggressively decode multi-use shuffles for the OR(SHUFFLE(),SHUFFLE()) case we don't need the computeKnownBits variant any more.

Fix sphinx indentation warning to stop newline in byref section html output.

[AMDGPU] Generate frem test checks

Differential Revision: https://reviews.llvm.org/D84515

[AMDGPU] Use fma for lowering frem

This gives shorter f64 code and perhaps better accuracy.

Differential Revision: https://reviews.llvm.org/D84516

[test] Use abspath instead of realpath sometimes

In these two cases, use of `os.path.realpath` is problematic:

- The name of the compiler is significant [1] . For testing purposes, we might
  provide a compiler called "clang" which is actually a symlink to some build
  script (which does some flag processing before invoking the real clang). The
  destination the symlink may not be called "clang", but we still want it to be
  treated as such.
- When using a build system that puts build artifacts in an arbitrary build
  location, and later creates a symlink for it (e.g. creates a
  "<lldb root>/lldbsuite/test/dotest.py" symlinks that points to
  "/build/artifact/<hash>/dotest.py"), looking at the realpath will not match
  the "test" convention required here.

[1] See `Makefile.rules` in the lldb tree, e.g. we use different flags if the compiler is named "clang"

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D85175

[PowerPC] Custom lowering for funnel shifts

The custom lowering saves an instruction over the generic expansion, by
taking advantage of the fact that PowerPC shift instructions are well
defined in the shift-by-bitwidth case.

Differential Revision: https://reviews.llvm.org/D83948

Fix sphinx "Title underline too short" warning

Separate code-block tag with a newline to fix code snippet html output

[PowerPC] Don't remove single swap between the load and store

The swap removal pass looks to remove swaps when a loaded value is swapped, some
number of lane-insensitive operations are performed and then the value is
swapped again and stored.

However, in a situation where we load the value, swap it and then store it
without swapping again, the pass erroneously removes the single swap. The
reason is that both checks in the same equivalence class:

- load feeds a swap
- swap feeds a store

pass. However, there is no check that the two swaps are actually a single swap.
This patch just fixes that.

Differential revision: https://reviews.llvm.org/D84785

[clang][BPF] support type exist/size and enum exist/value relocations

This patch added the following additional compile-once
run-everywhere (CO-RE) relocations:
  - existence/size of typedef, struct/union or enum type
  - enum value and enum value existence

These additional relocations will make CO-RE bpf programs more
adaptive for potential kernel internal data structure changes.

For existence/size relocations, the following two code patterns
are supported:
  1. uint32_t __builtin_preserve_type_info(*(<type> *)0, flag);
  2. <type> var;
     uint32_t __builtin_preserve_field_info(var, flag);
flag = 0 for existence relocation and flag = 1 for size relocation.

For enum value existence and enum value relocations, the following code
pattern is supported:
  uint64_t __builtin_preserve_enum_value(*(<enum_type> *)<enum_value>,
                                         flag);
flag = 0 means existence relocation and flag = 1 for enum value.
relocation. In the above <enum_type> can be an enum type or
a typedef to enum type. The <enum_value> needs to be an enumerator
value from the same enum type. The return type is uint64_t to
permit potential 64bit enumerator values.

Differential Revision: https://reviews.llvm.org/D83242

[OpenMP] Don't use MSVC workaround with MinGW

Patch by mati865@gmail.com

Differential Revision: https://reviews.llvm.org/D85210

[llvm-symbolizer] Switch command line parsing from llvm::cl to OptTable

for the advantage outlined by D83639 ([OptTable] Support grouped short options)

Some behavior changes:

* -i={0,false} is removed. Use --no-inlines instead.
* --demangle={0,false} is removed. Use --no-demangle instead
* -untag-addresses={0,false} is removed. Use --no-untag-addresses instead

Added a higher level API OptTable::parseArgs which handles optional
initial options populated from an environment variable, expands response
files recursively, and parses options.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D83530

GlobalISel: Hack a test to avoid a bug introducing a verifier error

There seems to be an unrelated CSEMIRBuilder bug that was causing
expensive checks failures in this case. Hack the test to avoid this
problem for now until that's fixed.

[docs] Mention LLVM_ENABLE_MODULES.

[InstSimplify] refactor min/max folds with shared operand; NFC

[lldb/Host] Upstream macOS TCC code

Upstream the code for dealing with TCC introduced in macOS Mojave. This
will make the debuggee instead of the debugger responsible for the
privileges it needs.

Differential revision: https://reviews.llvm.org/D85217

[GlobalISel] Don't transform FSUB(-0, X) -> FNEG(X) in GlobalISel.

This patch stops unconditionally transforming FSUB(-0, X) into an FNEG(X) while building the MIR.

This corresponds with the SelectionDAGISel change in D84056.

Differential Revision: https://reviews.llvm.org/D85139

AMDGPU/GlobalISel: Ensure subreg is valid when selecting G_UNMERGE_VALUES

Fixes verifier error with SGPR unmerges with 96-bit result types.

[DWARFYAML] Fix unintialized value Is64BitAddrSize. NFC.

This patch fixes the undefined behavior that reported by ubsan.

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/44524/

[GlobalISel] Remove redundant FNEG tests.

These tests were made redundant by D85139.

[MLIR] Simplify semi-affine expressions

Simplify semi-affine expression for the operations like ceildiv,
floordiv and modulo by any given symbol by checking divisibilty by that
symbol.

Some properties used in simplification are:

1) Commutative property of the floordiv and ceildiv:
((expr1 floordiv expr2) floordiv expr3 ) = ((expr1 floordiv expr3) floordiv expr2)
((expr1 ceildiv expr2) ceildiv expr3 ) = ((expr1 ceildiv expr3) ceildiv expr2)

While simplification if operations are different no simplification is
possible as there is no property that simplify expressions like these:
((expr1 ceildiv expr2) floordiv expr3) or  ((expr1 floordiv expr2)
ceildiv expr3).

2) If both expr1 and expr2 are divisible by the expr3 then:
(expr1 % expr2) / expr3 = ((expr1 / expr3) % (expr2 / expr3))
where / is divide symbol.

3) If expr1 is divisible by expr2 then expr1 % expr2 = 0.

Signed-off-by: Yash Jain <yash.jain@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D84920

Fix sphinx indentation warnings by adding explicit line breaks to address space hierarchy

[gn build] (manually) merge 593e1962

sanitizer_symbolizer_libcdep.cpp: Change --inlining=true to --inlines and --inlining=false to --no-inlines

Fix -Wconstant-conversion warning with explicit cast

Introduced by fd6584a22043b254a323635c142b28ce80ae5b5b

Following similar use of casts in AsmParser.cpp, for instance - ideally
this type would use unsigned chars as they're more representative of raw
data and don't get confused around implementation defined choices of
char's signedness, but this is what it is & the signed/unsigned
conversions are (so far as I understand) safe/bit preserving in this
usage and what's intended, given the API design here.

[MLIR][SPIRVToLLVM] Indentation and style fix in tests

Second patch with test fixes. Redundant `%{{.*}} = `
removed, label checks added, tabs converted to spaces and
some namings are changed to match the convention.

Fixed tests:
- constant-op-to-llvm
- func-ops-to-llvm (renamed)
- memory-ops-to-llvm
- misc-ops-to-llvm
- module-ops-to-llvm
- shift-ops-to-llvm (renamed)
- spirv-types-to-llvm-invalid (renamed)

Reviewed By: ftynse, rriddle

Differential Revision: https://reviews.llvm.org/D85206

[InstSimplify] add tests for compare of min/max; NFC

The test are adapted from the existing tests for cmp/select idioms.

[test] Fix another realpath->abspath.

This is a followup to 817b3a6fe3a4452eb61a2503c8beaa7267ca0351: in `builder_base` we should use abspath, not realpath, because the name is significant.
This is used by test cases that use `@skipIf(compiler="clang", compiler_version=['<', <version>])`

[clang] improve diagnostics for misaligned and large atomics

"Listing the alignment and access size (== expected alignment) in the warning
seems like a good idea."

solves PR 46947

  struct Foo {
    struct Bar {
      void * a;
      void * b;
    };
    Bar bar;
  };

  struct ThirtyTwo {
    struct Large {
      void * a;
      void * b;
      void * c;
      void * d;
    };
    Large bar;
  };

  void braz(Foo *foo, ThirtyTwo *braz) {
    Foo::Bar bar;
    __atomic_load(&foo->bar, &bar, __ATOMIC_RELAXED);

    ThirtyTwo::Large foobar;
    __atomic_load(&braz->bar, &foobar, __ATOMIC_RELAXED);
  }

repro.cpp:21:3: warning: misaligned atomic operation may incur significant performance penalty; the expected (16 bytes) exceeds the actual alignment (8 bytes) [-Watomic-alignment]
  __atomic_load(&foo->bar, &bar, __ATOMIC_RELAXED);
  ^
repro.cpp:24:3: warning: misaligned atomic operation may incur significant performance penalty; the expected (32 bytes) exceeds the actual alignment (8 bytes) [-Watomic-alignment]
  __atomic_load(&braz->bar, &foobar, __ATOMIC_RELAXED);
  ^
repro.cpp:24:3: warning: large atomic operation may incur significant performance penalty; the access size (32 bytes) exceeds the max lock-free size (16  bytes) [-Watomic-alignment]
3 warnings generated.

Differential Revision: https://reviews.llvm.org/D85102

Revert "[HotColdSplit] Add test case for unlikely attribute in outlined function"

This reverts commit aa1f905890fbbfedf396530f1e14409875ece13c.

The flag -codegenprepare maybe causing failures. Reverting this
to investigate the root cause.

[SCCP] Propagate inequalities

Teach SCCP to create notconstant lattice values from inequality
assumes and nonnull metadata, and update getConstant() to make
use of them. Additionally isOverdefined() needs to be changed to
consider notconstant an overdefined value.

Handling inequality branches is delayed until our branch on undef
story in other passes has been improved.

Differential Revision: https://reviews.llvm.org/D83643

[llvm-symbolizer] Add compatibility aliases for --inlining={true,false}

D83530 removed --inlining={true,false} which were used by old asan_symbolize.py script.
Add compatibility aliases so that old asan_symbolize.py and sanitizer
binaries can work with new llvm-symbolizer.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D85228

[InstSimplify] Add tests for icmp with urem divisor (NFC)

[InstSimplify] Peephole optimization for icmp (urem X, Y), X

This revision adds the following peephole optimization
and it's negation:

    %a = urem i64 %x, %y
    %b = icmp ule i64 %a, %x
    ====>
    %b = true

With John Regehr's help this optimization was checked with Alive2
which suggests it should be valid.

This pattern occurs in the bound checks of Rust code, the program

    const N: usize = 3;
    const T = u8;

    pub fn split_mutiple(slice: &[T]) -> (&[T], &[T]) {
        let len = slice.len() / N;
        slice.split_at(len * N)
    }

the method call slice.split_at will check that len * N is within
the bounds of slice, this bounds check is after some transformations
turned into the urem seen above and then LLVM fails to optimize it
any further. Adding this optimization would cause this bounds check
to be fully optimized away.

ref: https://github.com/rust-lang/rust/issues/74938

Differential Revision: https://reviews.llvm.org/D85092

[NFC][LV] Vectorized Loop Skeleton Refactoring

This patch tries to improve readability and maintenance
of createVectorizedLoopSkeleton by reorganizing some lines,
updating some of the comments and breaking it up into
smaller logical units.

Reviewed By: pjeeva01

Differential Revision: https://reviews.llvm.org/D83824

[mlir] [VectorOps] Add expand/compress operations to Vector dialect

Introduces the expand and compress operations to the Vector dialect
(important memory operations for sparse computations), together
with a first reference implementation that lowers to the LLVM IR
dialect to enable running on CPU (and other targets that support
the corresponding LLVM IR intrinsics).

Reviewed By: reidtatge

Differential Revision: https://reviews.llvm.org/D84888

[libc++abi] Make sure we use a 32 bit guard on 32 bit Aarch64

AMDGPU/GlobalISel: Add baseline tests for andn2/orn2 matching

GlobalISel: Add node mappings for frameindex/blockaddress

[libc] Add implementations for isblank, iscntrl, isgraph, ispunct.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D85059

GlobalISel: Handle llvm.localescape

This one is pretty easy and shrinks the list of unhandled
intrinsics. I'm not sure how relevant the insert point is. Using the
insert position of EntryBuilder will place this after
constants. SelectionDAG seems to end up emitting these after argument
copies and before anything else, but I don't think it really
matters. This also ends up emitting these in the opposite order from
SelectionDAG, but I don't think that matters either.

This also needs a fix to stop the later passes dropping this as a dead
instruction. DeadMachineInstructionElim's version of isDead special
cases LOCAL_ESCAPE for some reason, and I'm not sure why it's excluded
from MachineInstr::isLabel (or why isDead doesn't check it).

I also noticed DeadMachineInstructionElim never considers inline asm
as dead, but GlobalISel will drop asm with no constraints.

[llvm-symbolizer][test] Fix pdb/pdb.test after D83530

This is a Windows only test which requires HAVE_DIA_SDK, so I failed to notice it.

[MLIR][Affine] Fix createPrivateMemRef in affine fusion

Always define a remapping for the memref replacement (`indexRemap`)
with the proper number of inputs, including all the `outerIVs`, so that
the number of inputs and the operands provided for the map don't mismatch.

Reviewed By: bondhugula, andydavis1

Differential Revision: https://reviews.llvm.org/D85177

BPF: support type exist/size and enum exist/value relocations

Four new CO-RE relocations are introduced:
  - TYPE_EXISTENCE: whether a typedef/record/enum type exists
  - TYPE_SIZE: the size of a typedef/record/enum type
  - ENUM_VALUE_EXISTENCE: whether an enum value of an enum type exists
  - ENUM_VALUE: the enum value of an enum type

These additional relocations will make CO-RE bpf programs
more adaptive for potential kernel internal data structure
changes.

Differential Revision: https://reviews.llvm.org/D83878

[FastISel] Don't transform FSUB(-0, X) -> FNEG(X) in FastISel

This corresponds with the SelectionDAGISel change in D84056.

Also, rename some poorly named tests in CodeGen/X86/fast-isel-fneg.ll with NFC.

Differential Revision: https://reviews.llvm.org/D85149

[MLIR] Change FunctionType::get() and TupleType::get() to use TypeRange

- Moved TypeRange into its own header/cpp file, and add hashing support.
- Change FunctionType::get() and TupleType::get() to use TypeRange

Differential Revision: https://reviews.llvm.org/D85075

[WebAssembly] Use "signed char" instead of "char" in SIMD intrinsics.

This allows people to use `int8_t` instead of `char`, -funsigned-char,
and generally decouples SIMD from the specialness of `char`.

And it makes intrinsics like `__builtin_wasm_add_saturate_s_i8x16`
and `__builtin_wasm_add_saturate_u_i8x16` use signed and unsigned
element types, respectively.

Differential Revision: https://reviews.llvm.org/D85074

[libFuzzer] Fix endianness issue in ForEachNonZeroByte()

The usage pattern of Bundle variable assumes the machine is little
endian, which is not the case on SystemZ. Fix by converting Bundle to
little-endian when necessary.

[SanitizerCoverage] Fix types of __stop* and __start* symbols

If a section is supposed to hold elements of type T, then the
corresponding CreateSecStartEnd()'s Ty parameter represents T*.
Forwarding it to GlobalVariable constructor causes the resulting
GlobalVariable's type to be T*, and its SSA value type to be T**, which
is one indirection too many. This issue is mostly masked by pointer
casts, however, the global variable still gets an incorrect alignment,
which causes SystemZ to choose wrong instructions to access the
section.

[libFuzzer] Enable for SystemZ

* Add SystemZ to the list of supported architectures.

* XFAIL a few tests.

Coverage reporting is broken, and is not easy to fix (see comment in
coverage.test). Interaction with sanitizers needs to be investigated
more thoroughly, since they appear to reduce coverage in certain cases.

[lldb/Test] Add missing stdio.h includes

Fixes error: implicit declaration of function 'printf' is invalid in C99
[-Werror,-Wimplicit-function-declaration]

[OpenMP] support build on msys2/mingw with clang or gcc

RTM Adaptive Locks are supported on msys2/mingw for clang and gcc.

Differential Revision: https://reviews.llvm.org/D81776

[HotColdSplit] Add test case for unlikely attribute in outlined function

Differential Revision: https://reviews.llvm.org/D85232

[AArch64][SVE] Widen narrow sdiv/udiv operations.

The SVE instruction set only supports sdiv/udiv for 32-bit and 64-bit
integers.  If we see an 8-bit or 16-bit divide, widen the operands to 32
bits, and narrow the result.

Differential Revision: https://reviews.llvm.org/D85170

[lldb-vscode ]Add Syntax Highlighting to Disassembly View

When lldb cannot find source file thus IDE renders a disassembly view, add syntax highlighting for constants, registers and final line comments for better debugging experience.
The original plain disassembly view looks like:
{F12401687}
An ideal view is like the screenshot attached.
{F12401515}

In this diff, the mimeType is a kind of media type for formatting the content in the response to a source request. Elements in the disassembly view, like constants, registers and final line comments are colored for highlighting.
A built-in support in the VSCode IDE for syntax highlighting will identify the which mimeType to apply and render the disassembly view as expected.

Reviewed By: wallace, clayborg

Differential Revision: https://reviews.llvm.org/D84555

GlobalISel: Add utilty for getting function argument live ins

Get the argument register and ensure there's a copy to the virtual
register. AMDGPU and AArch64 have similarish code to get the livein
value, and I also want to use this in multiple places.

This is a bit more aggressive about setting the register class than
the original function, but that's probably OK.

I think we're missing a few verifier checks for function live ins. I
noticed AArch64's calling convention code is not actually adding
liveins to functions, only the entry block (which apparently might not
matter that much?). There should probably be a verifier check that
entry block live ins are also live into the function. We also might
need a verifier check that the copy to the livein virtual register is
in the entry block.

[lldb/Test] Skip tests that try to get the remote environment

We don't support getting the remote environment. The gdb remote protocol
has no packet for that.

AMDGPU/GlobalISel: Select llvm.returnaddress

[llvm][NFC] Moved implementation of TrainingLogger outside of its decl

Also renamed a method - printTensor - to print; and added comments.

AMDGPU/GlobalISel: Use live in helper function for returnaddress

[lldb/Test] Add @skipIfRemote decorator to TestProcessList.py

lldb-platform contains a very minimal support for the qfProcessInfo
packet, only allowing the simplest query to get most of the testsuite
running, and returning very little information about the matched
processes.

[RDF] Remove uses of RDFRegisters::normalize (deprecate)

This function has been reduced to an identity function for some time.

[SelectionDAG][SVE] Support scalable vectors in getConstantFP()

Differential Revision: https://reviews.llvm.org/D85249

[Hexagon] Use InstSimplify instead of ConstantProp

This is the last remaining use of ConstantProp, migrate it to InstSimplify in the goal of removing ConstantProp.

Add -hexagon-instsimplify option to enable skipping of instsimplify in
tests that can't handle the extra optimization.

Differential Revision: https://reviews.llvm.org/D85047

Teach SROA to handle allocas with more than one dbg.declare.

It is technically legal for optimizations to create an alloca that is
used by more than one dbg.declare, if one or both of them are inlined
instances of aliasing variables.

Differential Revision: https://reviews.llvm.org/D85172

[RDF] Lower the sorting complexity in RDFLiveness::getAllReachingDefs

The sorting is needed, because reaching defs are (logically) ordered,
but are not collected in that order. This change will break up the
single call to std::sort into a series of smaller sorts, each of which
should use a cheaper comparison function than the original.

[RDF] Cache register aliases in PhysicalRegisterInfo

This improves performance of PhysicalRegisterInfo::makeRegRef.

[RDF] Really remove remaining uses of PhysicalRegisterInfo::normalize

BPF: simplify IR generation for __builtin_btf_type_id()

This patch simplified IR generation for __builtin_btf_type_id().
For __builtin_btf_type_id(obj, flag), previously IR builtin
looks like
   if (obj is a lvalue)
     llvm.bpf.btf.type.id(obj.ptr, 1, flag)  !type
   else
     llvm.bpf.btf.type.id(obj, 0, flag)  !type
The purpose of the 2nd argument is to differentiate
   __builtin_btf_type_id(obj, flag) where obj is a lvalue
vs.
   __builtin_btf_type_id(obj.ptr, flag)

Note that obj or obj.ptr is never used by the backend
and the `obj` argument is only used to derive the type.
This code sequence is subject to potential llvm CSE when
  - obj is the same .e.g., nullptr
  - flag is the same
  - metadata type is different, e.g., typedef of struct "s"
    and strust "s".
In the above, we don't want CSE since their metadata is different.

This patch change IR builtin to
   llvm.bpf.btf.type.id(seq_num, flag)  !type
and seq_num is always increasing. This will prevent potential
llvm CSE.

Also report an error if the type name is empty for
remote relocation since remote relocation needs non-empty
type name to do relocation against vmlinux.

Differential Revision: https://reviews.llvm.org/D85174

[RDF] Use hash-based containers, cache extra information

This improves performance.

[RDF] Add operator<<(raw_ostream&, RegisterAggr), NFC

Fix debugserver's qProcessInfo reporting of maccatalyst binaries

This patch is similar in spirit to https://reviews.llvm.org/D84480,
but does the maccatalyst/macosx disambiguation. I also took the
opportunity to factor out the gdb-remote packet log scanning used by
several testcases into lldbutil functions.

rdar://problem/66059257

Differential Revision: https://reviews.llvm.org/D84576

[NFC][InstCombine] Negator: add tests for negation of left-shift by constant

[NFC][InstCombine] Fix value names (s/%tmp/%i/) and autogenerate a few tests being affected by negator change

[InstCombine] Negator: -(X << C)  -->  X * (-1 << C)

This shows some regressions in tests, but they are all around GEP's,
so i'm not really sure how important those are.

https://rise4fun.com/Alive/1Gn

Revert "[InstCombine] Negator: -(X << C)  -->  X * (-1 << C)"

Breaks codegen tests, will recommit later.

This reverts commit 8aeb2fe13a4100b4c2e78d6ef75119304100cb1f.

[llvm] Expose type and element count-related APIs on TensorSpec

Added a mechanism to check the element type, get the total element
count, and the size of an element.

Differential Revision: https://reviews.llvm.org/D85250

[StackSafety,NFC] Add combined index test

[lldb/testsuite] Skip 'frame diagnose' tests based on architecture

AFAICS, the feature only works on x86, skipping the tests has nothing to
do with the target being iOS or remote.

[X86] Optimize getImpliedDisabledFeatures & getImpliedEnabledFeatures after D83273

Previously the time complexity is O(|number of paths from the root to an
implied feature| * CPU_FWATURE_MAX) where CPU_FEATURE_MAX is 92.

The number of paths can be large (theoretically exponential).

For an inline asm statement, there is a code path
`clang::Parser::ParseAsmStatement -> clang::Sema::ActOnGCCAsmStmt -> ASTContext::getFunctionFeatureMap`
leading to potentially many calls of getImpliedEnabledFeatures (41 for my -march=native case).

We should improve the performance a bit in case the number of inline asm
statements is large (Linux kernel builds).

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D85257

PR46997: don't run clang-format on clang's testcases.

The formatting of the testcases matters and shouldn't be overwritten by
a tool.