SuccessChanges

Summary

  1. [zorg] [PowerPC] Limit number of threads to 20 on clang-ppc64le-rhel buildbot (details)
Commit 2fc811d0946a8a2a9eb3fd3f4931d0a960593fd3 by saghir
[zorg] [PowerPC] Limit number of threads to 20 on clang-ppc64le-rhel buildbot

Earlier, we reduced the number of threads to 64 but we were still seeing
sanitizer tests failing. We experimented with the number of threads and saw
20 threads working fine for the bot. This patch reduces the number of threads
from 64 to 20 on the clang-ppc64le-rhel buildbot.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D88746
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [libc++] NFC: Remove unused include (details)
  2. [PGO] Remove the old memop value profiling buckets. (details)
  3. [CostModel] remove cost-kind predicate for ctlz/cttz intrinsics in basic TTI implementation (details)
  4. [libc++][filesystem] Only include <fstream> when we actually need it in copy_file_impl (details)
  5. [LV] Add a getRecurrenceBinOp and make use of it. NFC (details)
  6. Revert "[LLD] [COFF] Implement a GNU/ELF like -wrap option" (details)
  7. [mlir][Linalg] NFC - Rename test files s/_/-/g (details)
  8. [flang][msvc] Avoid a reinterpret_cast (details)
  9. [libc++] Reduce dependencies on <iostream> from <random> (details)
  10. Make sure both cc1 and cc1as process -m[no-]code-object-v3 (details)
  11. [NFC][CaptureTracking] Move static function isNonEscapingLocalObject to llvm namespace (details)
  12. [InstCombine] update tests for logic folds to exercise commuted patterns; NFC (details)
  13. Reapply [LLD] [COFF] Implement a GNU/ELF like -wrap option (details)
  14. [mlir] Fix typo in LangRef (details)
  15. [mlir] Add std.tensor_to_memref op and teach the infra about it (details)
  16. [SemaObjC] Fix composite pointer type calculation for `void*` and pointer to lifetime qualified ObjC pointer type (details)
  17. Reland "[WebAssembly] v128.load{8,16,32,64}_lane instructions" (details)
  18. [AMDGPU] gfx1032 target (details)
  19. [MTE] Pin the tagged base pointer to one of the stack slots. (details)
  20. [AArch64] Stack frame reordering. (details)
  21. [gn bulid] Remove phantom WebAssembly tablegen() calls (details)
  22. [NFC][SCEV] Autogenerate check lines in tests being affected by upcoming patch (details)
  23. [NFC][LSR] Autogenerate check lines in tests being affected by upcoming patch (details)
  24. [NFC][IndVars] Autogenerate check lines in tests being affected by upcoming patch (details)
  25. [AMDGPU] SILowerControlFlow::removeMBBifRedundant should not try to change MBB layout if it can fallthrough (details)
  26. [libc] Use entrypoints.txt as the single source of list of functions for a platform. (details)
  27. PR47864: Fix assertion in pointer-to-member emission if there are (details)
  28. [libTooling] Change `after` range-selector to operate only on source ranges (details)
  29. [LoopVersion] Unify SCEVChecks and alias check handling (NFC). (details)
  30. fix symbol printing on windows (details)
  31. [WebAssembly] Prototype i8x16.popcnt (details)
  32. Revert "[clang] Add -fc++-abi= flag for specifying which C++ ABI to use" (details)
  33. Revert "[HIP] Change default --gpu-max-threads-per-block value to 1024" (details)
  34. [VE] Support fabs/fcos/fsin/fsqrt math functions (details)
  35. [VE] Add VGT/VSC/PFCHV instructions (details)
  36. Add an SB API to get the SBTarget from an SBBreakpoint (details)
Commit 54f7ad2d6f520a7dba4debb7c4aa362be4dbffd0 by Louis Dionne
[libc++] NFC: Remove unused include
The file was modifiedlibcxx/src/filesystem/operations.cpp
Commit 1ebee7adf8966ad9d2885c172a18104c94667061 by yamauchi
[PGO] Remove the old memop value profiling buckets.

Following up D81682 and D83903, remove the code for the old value profiling
buckets, which have been replaced with the new, extended buckets and disabled by
default.

Also syncing InstrProfData.inc between compiler-rt and llvm.

Differential Revision: https://reviews.llvm.org/D88838
The file was modifiedllvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
The file was modifiedllvm/include/llvm/ProfileData/InstrProfData.inc
The file was modifiedcompiler-rt/lib/profile/InstrProfilingValue.c
The file was modifiedllvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
The file was modifiedllvm/test/Transforms/PGOProfile/memcpy.ll
The file was modifiedllvm/test/Transforms/PGOProfile/memop_profile_funclet.ll
The file was modifiedllvm/include/llvm/ProfileData/InstrProf.h
The file was modifiedcompiler-rt/include/profile/InstrProfData.inc
The file was modifiedllvm/include/llvm/Transforms/Instrumentation/InstrProfiling.h
The file was modifiedllvm/lib/ProfileData/InstrProf.cpp
Commit 9f6048f83dc2be76ab97172bf1113d9fa9db7c60 by spatel
[CostModel] remove cost-kind predicate for ctlz/cttz intrinsics in basic TTI implementation

The cost modeling for intrinsics is a patchwork based on different
expectations from the callers, so it's a mess. I'm hoping to untangle
this to allow canonicalization to the new min/max intrinsics in IR.
The general goal is to remove the cost-kind restriction here in the
basic implementation class. Ie, if some intrinsic has throughput cost
of 104, assume that it has the same size, latency, and blended costs.
Effectively, an intrinsic with cost N is composed of N simple
instructions. If that's not correct, the target should provide a more
accurate override.

The x86-64 SSE2 subtarget cost diffs require explanation:

1. The scalar ctlz/cttz are assuming "BSR+XOR+CMOV" or
   "TEST+BSF+CMOV/BRANCH", so not cheap.
2. The 128-bit SSE vector width versions assume cost of 18 or 26
   (no explanation provided in the tables, but this corresponds to a
   bunch of shift/logic/compare).
3. The 512-bit vectors in the test file are scaled up by a factor of
   4 from the legal vector width costs.
4. The plain latency cost-kind is not affected in this patch because
   that calc is diverted before we get to getIntrinsicInstrCost().

Differential Revision: https://reviews.llvm.org/D89461
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
Commit 17dcf85ebe4cfbd3f811848f6d9ebc486b3387e9 by Louis Dionne
[libc++][filesystem] Only include <fstream> when we actually need it in copy_file_impl

This allows building <filesystem> on systems that don't support <fstream>,
such as systems that don't support localization.
The file was modifiedlibcxx/src/filesystem/operations.cpp
Commit 13ec3dd66fe4e8d2990da58e1416c881402dc48e by david.green
[LV] Add a getRecurrenceBinOp and make use of it. NFC
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/include/llvm/Analysis/IVDescriptors.h
Commit 3d338f681340e2075707eabcf530bcc0c37da80e by aeubanks
Revert "[LLD] [COFF] Implement a GNU/ELF like -wrap option"

This reverts commit a012c704b5e5b60f9d2a7304d27cbc84a3619571.

Breaks Windows builds.

C:\src\llvm-mint\lld\COFF\Symbols.cpp(26,1): error: static_assert failed due to requirement 'sizeof(lld::coff::SymbolUnion) <= 48' "symbols should be optimized for memory usage"
static_assert(sizeof(SymbolUnion) <= 48,
The file was modifiedlld/COFF/InputFiles.h
The file was modifiedlld/MinGW/Driver.cpp
The file was modifiedlld/COFF/Symbols.h
The file was modifiedlld/COFF/MinGW.cpp
The file was removedlld/test/COFF/wrap-real-missing.s
The file was modifiedlld/COFF/LTO.cpp
The file was removedlld/test/COFF/wrap-i386.s
The file was modifiedlld/COFF/MinGW.h
The file was modifiedlld/MinGW/Options.td
The file was modifiedlld/COFF/SymbolTable.cpp
The file was removedlld/test/COFF/wrap.s
The file was removedlld/test/COFF/wrap-lto-2.ll
The file was modifiedlld/COFF/Driver.cpp
The file was removedlld/test/COFF/wrap-with-archive.s
The file was removedlld/test/COFF/wrap-import.ll
The file was removedlld/test/COFF/wrap-lto-1.ll
The file was modifiedlld/test/MinGW/driver.test
The file was modifiedlld/COFF/Options.td
Commit cf6fd404f339c4bab4f246fb131435553aadc940 by nicolas.vasilache
[mlir][Linalg] NFC - Rename test files s/_/-/g
The file was removedmlir/test/Dialect/Linalg/parallel_loops.mlir
The file was addedmlir/test/Dialect/Linalg/tile-conv-padding.mlir
The file was addedmlir/test/Dialect/Linalg/parallel-loops.mlir
The file was addedmlir/test/Dialect/Linalg/tile-indexed-generic.mlir
The file was removedmlir/test/Dialect/Linalg/tile_indexed_generic.mlir
The file was removedmlir/test/Dialect/Linalg/tile_conv.mlir
The file was addedmlir/test/Dialect/Linalg/tile-conv.mlir
The file was addedmlir/test/Dialect/Linalg/tile-simple-conv.mlir
The file was addedmlir/test/Dialect/Linalg/fusion-indexed-generic.mlir
The file was removedmlir/test/Dialect/Linalg/tile_conv_padding.mlir
The file was removedmlir/test/Dialect/Linalg/fusion_indexed_generic.mlir
The file was removedmlir/test/Dialect/Linalg/tile_parallel.mlir
The file was removedmlir/test/Dialect/Linalg/tile_parallel_reduce.mlir
The file was addedmlir/test/Dialect/Linalg/tile-parallel.mlir
The file was removedmlir/test/Dialect/Linalg/tile_simple_conv.mlir
The file was addedmlir/test/Dialect/Linalg/tile-parallel-reduce.mlir
Commit 2aad6a0884e3372fef8176902cf984d2f385d938 by pklausler
[flang][msvc] Avoid a reinterpret_cast

The call to the binary->decimal formatter in real.cpp was cheating
by using a reinterpret_cast<> to extract its binary value.
Use a more principled and portable approach by extending the
API of evaluate::Integer<> to include ToUInt<>()/ToSInt<>()
member function templates that do the "right" thing.  Retain
ToUInt64()/ToSInt64() for compatibility.

Differential revision: https://reviews.llvm.org/D89435
The file was modifiedflang/include/flang/Evaluate/integer.h
The file was modifiedflang/lib/Evaluate/real.cpp
Commit 6abc15ae3c245b6043f15d3cdedfad187888dfd5 by Louis Dionne
[libc++] Reduce dependencies on <iostream> from <random>

We included <istream> and <ostream> from <random>, but really it is
sufficient to include <iosfwd> if we make sure we access ios_base
members through a dependent type. This allows us to break a hard
dependency of <random> on locales.
The file was modifiedlibcxx/include/ios
The file was modifiedlibcxx/include/random
The file was modifiedlibcxx/include/iosfwd
Commit 67f189e93ce3c25db74697551a77831a72b34929 by kzhuravl_dev
Make sure both cc1 and cc1as process -m[no-]code-object-v3

Differential Revision: https://reviews.llvm.org/D89478
The file was modifiedclang/test/Driver/amdgpu-features.c
The file was addedclang/test/Driver/amdgpu-features-as.s
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 224fd6ff48e26840f11f870faf2bde124dc2d261 by anhtuyen
[NFC][CaptureTracking] Move static function isNonEscapingLocalObject to llvm namespace

Function isNonEscapingLocalObject is a static one within BasicAliasAnalysis.cpp.
It wraps around PointerMayBeCaptured of CaptureTracking, checking whether a pointer
is to a function-local object, which never escapes from the function.

Although at the moment, isNonEscapingLocalObject is used only by BasicAliasAnalysis,
its functionality can be used by other pass(es), one of which I will put up for review
very soon. Instead of copying the contents of this static function, I move it to llvm
scope, and place it amongst other functions with similar functionality in CaptureTracking.

The rationale for the location are:
- Pointer escape and pointer being captured are actually two sides of the same coin
- isNonEscapingLocalObject is wrapping around another function in CaptureTracking

Reviewed By: jdoerfert (Johannes Doerfert)

Differential Revision: https://reviews.llvm.org/D89465
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/include/llvm/Analysis/CaptureTracking.h
Commit 77fb8cbd60cfd185b710886c4fe53e1865f24ce8 by spatel
[InstCombine] update tests for logic folds to exercise commuted patterns; NFC

This was the intent for D88551.
I also varied the types a bit for extra coverage
and tried to make better test/value names.
The file was modifiedllvm/test/Transforms/InstCombine/xor.ll
Commit 3785a413feef896e8a022731cc6ed405d5ebe81b by martin
Reapply [LLD] [COFF] Implement a GNU/ELF like -wrap option

Add a simple forwarding option in the MinGW frontend, and implement
the private -wrap option in the COFF linker.

The feature in lld-link isn't gated by the -lldmingw option, but
the option is left as a private, undocumented option primarily
used by the MinGW driver.

The implementation is significantly based on the support for --wrap
in the ELF linker, but many small nuance details are different
between the ELF and COFF linkers, ending up with more than a few
implementation differences.

This fixes https://bugs.llvm.org/show_bug.cgi?id=47384.

Differential Revision: https://reviews.llvm.org/D89004

Reapplied with the bitfield member canInline fixed so it doesn't break
builds targeting windows.
The file was modifiedlld/COFF/SymbolTable.cpp
The file was modifiedlld/COFF/Symbols.h
The file was addedlld/test/COFF/wrap-i386.s
The file was addedlld/test/COFF/wrap-real-missing.s
The file was modifiedlld/test/MinGW/driver.test
The file was modifiedlld/COFF/MinGW.cpp
The file was addedlld/test/COFF/wrap-lto-1.ll
The file was modifiedlld/MinGW/Options.td
The file was modifiedlld/COFF/LTO.cpp
The file was modifiedlld/COFF/MinGW.h
The file was modifiedlld/COFF/Options.td
The file was modifiedlld/COFF/InputFiles.h
The file was modifiedlld/MinGW/Driver.cpp
The file was addedlld/test/COFF/wrap-lto-2.ll
The file was modifiedlld/COFF/Driver.cpp
The file was addedlld/test/COFF/wrap-import.ll
The file was addedlld/test/COFF/wrap.s
The file was addedlld/test/COFF/wrap-with-archive.s
Commit 9c728a7cbf5df69627966b823d30daa6cfe2426d by silvasean
[mlir] Fix typo in LangRef
The file was modifiedmlir/docs/LangRef.md
Commit ee491ac91e123b90eeec3cce7e494936ea8cb85d by silvasean
[mlir] Add std.tensor_to_memref op and teach the infra about it

The opposite of tensor_to_memref is tensor_load.

- Add some basic tensor_load/tensor_to_memref folding.
- Add source/target materializations to BufferizeTypeConverter.
- Add an example std bufferization pattern/pass that shows how the
  materialiations work together (more std bufferization patterns to come
  in subsequent commits).
  - In coming commits, I'll document how to write composable
  bufferization passes/patterns and update the other in-tree
  bufferization passes to match this convention. The populate* functions
  will of course continue to be exposed for power users.

The naming on tensor_load/tensor_to_memref and their pretty forms are
not very intuitive. I'm open to any suggestions here. One key
observation is that the memref type must always be the one specified in
the pretty form, since the tensor type can be inferred from the memref
type but not vice-versa.

With this, I've been able to replace all my custom bufferization type
converters in npcomp with BufferizeTypeConverter!

Part of the plan discussed in:
https://llvm.discourse.group/t/what-is-the-strategy-for-tensor-memref-conversion-bufferization/1938/17

Differential Revision: https://reviews.llvm.org/D89437
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.h
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/lib/Transforms/Bufferize.cpp
The file was modifiedmlir/include/mlir/Transforms/Bufferize.h
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/CMakeLists.txt
The file was addedmlir/lib/Dialect/StandardOps/Transforms/Bufferize.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was addedmlir/test/Dialect/Standard/bufferize.mlir
The file was addedmlir/test/Dialect/Standard/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Standard/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td
Commit 351317167e2b28aad03f8e45e0ed0acbbff18c61 by erik.pilkington
[SemaObjC] Fix composite pointer type calculation for `void*` and pointer to lifetime qualified ObjC pointer type

Fixes a regression introduced in 9a6f4d451ca7. rdar://70101809

Differential revision: https://reviews.llvm.org/D89475
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaObjCXX/arc-ptr-comparison.mm
Commit 3f738d1f5e2d657993a51ca3fe56585268025d89 by tlively
Reland "[WebAssembly] v128.load{8,16,32,64}_lane instructions"

This reverts commit 7c8385a352ba21cb388046290d93b53dc273cd9f with a typing fix
to an instruction selection pattern.
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
The file was addedllvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedllvm/test/MC/WebAssembly/simd-encodings.s
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
Commit d1beb95d1241ec50bdf19db351d273374a146a4a by Stanislav.Mekhanoshin
[AMDGPU] gfx1032 target

Differential Revision: https://reviews.llvm.org/D89487
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx1030_new.s
The file was modifiedclang/include/clang/Basic/Cuda.h
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
The file was modifiedllvm/test/MC/AMDGPU/gfx1030_err.s
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
Commit 2f63e57fa59e7fbfe5999ec1e6e60fa7a2ba70bb by eugenis
[MTE] Pin the tagged base pointer to one of the stack slots.

Summary:
Pin the tagged base pointer to one of the stack slots, and (if
necessary) rewrite tag offsets so that an object that occupies that
slot has both address and tag offsets of 0. This allows ADDG
instructions for that object to be eliminated and their uses replaced
with the tagged base pointer itself.

This optimization must be done in machine instructions and not in the IR
instrumentation pass, because referring to a stack slot through an IRG
pointer would confuse the stack coloring pass.

The optimization makes a (pretty naive) attempt to find the slot that
would benefit the most by counting the uses of stack slots in the
function.

Reviewers: ostannard, pcc

Subscribers: merge_guards_bot, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72365
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
The file was modifiedllvm/test/CodeGen/AArch64/irg_sp_tagp.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Commit 2e794a46b58c5878c5ab71c8517c5417f791860e by eugenis
[AArch64] Stack frame reordering.

Implement stack frame reordering in the AArch64 backend.

Unlike the X86 implementation, AArch64 does not seem to benefit from
"access density" based frame reordering, mainly because it has a much
smaller variety of addressing modes, and the fact that all instructions
are 4 bytes so each frame object is either in range of an instruction
(and then the access is "free") or not (and that has a code size cost
of 4 bytes).

This change improves Memory Tagging codegen by
* Placing an object that has been chosen as the base tagged pointer of
the function at SP + 0. This saves one instruction to setup the pointer
(IRG does not have an offset immediate), and more because that object
can now be referenced without materializing its tagged address in a
scratch register.
* Placing objects that go out of scope simultaneously together. This
exposes opportunities for instruction merging in tryMergeAdjacentSTG.

Differential Revision: https://reviews.llvm.org/D72366
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/settag-merge-order.ll
The file was modifiedllvm/test/CodeGen/AArch64/settag-merge.ll
Commit 6601dfb0b8c78cdd5de0e50fb3549f9b8f947eb3 by thakis
[gn bulid] Remove phantom WebAssembly tablegen() calls

Apparenlty I added these in https://reviews.llvm.org/rL350628 but
I'm not sure why. They never existed in the CMake build, and now
they're causing trouble.
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
Commit b3d2df42f7ac60ff7645cf944a93f0fde144a195 by lebedev.ri
[NFC][SCEV] Autogenerate check lines in tests being affected by upcoming patch
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/load.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/scalable-vector.ll
Commit dfdfcdc8d3c99cfe9fdef7c604ecc3b165e79572 by lebedev.ri
[NFC][LSR] Autogenerate check lines in tests being affected by upcoming patch
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll
Commit 2008dacf6ed3fbb862769c6936fd615c4ae05434 by lebedev.ri
[NFC][IndVars] Autogenerate check lines in tests being affected by upcoming patch
The file was modifiedllvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll
Commit 42ed3881200801651a2af47505dc7c59c0a5c959 by Alexander Timofeev
[AMDGPU] SILowerControlFlow::removeMBBifRedundant should not try to change MBB layout if it can fallthrough

removeMBBifRedundant normally tries to keep predecessors fallthrough when removing redundant MBB.
         It has to change MBBs layout to keep the new successor to immediately follow the predecessor of removed MBB.
         It only may be allowed in case the new successor itself has no successors to which it fall through.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D89397
The file was modifiedllvm/test/CodeGen/AMDGPU/collapse-endcf.mir
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Commit f6bf2823c44eb81be6c74d909c17d77e811b3bbc by michaelrj
[libc] Use entrypoints.txt as the single source of list of functions for a platform.

The function listings in api.td are removed. The same lists are now deduced using the information
in entrypoints.txt.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D89267
The file was modifiedlibc/utils/HdrGen/Main.cpp
The file was modifiedlibc/CMakeLists.txt
The file was modifiedlibc/utils/HdrGen/Generator.h
The file was modifiedlibc/config/linux/api.td
The file was modifiedlibc/cmake/modules/LLVMLibCHeaderRules.cmake
The file was modifiedlibc/utils/HdrGen/Generator.cpp
The file was modifiedlibc/utils/HdrGen/PublicAPICommand.h
The file was modifiedlibc/utils/HdrGen/PublicAPICommand.cpp
Commit 68f116aa23434b577743307c487b2edf037fca4c by richard
PR47864: Fix assertion in pointer-to-member emission if there are
multiple declarations of the same base class.
The file was modifiedclang/include/clang/AST/RecordLayout.h
The file was modifiedclang/test/CodeGenCXX/pointers-to-data-members.cpp
Commit 65cb4fdd69f43b6c39a8e4ca27b509284b11d807 by yitzhakm
[libTooling] Change `after` range-selector to operate only on source ranges

Currently, `after` fails when applied to locations in macro arguments.  This
change projects the subrange into a file source range and then applies `after`.

Differential Revision: https://reviews.llvm.org/D89468
The file was modifiedclang/lib/Tooling/Transformer/RangeSelector.cpp
The file was modifiedclang/unittests/Tooling/RangeSelectorTest.cpp
Commit 89c0124273339076b25bf860f6c2ee765ab96db3 by flo
[LoopVersion] Unify SCEVChecks and alias check handling (NFC).

This is an initial cleanup of the way LoopVersioning interacts with LAA.

Currently LoopVersioning has 2 ways of initializing things:

1. Passing LAI and passing UseLAIChecks = true
2. Passing UseLAIChecks = false, followed by calling setSCEVChecks and
   setAliasChecks.

Both ways of initializing lead to the same result and the duplication
seems more complicated than necessary.

This patch removes the UseLAIChecks flag from the constructor and the
setSCEVChecks & setAliasChecks helpers and move initialization
exclusively to the constructor.

This simplifies things, by providing a single way to initialize
LoopVersioning and reducing duplication.

Reviewed By: Meinersbur, lebedev.ri

Differential Revision: https://reviews.llvm.org/D84406
The file was modifiedllvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopDistribute.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopVersioning.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopVersioning.h
Commit 122d92dfc31f27263f281244756f576147cec1f6 by vtjnash
fix symbol printing on windows

Similar to MCSymbol::print in 3d6c8ebb584375d01b1acead4c2056b3f0c501fc
(llvm-svn: 81682, PR4966), these symbols may need to be quoted to be handled by
the linker correctly.

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D87099
The file was modifiedllvm/test/CodeGen/X86/dllexport.ll
The file was modifiedllvm/lib/IR/Mangler.cpp
Commit 1992e30c2d751f6f1f6ad5190f84e37dece04f7f by tlively
[WebAssembly] Prototype i8x16.popcnt

As proposed at https://github.com/WebAssembly/simd/pull/379. Use a target
builtin and intrinsic rather than normal codegen patterns to make the
instruction opt-in until it is merged to the proposal and stabilized in engines.

Differential Revision: https://reviews.llvm.org/D89446
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
The file was modifiedllvm/test/MC/WebAssembly/simd-encodings.s
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
Commit 79829a47040512fe54001db839ac59146ca55aec by leonardchan
Revert "[clang] Add -fc++-abi= flag for specifying which C++ ABI to use"

This reverts commits 683b308c07bf827255fe1403056413f790e03729 and
8487bfd4e9ae186f9f588ef989d27a96cc2438c9.

We will go for a more restricted approach that does not give freedom to
everyone to change ABIs on whichever platform.

See the discussion on https://reviews.llvm.org/D85802.
The file was modifiedclang/include/clang/Basic/TargetCXXABI.h
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was modifiedclang/include/clang/Driver/Options.td
The file was removedclang/test/Frontend/invalid-cxx-abi.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/lib/CodeGen/ItaniumCXXABI.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was removedclang/include/clang/Basic/TargetCXXABI.def
The file was modifiedclang/include/clang/Basic/LangOptions.h
The file was modifiedclang/lib/AST/ASTContext.cpp
Commit e384e94fbe7c1d5c89fcdde33ffda04e9802c2ce by Yaxun.Liu
Revert "[HIP] Change default --gpu-max-threads-per-block value to 1024"

This reverts commit 187658b8a6112446d9e7797d495bc7542ac83905 due to
AMDGPU backend issues.
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/test/CodeGenCUDA/kernel-amdgcn.cu
The file was modifiedclang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
Commit 410e5b17cf11691de7775315dbf9d5e94f5c4808 by marukawa
[VE] Support fabs/fcos/fsin/fsqrt math functions

VE doesn't have instruction for fabs/fcos/fsin/fsqrt, so expand them.
Add regression tests also.  Update fcopysign regression test, also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D89457
The file was addedllvm/test/CodeGen/VE/fsin.ll
The file was addedllvm/test/CodeGen/VE/fcopysign.ll
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
The file was addedllvm/test/CodeGen/VE/fcos.ll
The file was removedllvm/test/CodeGen/VE/fp_copysign.ll
The file was addedllvm/test/CodeGen/VE/fabs.ll
The file was addedllvm/test/CodeGen/VE/fsqrt.ll
Commit a91dd3d37d3f10831e544c5a797b3837b7e5744a by marukawa
[VE] Add VGT/VSC/PFCHV instructions

Add VGT/VSC/PFCHV vector instructions and regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D89471
The file was addedllvm/test/MC/VE/VGT.s
The file was modifiedllvm/lib/Target/VE/VEInstrVec.td
The file was addedllvm/test/MC/VE/PFCHV.s
The file was addedllvm/test/MC/VE/VSC.s
Commit 6754caa9bf21a759c4080a797f23e2b7a77a71e1 by jingham
Add an SB API to get the SBTarget from an SBBreakpoint

Differential Revision: https://reviews.llvm.org/D89358
The file was modifiedlldb/bindings/interface/SBBreakpoint.i
The file was modifiedlldb/include/lldb/API/SBBreakpoint.h
The file was modifiedlldb/source/API/SBBreakpoint.cpp
The file was modifiedlldb/test/API/python_api/breakpoint/TestBreakpointAPI.py

Summary

  1. [zorg] [PowerPC] Limit number of threads to 20 on clang-ppc64le-rhel buildbot (details)
Commit 2fc811d0946a8a2a9eb3fd3f4931d0a960593fd3 by saghir
[zorg] [PowerPC] Limit number of threads to 20 on clang-ppc64le-rhel buildbot

Earlier, we reduced the number of threads to 64 but we were still seeing
sanitizer tests failing. We experimented with the number of threads and saw
20 threads working fine for the bot. This patch reduces the number of threads
from 64 to 20 on the clang-ppc64le-rhel buildbot.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D88746
The file was modifiedbuildbot/osuosl/master/config/builders.py