FailedChanges

Summary

  1. Rename EHPersonality::MSVC_Win64SEH to EHPersonality::MSVC_TableSEH. NFC. (details)
  2. [NFC][UBSAN] Remove XFAIL from fixed tests (details)
  3. [NFC][UBSAN] Try to re-enable tests on IOS (details)
  4. [NFC][Asan] Fix cpplint warnings in tests (details)
  5. [NFC][Asan] Fix cpplint warning in test (details)
  6. [NFC][Sanitizer] format sanitizer_platform_interceptors.h (details)
  7. [llvm-exegesis] Update doc. (details)
  8. [AArch64] Additional Interleaving Access test. NFC (details)
  9. [AArch64] Remove AArch64ISD::NOT, use vnot instead (details)
  10. Re-enable "[SCEV] Prove implications of different type via truncation" (details)
  11. [llvm-exegesis] Do not silently fail on unknown instruction encoding formats. (details)
  12. [VE] Specify to expand BRIND and BR_JT (details)
  13. [VE][NFC] Fix typo in comment (details)
  14. [llvm-exegesis][doc] Remove old FIXME. (details)
  15. [VE] Add vector iterative operation instructions (details)
  16. [testing] Add missing REQUIRES: asserts (details)
  17. [VE] Add vector merger operation instructions (details)
  18. [DSE] Use walker to skip noalias stores between current & clobber def. (details)
  19. [yaml2obj] - Support the "Offset" key for the .dynsym section. (details)
Commit 4c0a016927872c0c820c0ea5507df102fd8b9b58 by me
Rename EHPersonality::MSVC_Win64SEH to EHPersonality::MSVC_TableSEH. NFC.

The types of SEH aren't x86(-32) vs x64 but rather stack-based exception chaining
vs table-based exception handling. x86-32 is the only arch for which Windows
uses the former. 32-bit ARM would use what is called Win64SEH today, which
is a bit confusing so instead let's just rename it to be a bit more clear.

Reviewed By: compnerd, rnk

Differential Revision: https://reviews.llvm.org/D90117
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/include/llvm/Analysis/EHPersonalities.h
The file was modifiedllvm/lib/Analysis/EHPersonalities.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/WinException.cpp
Commit 58828f6a93cd290cde2bf657a7c96a7399a328c1 by Vitaly Buka
[NFC][UBSAN] Remove XFAIL from fixed tests
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-blacklist.c
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/unsigned-integer-truncation-blacklist.c
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/integer-sign-change-blacklist.c
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c
Commit 8ecf1c4969bd7c18b09d6aa607eb95a14ac309e2 by Vitaly Buka
[NFC][UBSAN] Try to re-enable tests on IOS

Looks like the reason they were disabled is the same as for Android
and it's fixed by 776a15d8aecad2768f1391092099e9b173b8148b
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/unsigned-integer-truncation-blacklist.c
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/integer-sign-change-blacklist.c
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-or-sign-change-blacklist.c
The file was modifiedcompiler-rt/test/ubsan/TestCases/ImplicitConversion/signed-integer-truncation-blacklist.c
Commit 2a6b156311fd67ea514b37dbcf52bf7f08edb4f2 by Vitaly Buka
[NFC][Asan] Fix cpplint warnings in tests
The file was modifiedcompiler-rt/test/asan/TestCases/strncat-overlap.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/strcpy-overlap.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/strncpy-overlap.cpp
Commit 48bc38f25424927b0511b3c7c561bddfc19b9773 by Vitaly Buka
[NFC][Asan] Fix cpplint warning in test
The file was modifiedcompiler-rt/test/asan/TestCases/strcat-overlap.cpp
Commit d1b9c0fd1dce19c566008d9b4128551d4116d0c0 by Vitaly Buka
[NFC][Sanitizer] format sanitizer_platform_interceptors.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Commit 992da89450d6080db3a23ca3e3df09f1ebecb0af by courbet
[llvm-exegesis] Update doc.

We don't need an external script to scan all opcodes anymore, just use
`-opcode-index=-1`.
The file was modifiedllvm/docs/CommandGuide/llvm-exegesis.rst
Commit ecd4f3fccb04f1968e6ddb0171221a7c28346d4b by david.green
[AArch64] Additional Interleaving Access test. NFC
The file was addedllvm/test/Transforms/InterleavedAccess/AArch64/binopshuffles.ll
Commit 066737fdbc8fe22c48649c388ff2421d596ba2a8 by david.green
[AArch64] Remove AArch64ISD::NOT, use vnot instead

vnot (xor -1) should be equivalent to the AArch64 specific AArch64ISD::NOT
node, but allow more folding thanks to all the target independent
optimizations. Specifically this allows select(icmp ne, x, y) to
become "cmeq; bsl y, x" as opposed to needing to convert the predicate
with "cmeq; mvn; bsl x, y"

Unfortunately there is a regression in a cmtst test, but the code it
selected from was already non-canonical, with instcombine preferring to
use an eq predicate instead. Plus the more common case of icmp ne is
improved.

Differential Revision: https://reviews.llvm.org/D90126
The file was modifiedllvm/test/CodeGen/AArch64/srem-seteq-vec-nonsplat.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/urem-seteq-vec-nonsplat.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/vec_umulo.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/vector-select.ll
Commit 5ef84688fba28b9f0f69ddc9a5beb75b10696798 by mkazantsev
Re-enable "[SCEV] Prove implications of different type via truncation"

When we need to prove implication of expressions of different type width,
the default strategy is to widen everything to wider type and prove in this
type. This does not interact well with AddRecs with negative steps and
unsigned predicates: such AddRec will likely not have a `nuw` flag, and its
`zext` to wider type will not be an AddRec. In contraty, `trunc` of an AddRec
in some cases can easily be proved to be an `AddRec` too.

This patch introduces an alternative way to handling implications of different
type widths. If we can prove that wider type values actually fit in the narrow type,
we truncate them and prove the implication in narrow type.

The return was due to revert of underlying patch that this one depends on.

Unit test temporarily disabled because the required logic in SCEV is switched
off due to compile time reasons.

Differential Revision: https://reviews.llvm.org/D89548
The file was modifiedllvm/unittests/Analysis/ScalarEvolutionTest.cpp
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/srem.ll
Commit 7e2ffe7a6358820c0f1511f3405d3fa8db4c46f4 by courbet
[llvm-exegesis] Do not silently fail on unknown instruction encoding formats.

The addition of TILELOADD instructions with a new encoding format
triggered a hard abort instead of proper error reporting due to the use
of `llvm_unreachable` for actually reachable code.
Properly report an error when the encoding format is unknown.

Differential Revision: https://reviews.llvm.org/D90289
The file was modifiedllvm/tools/llvm-exegesis/lib/X86/Target.cpp
Commit b22e32a9c8ad5d6c7e21e1fe907cd8c85d37c9c3 by marukawa
[VE] Specify to expand BRIND and BR_JT

BRIND and BR_JT are not implmented yet, so expand them atm.
Add regression tests too.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D90283
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
The file was addedllvm/test/CodeGen/VE/br_jt.ll
The file was addedllvm/test/CodeGen/VE/brind.ll
Commit 15f6250bed38e3dd39036daff4a318dd6512959d by marukawa
[VE][NFC] Fix typo in comment
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
Commit a098f32a1fc8c003d8f9cfac131ed49d40502d31 by courbet
[llvm-exegesis][doc] Remove old FIXME.

This was fixed in a previous commit, the previous line in the
documentation explains how to proceed.
The file was modifiedllvm/docs/CommandGuide/llvm-exegesis.rst
Commit 7ce2b93cbe152b3047de963b7c32277e1a567d03 by marukawa
[VE] Add vector iterative operation instructions

Add VFIA/VFIS/VFIM/VFIAM/VFISM/VFIMA/VFIMS isntructions.
Add regression tests too.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D90252
The file was addedllvm/test/MC/VE/VFIM.s
The file was modifiedllvm/lib/Target/VE/VEInstrVec.td
The file was addedllvm/test/MC/VE/VFIMA.s
The file was addedllvm/test/MC/VE/VFIS.s
The file was addedllvm/test/MC/VE/VFISM.s
The file was addedllvm/test/MC/VE/VFIMS.s
The file was addedllvm/test/MC/VE/VFIA.s
The file was addedllvm/test/MC/VE/VFIAM.s
Commit 419168d9381959ec6850e9e87aff9d062b68ef4b by dave
[testing] Add missing REQUIRES: asserts
The file was modifiedllvm/test/Transforms/JumpThreading/thread-prob-1.ll
Commit cbdee7df06b4a63d01b37842423db24ca117f422 by marukawa
[VE] Add vector merger operation instructions

Add VMRG/VSHF/VCP/VEX isntructions.  Add regression tests too.
Also add new patterns to parse new UImm4 oeprand.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D90292
The file was modifiedllvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
The file was modifiedllvm/lib/Target/VE/VEInstrVec.td
The file was addedllvm/test/MC/VE/VCP.s
The file was addedllvm/test/MC/VE/VEX.s
The file was addedllvm/test/MC/VE/VSHF.s
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was addedllvm/test/MC/VE/VMRG.s
Commit b82f80057d69564a889f1439a683c3544d30b7fa by flo
[DSE] Use walker to skip noalias stores between current & clobber def.

Instead of getting the defining access we should be able to use
getClobberingMemoryAccess to skip non-aliasing MemoryDefs. No additional
checks should be needed, because we only remove the starting def if it
matches the defining access of the load. All we need to worry about is
that there are no (may)alias stores between the starting def and the
load and getClobberingMemoryAccess should guarantee that.

Partly fixes PR47887.

This improves the number of redundant stores removed in some cases
(numbers below for MultiSource, SPEC2000, SPEC2006 on X86 with -flto
-O3).

Same hash: 226 (filtered out)
Remaining: 11
Metric: dse.NumRedundantStores

Program                                        base   patch1 diff
test-suite...:: External/Povray/povray.test     1.00   5.00 400.0%
test-suite...chmarks/MallocBench/gs/gs.test     1.00   3.00 200.0%
test-suite...0/253.perlbmk/253.perlbmk.test    21.00  37.00 76.2%
test-suite...0.perlbench/400.perlbench.test    24.00  37.00 54.2%
test-suite.../Applications/SPASS/SPASS.test     3.00   4.00 33.3%
test-suite...006/453.povray/453.povray.test    15.00  18.00 20.0%
test-suite...T2006/445.gobmk/445.gobmk.test    27.00  29.00  7.4%
test-suite.../CINT2006/403.gcc/403.gcc.test   136.00 137.00  0.7%
test-suite.../CINT2000/176.gcc/176.gcc.test     6.00   6.00  0.0%
test-suite.../Benchmarks/Bullet/bullet.test    NaN     3.00  nan%
test-suite.../Benchmarks/Ptrdist/bc/bc.test    NaN     1.00  nan%

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D89647
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/noop-stores.ll
Commit edfb2f8b235ff72f00375ae2424f7eb98da08234 by grimar
[yaml2obj] - Support the "Offset" key for the .dynsym section.

Our "implicit" sections are handled separately from regular ones.
It turns out that the "Offset" key is not handled properly for them.

Perhaps we can generalize handling in one place, but before doing that I'd like
to add support and test cases for each implicit section.
(I need this particular single change to unblock another patch that is already on review,
and I guess doing it independently for each section will be cleaner, see below).

In this patch I've removed `explicit-dynsym-no-dynstr.yaml` to `dynsym-section.yaml`
and added the new test into. In a follow-up we probably might want
to merge 2 another existent `dynsymtab-*.yaml` tests into it too.

Differential revision: https://reviews.llvm.org/D90224
The file was addedllvm/test/tools/yaml2obj/ELF/dynsym-section.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was removedllvm/test/tools/yaml2obj/ELF/explicit-dynsym-no-dynstr.yaml