FailedChanges

Summary

  1. [AMDGPU] Use -strict-whitespace for GFX8 and GFX9 disassembler tests (details)
  2. [WebAssembly] Fix incorrectly named target builtin (details)
  3. [clangd] Fix a null dereference in tests. (details)
  4. [debuginfo-tests][dexter] add requires lldb to two tests (details)
  5. [AVR][clang] Pass the address of the data section to the linker for ATmega328 (details)
  6. [llvm-mc] Drop unneeded dependency on CodeGen (details)
  7. Add a `mlirModuleGetBody()` accessor to the C API and bind it in Python (details)
  8. [clangd] Don't offer to expand auto in structured binding declarations. (details)
  9. [CostModel] remove cost-kind predicate for funnel shift costs (details)
  10. [Clang][PowerPC] Add __vector_pair and __vector_quad types (details)
  11. [clang][ToolChains] explicitly return LangOptions::StackProtectorMode (details)
  12. [CostModel][x86] remove cost-kind predicate for intrinsic costs (details)
  13. [NFC][TSAN] Logs to debug test script on bot (details)
  14. [mlir] NFC: fix trivial typos (details)
  15. [DebugInfo] Fix legacy ZExt emission when FromBits >= 64 (PR47927) (details)
  16. [DebugInfo] Shorten legacy [s|z]ext dwarf expressions (details)
  17. [lldb] Delete lldb/utils/test (details)
  18. [SLP][Test] Precommit test case for PR47629. NFC. (details)
  19. [openmp][openacc] Check for duplicate clauses for directive (details)
  20. [NFC] Use Register in RegisterPressure APIs (details)
  21. [clangd] Go-to-definition from non-renaming alias is unambiguous. (details)
  22. [libc++] Refactor tests to remove uses of std::rand() (details)
  23. [GISel]: Few InsertVecElt combines (details)
  24. [NFC][ThinLTO] Change command line passing to EmbedBitcodeInModule (details)
  25. [libc++] Fix a few warnings (details)
  26. [AArch64] Use DUP for BUILD_VECTOR with few different elements. (details)
  27. [Clang][OpenMP] Added the support for target data nowait (details)
  28. [test] Make bt_order_by_weight in switch.ll more robust (details)
  29. [DebugInfo] Support for DW_TAG_generic_subrange (details)
  30. [DebugInfo] Expose Fortran array debug info attributes through DIBuilder. (details)
  31. [mlir] Convert memref_reshape to memref_reinterpret_cast. (details)
  32. [MemLoc]  Adjust memccpy support in MemoryLocation::getForArgument (details)
  33. Split out llvm/Support/FileSystem/UniqueID.h and clang/Basic/FileEntry.h, NFC (details)
  34. [mlir] Use OpBuilderDAG for MemRefReinterpretCastOp. (details)
  35. [gn build] Port 23ed570af1c (details)
  36. [llvm-lit] Improve the error message when make_paths_relative() fails (details)
  37. [libc++] Re-apply the switch-based std::variant implementation (details)
  38. [mlir] Properly handle recursive bufferization for scf.for/scf.if (details)
  39. PR48002: Fix injection of elaborated-type-specifiers within local (details)
  40. [Deref] Use maximum trip count instead of exact trip count (details)
  41. [AMDGPU] Fix inserting combined s_nop in bundles (details)
  42. [AArch64] Improve lowering of insert_vector_elt with 0.0 consts. (details)
  43. [TableGen] Treat reg as isolated in reg$foo (but not in ${foo}reg) (details)
  44. [AMDGPU] Fix double space in disassembly of SDWA instructions with vcc (details)
  45. [InstCombine] Do not introduce bitcasts for swifterror arguments. (details)
  46. [AMDGPU] Allow some modifiers on VOP3B instructions (details)
  47. [GWP-ASan] Abstract the thread local variables access (details)
  48. C API: support scalable vectors (details)
  49. [llvm-install-name-tool] Quote passed rpath args in error messages (details)
  50. Better source location for -Wignored-qualifiers on trailing return types (details)
  51. [Sema] Let getters assert that trailing return type exists, NFCI (details)
Commit 572289b39ccfacb8afb464bbd96a4a699bfc1838 by jay.foad
[AMDGPU] Use -strict-whitespace for GFX8 and GFX9 disassembler tests
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
Commit 5b464f2aa514903cad2f2160dd613b74b0cee3da by tlively
[WebAssembly] Fix incorrectly named target builtin

Rename __builtin_wasm_q15mulr_saturate_s_i8x16 to
__builtin_wasm_q15mulr_saturate_s_i16x8, fixing the implied lane interpretation
of the result.
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 68b48339e5b2e7c5f9b74e790b4a4e2419a0a50b by kadircet
[clangd] Fix a null dereference in tests.
The file was modifiedclang-tools-extra/clangd/unittests/support/TraceTests.cpp
Commit f2f4554f88040954ec0059764ef412a97ce5f19a by Tom.Weaver
[debuginfo-tests][dexter] add requires lldb to two tests

both deferred_globals.cpp namespace.cpp require lldb in order to run and will
fail if it's not available.

add the required lines to the top of the tests.
The file was modifieddebuginfo-tests/dexter-tests/deferred_globals.cpp
The file was modifieddebuginfo-tests/dexter-tests/namespace.cpp
Commit 88b7b76a0b2365fe4ea9f686c6346667bfe48488 by me
[AVR][clang] Pass the address of the data section to the linker for ATmega328

This patch modifies the Clang AVR toolchain so that it always passes
the '-Tdata=0x800100' to the linker for ATmega328 devices. This matches
AVR-GCC behaviour, and also corresponds to the address of the start of
the data section in data space according to the ATmega328 datasheet.

Without this, clang does not produce a valid ATmega328 binary.

When targeting all non-ATmega328 chips, a warning will be emitted due to
the fact that proper handling for the chips data section address is
not yet implemented.

I've held off adding other microcontrollers for now, mostly because the
AVR toolchain logic is smeared across LLVM core TableGen files, and two Clang
libraries. The 'family detection' logic is also only implemented for
ATmega328 at the moment, for similar reasons.

In the future, I aim to write an RFC to llvm-dev to find a better way
for LLVM to expose target-specific details such as these to compiler
frontends.

Differential Revision: https://reviews.llvm.org/D86629
The file was modifiedclang/lib/Driver/ToolChains/AVR.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
Commit 7011a2f3504b43e57eda5dbc1f23a3f9c1b44593 by i
[llvm-mc] Drop unneeded dependency on CodeGen

Spot by Craig Topper.
The file was modifiedllvm/tools/llvm-mc/CMakeLists.txt
Commit 72023442c1eb3169389f469d4b804aff93497758 by joker.eph
Add a `mlirModuleGetBody()` accessor to the C API and bind it in Python

Getting the body of a Module is a common need which justifies a
dedicated accessor instead of forcing users to go through the
region->blocks->front unwrapping manually.

Differential Revision: https://reviews.llvm.org/D90287
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/test/Bindings/Python/dialects.py
The file was modifiedmlir/include/mlir-c/IR.h
Commit 87f03e13ce0e840d7eb9a4a6d805d117fe165672 by sam.mccall
[clangd] Don't offer to expand auto in structured binding declarations.

auto must be used for the code to parse.

Differential Revision: https://reviews.llvm.org/D89700
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/ExpandAutoType.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TweakTests.cpp
Commit 9df32c9044aa051bb12277388956ac7a828d4ff8 by spatel
[CostModel] remove cost-kind predicate for funnel shift costs

Completing the series of FIXME removals for special-case intrinsics:
50dfa19cc799
f2c25c70791d
c963bde0152a
01ea93d85d6e

This one looks quite different than the others. The size/blended
cost is still potentially very far off from the throughput cost,
but this is hopefully not worse on the whole. It looks like the
underlying costs for the expanded shift/logic have their own
cost-kind limitations. Also, we are not asking the target if
it has a legal funnel shift op, so we just assume that the
intrinsic gets expanded.
The file was modifiedllvm/test/Analysis/CostModel/ARM/intrinsic-cost-kinds.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
Commit 40dd4d5233d9f81705a24d91b48d2620e487b89d by baptiste.saleil
[Clang][PowerPC] Add __vector_pair and __vector_quad types

Define the __vector_pair and __vector_quad types that are used to manipulate
the new accumulator registers introduced by MMA on PowerPC. Because these two
types are specific to PowerPC, they are defined in a separate new file so it
will be easier to add other PowerPC specific types if we need to in the future.

Differential Revision: https://reviews.llvm.org/D81508
The file was modifiedclang/include/clang/Serialization/ASTBitCodes.h
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was addedclang/include/clang/Basic/PPCTypes.def
The file was modifiedclang/lib/AST/NSAPI.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was addedclang/test/CodeGen/ppc-mma-types.c
The file was modifiedclang/lib/Index/USRGeneration.cpp
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
The file was modifiedclang/lib/AST/Type.cpp
The file was modifiedclang/include/clang/AST/Type.h
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/lib/CodeGen/ItaniumCXXABI.cpp
The file was modifiedclang/include/clang/AST/TypeProperties.td
The file was modifiedclang/lib/Serialization/ASTCommon.cpp
The file was addedclang/test/AST/ast-dump-ppc-mma-types.c
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/lib/AST/PrintfFormatString.cpp
The file was modifiedclang/lib/AST/TypeLoc.cpp
The file was modifiedclang/lib/Sema/Sema.cpp
The file was addedclang/test/CodeGenCXX/ppc-mangle-mma-types.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/lib/CodeGen/CodeGenTypes.cpp
Commit cdff3bd932870cc9f84c6828cb1a7bb0df3c5fa0 by ndesaulniers
[clang][ToolChains] explicitly return LangOptions::StackProtectorMode

Make the virtual method Toolchain::GetDefaultStackProtectorLevel()
return an explict enum value rather than an integral constant. This
makes the code subjectively easier to read, and should help prevent bugs
that may (or may never) arise from changing the enum values. Previously,
these were just kept in sync via a comment, which is brittle. The trade
off is including a additional header in a few new places. It is not
necessary, but in my opinion helps the readability.

Split off from https://reviews.llvm.org/D90194 to help cut down on lines
changed in code review.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D90271
The file was modifiedclang/lib/Driver/ToolChains/CrossWindows.h
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.h
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Driver/ToolChains/OpenBSD.h
The file was modifiedclang/lib/Driver/ToolChains/PS4CPU.h
The file was modifiedclang/include/clang/Driver/ToolChain.h
The file was modifiedclang/lib/Driver/ToolChains/Darwin.h
Commit 7c395f31a63255fcb43e6cbebf66c3d642013087 by spatel
[CostModel][x86] remove cost-kind predicate for intrinsic costs

We model cost as number of instructions / uops, so it does not
make sense to treat size/blended costs any differently than
throughput.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
Commit 220293da53b5049ded67b1a251bd85069fa068e7 by Vitaly Buka
[NFC][TSAN] Logs to debug test script on bot
The file was modifiedcompiler-rt/lib/tsan/check_analyze.sh
The file was modifiedcompiler-rt/lib/tsan/analyze_libtsan.sh
Commit 41b09f4efff1a9cd82af2d7d7eeb9916a88332e5 by ishizaki
[mlir] NFC: fix trivial typos
fix typos in comments and documents

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D90089
The file was modifiedmlir/lib/Transforms/Utils/DialectConversion.cpp
The file was modifiedmlir/test/Transforms/buffer-placement-preparation.mlir
The file was modifiedmlir/tools/mlir-reduce/ReductionTreeUtils.cpp
The file was modifiedmlir/test/Transforms/buffer-placement-preparation-allowed-memref-results.mlir
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/lib/Conversion/VectorToROCDL/VectorToROCDL.cpp
The file was modifiedmlir/include/mlir/Reducer/Passes/OpReducer.h
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/lib/Transforms/SCCP.cpp
The file was modifiedmlir/include/mlir-c/Diagnostics.h
The file was modifiedmlir/include/mlir-c/StandardAttributes.h
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/lib/Analysis/Presburger/Simplex.cpp
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
The file was modifiedmlir/lib/IR/PatternMatch.cpp
The file was modifiedmlir/lib/TableGen/CMakeLists.txt
The file was modifiedmlir/test/mlir-tblgen/typedefs.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVTypes.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/TypeDetail.h
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Async/IR/AsyncOps.td
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
The file was modifiedmlir/lib/Transforms/Bufferize.cpp
The file was modifiedmlir/test/Transforms/normalize-memrefs-ops.mlir
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/integration_test/Dialect/Vector/CPU/test-create-mask-v4i1.mlir
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp
The file was modifiedmlir/tools/mlir-reduce/Passes/OpReducer.cpp
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/lib/Reducer/Tester.cpp
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/lib/IR/MLIRContext.cpp
The file was modifiedmlir/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
The file was modifiedmlir/lib/Interfaces/VectorInterfaces.cpp
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/include/mlir/Support/IndentedOstream.h
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
The file was modifiedmlir/lib/Interfaces/ControlFlowInterfaces.cpp
The file was modifiedmlir/tools/mlir-reduce/ReductionNode.cpp
Commit 99053462216cf835eb3ae063942c618d9609de87 by Vedant Kumar
[DebugInfo] Fix legacy ZExt emission when FromBits >= 64 (PR47927)

Fix an out-of-bounds shift in emitLegacyZExt by using a slightly more
complicated dwarf expression to create the zext mask.

This addresses a UBSan diagnostic seen when compiling compiler-rt
(llvm.org/PR47927).

rdar://70307714

Differential Revision: https://reviews.llvm.org/D89838
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
The file was addedllvm/test/DebugInfo/X86/legacy-zext.ll
Commit 2ce36ebca544dd71075a7818ff4070da5667603b by Vedant Kumar
[DebugInfo] Shorten legacy [s|z]ext dwarf expressions

Take advantage of the emitConstu helper to emit slightly shorter dwarf
expressions to implement legacy [s|z]ext operations.
The file was modifiedllvm/test/DebugInfo/X86/convert-inlined.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
The file was modifiedllvm/test/DebugInfo/X86/convert-debugloc.ll
Commit 158f3360438f92cefc60041dcb8db980d7d1c744 by Vedant Kumar
[lldb] Delete lldb/utils/test

These utilities aren't useful any more -- delete them as a cleanup.

Discussion:
http://lists.llvm.org/pipermail/lldb-dev/2020-October/016536.html
The file was removedlldb/utils/test/README-lldb-disasm
The file was removedlldb/utils/test/lldb-disasm.py
The file was removedlldb/utils/test/README-run-until-faulted
The file was removedlldb/utils/test/run-until-faulted.py
The file was removedlldb/utils/test/README-disasm
The file was removedlldb/utils/test/disasm.py
The file was removedlldb/utils/test/llvm-mc-shell.py
The file was removedlldb/utils/test/main.c
The file was removedlldb/utils/test/ras.py
The file was removedlldb/utils/test/run-dis.py
Commit fcd54b82e8cd5ef03d94c52971da955d02d07fdf by anton.a.afanasyev
[SLP][Test] Precommit test case for PR47629. NFC.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
Commit c89b645755418ad22ffae8e347f7e495943367f0 by clementval
[openmp][openacc] Check for duplicate clauses for directive

Check for duplicate clauses associated with directive. Clauses can appear only once
in the 4 lists associated with each directive (allowedClauses, allowedOnceClauses,
allowedExclusiveClauses, requiredClauses). Duplicates were already present (removed with this
patch) or were introduce in new patches by mistake (D89861).

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D90241
The file was addedllvm/test/TableGen/directive3.td
The file was modifiedllvm/utils/TableGen/DirectiveEmitter.cpp
The file was modifiedllvm/include/llvm/TableGen/DirectiveEmitter.h
The file was modifiedllvm/include/llvm/Frontend/OpenACC/ACC.td
Commit f0a98ad820afa5019bb009300a120a7f4a360925 by mtrofin
[NFC] Use Register in RegisterPressure APIs

Some related changes as well.

Differential Revision: https://reviews.llvm.org/D90268
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
The file was modifiedllvm/lib/CodeGen/RegisterPressure.cpp
The file was modifiedllvm/include/llvm/CodeGen/RegisterPressure.h
The file was modifiedllvm/include/llvm/CodeGen/MachineRegisterInfo.h
The file was modifiedllvm/include/llvm/CodeGen/TargetRegisterInfo.h
Commit 0e94836989a12e11b4717f01099e34dbc0ff25d4 by sam.mccall
[clangd] Go-to-definition from non-renaming alias is unambiguous.

It's not helpful to show the alias itself as an option.
This fixes a regression accepted in f24649b77d856157c64841457dcc4f70530d607c.

Differential Revision: https://reviews.llvm.org/D89238
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
Commit 63aeadb4849d760dce3b8e9f343ede8d6c250519 by Louis Dionne
[libc++] Refactor tests to remove uses of std::rand()

This allows running these tests on systems that do not support std::rand().
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/set_one.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/none.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/flip_all.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/flip_one.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/op_and_eq.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/to_string.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/left_shift_eq.pass.cpp
The file was addedlibcxx/test/std/utilities/template.bitset/bitset.members/bitset_test_cases.h
The file was modifiedlibcxx/test/std/numerics/numeric.ops/numeric.ops.lcm/lcm.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/op_or_eq.pass.cpp
The file was addedlibcxx/test/std/utilities/template.bitset/bitset.members/reset_one.out_of_range.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/not_all.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/right_shift.pass.cpp
The file was addedlibcxx/test/std/utilities/template.bitset/bitset.members/set_one.out_of_range.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/index_const.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/to_ullong.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/left_shift.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/size.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/count.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/test.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/all.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/to_ulong.pass.cpp
The file was modifiedlibcxx/test/std/numerics/numeric.ops/numeric.ops.gcd/gcd.pass.cpp
The file was addedlibcxx/test/std/utilities/template.bitset/bitset.members/flip_one.out_of_range.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/index.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/op_xor_eq.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/reset_all.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/any.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/op_eq_eq.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/set_all.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/right_shift_eq.pass.cpp
The file was addedlibcxx/test/std/utilities/template.bitset/bitset.members/test.out_of_range.pass.cpp
The file was modifiedlibcxx/test/std/utilities/template.bitset/bitset.members/reset_one.pass.cpp
Commit bed83940478449b7ee08d43e5b74995912bf8206 by aditya_nandakumar
[GISel]: Few InsertVecElt combines

https://reviews.llvm.org/D88060

This adds the following combines
1) build_vector formation from insert_vec_elts
2) insert_vec_elts (build_vector) -> build_vector
The file was modifiedllvm/test/CodeGen/AArch64/combine-loads.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-concat-vectors.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/combine-insert-vec-elt.mir
Commit 6fa35541a0af9d5493e288f574896ee33a8eae92 by mtrofin
[NFC][ThinLTO] Change command line passing to EmbedBitcodeInModule

Changing to pass by ref - less null checks to worry about.

Differential Revision: https://reviews.llvm.org/D90330
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedllvm/include/llvm/LTO/LTOBackend.h
The file was modifiedllvm/include/llvm/Bitcode/BitcodeWriter.h
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
Commit acd7be74ca12f8f08e52d6d80850a9b230109134 by Louis Dionne
[libc++] Fix a few warnings

Found during a NuttX porting effort.
But these changes are not directly relevant to NuttX.

Differential Revision: https://reviews.llvm.org/D90139
The file was modifiedlibcxx/src/locale.cpp
The file was modifiedlibcxx/src/filesystem/operations.cpp
Commit ba78cae20f1467ebba6bd1005ef3e48e1fd96dee by flo
[AArch64] Use DUP for BUILD_VECTOR with few different elements.

If most elements of BUILD_VECTOR are the same, with a few different
elements, it is better to use DUP  for the common elements and
INSERT_VECTOR_ELT for the different elements.

Currently this transform is guarded quite restrictively to only trigger
in clearly beneficial cases.

With D90176, the lowering for patterns originating from code like
` float32x4_t y = {a,a,a,0};` (common in 3D apps) are lowered even
better (unnecessary fmov is removed).

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D90233
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
Commit 0661328d7efb81a8ac7f2ca0734a65f9be105f29 by tianshilei1992
[Clang][OpenMP] Added the support for target data nowait

Previously we added support for target nowait, but target data nowait
has not been supported yet. In this patch, target data nowait will also be
wrapped into a task.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D90099
The file was modifiedclang/test/OpenMP/target_update_codegen.cpp
The file was modifiedclang/test/OpenMP/target_enter_data_codegen.cpp
The file was modifiedclang/test/OpenMP/declare_mapper_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/target_exit_data_codegen.cpp
Commit 3b2256a41b062ff5e9dcf52a99b945cadf2388d1 by aeubanks
[test] Make bt_order_by_weight in switch.ll more robust

    Branch weights are not represented internally linearly with the value in
    the IR. In its current state the test happened to pass, but the branch
    weights for 0,3,6 and 2,5,8,9 were not actually equal.

    $ opt -passes='print<branch-prob>'

    shows that the sum of the branch probabilities going to bb0 and bb2 were not the same.

    Printing analysis results of BPI for function 'bt_order_by_weight':
    ---- Branch Probabilities ----
      edge entry -> bb0 probability is 0x00000003 / 0x80000000 = 0.00%
      edge entry -> bb2 probability is 0x00000004 / 0x80000000 = 0.00%

    with this change:

    Printing analysis results of BPI for function 'bt_order_by_weight':
    ---- Branch Probabilities ----
      edge entry -> bb0 probability is 0x00000004 / 0x80000000 = 0.00%
      edge entry -> bb2 probability is 0x00000004 / 0x80000000 = 0.00%

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D90273
The file was modifiedllvm/test/CodeGen/X86/switch.ll
Commit a6dd01afa3d5902203d04a72e0b478078f796a35 by AlokKumar.Sharma
[DebugInfo] Support for DW_TAG_generic_subrange

This is needed to support fortran assumed rank arrays which
have runtime rank.

  Summary:
Fortran assumed rank arrays have dynamic rank. DWARF TAG
DW_TAG_generic_subrange is needed to support that.

  Testing:
unit test cases added (hand-written)
check llvm
check debug-info

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D89218
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
The file was modifiedllvm/include/llvm/IR/Metadata.def
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was addedllvm/test/Verifier/digenericsubrange-missing-upperBound.ll
The file was addedllvm/test/Bitcode/generic_subrange_const.ll
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/lib/Bitcode/Reader/MetadataLoader.cpp
The file was modifiedllvm/lib/IR/LLVMContextImpl.h
The file was addedllvm/test/DebugInfo/X86/dwarfdump-generic_subrange_const.ll
The file was modifiedllvm/include/llvm/Bitcode/LLVMBitCodes.h
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedllvm/include/llvm-c/DebugInfo.h
The file was addedllvm/test/Verifier/digenericsubrange-count-upperBound.ll
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was addedllvm/test/Verifier/digenericsubrange-missing-stride.ll
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
The file was addedllvm/test/DebugInfo/X86/dwarfdump-generic_subrange.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
The file was addedllvm/test/Bitcode/generic_subrange.ll
The file was modifiedllvm/unittests/IR/MetadataTest.cpp
The file was addedllvm/test/Bitcode/generic_subrange_count.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was addedllvm/test/DebugInfo/X86/dwarfdump-generic_subrange_count.ll
Commit 0b2b50a5d2893af47466f191771d20c9993a1624 by Adrian Prantl
[DebugInfo] Expose Fortran array debug info attributes through DIBuilder.

The support of a few debug info attributes specifically for Fortran
arrays have been added to LLVM recently, but there's no way to take
advantage of them through DIBuilder. This patch extends
DIBuilder::createArrayType to enable the settings of those attributes.

Patch by Chih-Ping Chen!

Differential Review: https://reviews.llvm.org/D90323
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was modifiedllvm/unittests/IR/DebugInfoTest.cpp
Commit 7a996027b9847d9808cb5567e8a4553989e1dbcf by pifon
[mlir] Convert memref_reshape to memref_reinterpret_cast.

Differential Revision: https://reviews.llvm.org/D90235
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was addedmlir/test/Dialect/Standard/expand-memref-reshape.mlir
The file was addedmlir/test/mlir-cpu-runner/memref_reshape.mlir
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Conversion/StandardToLLVM/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.h
The file was modifiedmlir/test/Dialect/Standard/invalid.mlir
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was addedmlir/test/lib/Transforms/TestExpandMemRefReshape.cpp
The file was addedmlir/lib/Dialect/StandardOps/Transforms/ExpandMemRefReshape.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
Commit 49cddb90f6455d850fcee7d7cd5b414531e3422f by Dávid Bolvanský
[MemLoc]  Adjust memccpy support in MemoryLocation::getForArgument

Use LocationSize::upperBound instead of precise since we only know an upper bound on the number of bytes read/written.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D89885
The file was modifiedllvm/lib/Analysis/MemoryLocation.cpp
Commit 23ed570af1cc165afea1b70a533a4a39d6656501 by Duncan P. N. Exon Smith
Split out llvm/Support/FileSystem/UniqueID.h and clang/Basic/FileEntry.h, NFC

Split `FileEntry` and `FileEntryRef` out into a new file
`clang/Basic/FileEntry.h`. This allows current users of a
forward-declared `FileEntry` to transition to `FileEntryRef` without
adding more includers of `FileManager.h`.

Also split `UniqueID` out to llvm/Support/FileSystem/UniqueID.h, so
`FileEntry.h` doesn't need to include all of `FileSystem.h` for just
that type.

Differential Revision: https://reviews.llvm.org/D89761
The file was addedclang/include/clang/Basic/FileEntry.h
The file was modifiedclang/lib/Basic/CMakeLists.txt
The file was addedclang/lib/Basic/FileEntry.cpp
The file was modifiedclang/include/clang/Basic/FileManager.h
The file was modifiedllvm/include/llvm/Support/FileSystem.h
The file was addedllvm/include/llvm/Support/FileSystem/UniqueID.h
Commit 67760bb2d68de76bd73febb2e489502d6409c8d7 by pifon
[mlir] Use OpBuilderDAG for MemRefReinterpretCastOp.
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit 818bd31906baa398b6aa219a3af3c49790897e84 by llvmgnsyncbot
[gn build] Port 23ed570af1c
The file was modifiedllvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Commit 2488e444297f5813613d8fb76fb1f3378fb9171e by Louis Dionne
[llvm-lit] Improve the error message when make_paths_relative() fails

Previously, if make_paths_relative() failed due to some reason, it would
happily keep going and set the ${out_pathlist} to the standard output
of the command, which would be the empty string if the command failed.

This can lead to issues that are difficult to diagnose, since the calling
code will usually try to keep going with a variable that was set to the
empty string.

Differential Revision: https://reviews.llvm.org/D89985
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
Commit 35d226911165a9aae1f01f521a0019f1a9c0a25f by Louis Dionne
[libc++] Re-apply the switch-based std::variant implementation

This commit is a mass re-application of the following commits:

  7d15ece79c16dc3237fc514ff56a69e3d58fbd39
  e0ec7a02064968c7df11713689107148b4efb993
  02197f7e50b938f8167b17b89bdf7c55feff4339
  a175a96517c5d9dc05ba13a6481b1b031a53a22f

Those were temporarily reverted in 057028ed391f8, and never re-applied.
Re-committed by @ldionne (author edited for credit).

Differential Revision: https://reviews.llvm.org/D90168
The file was modifiedlibcxx/include/variant
Commit 1ce7040359a92a63b7b8cda2b6635627a4428399 by silvasean
[mlir] Properly handle recursive bufferization for scf.for/scf.if

This fixes a subtle issue, described in the comment starting with
"Clone the op without the regions and inline the regions from the old op",
which prevented this conversion from working on non-trivial examples.

Differential Revision: https://reviews.llvm.org/D90203
The file was modifiedmlir/lib/Dialect/SCF/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
The file was modifiedmlir/test/Dialect/SCF/bufferize.mlir
Commit 09abecef7bbfda18d34f046954eaa4d491062839 by richard
PR48002: Fix injection of elaborated-type-specifiers within local
classes into the enclosing block scope.

We weren't properly detecting whether the name would be injected into a
block scope in the case where it was lexically declared in a local
class.
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was addedclang/test/CXX/basic/basic.scope/basic.scope.pdecl/p7.cpp
Commit 4e4abd16a74d432e29c27cc68b0493e46f679a91 by listmail
[Deref] Use maximum trip count instead of exact trip count

When trying to prove that a memory access touches only dereferenceable memory across all iterations of a loop, use the maximum exit count rather than an exact one.  In many cases we can't prove exact exit counts whereas we can prove an upper bound.

The test included is for a single exit loop with a min(C,V) exit count, but the true motivation is support for multiple exits loops.  It's just really hard to write a test case for multiple exits because the vectorizer (the primary user of this API), bails far before this.  For multiple exits, this allows a mix of analyzeable and unanalyzable exits when only analyzeable exits are needed to prove deref.
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
The file was modifiedllvm/lib/Analysis/Loads.cpp
Commit 8b127a8661a160a12b09d32094268c4988c5424c by Austin.Kerbow
[AMDGPU] Fix inserting combined s_nop in bundles

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D90334
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
Commit 772aaa602383cf82795572ebcd86b0e660f3579f by flo
[AArch64] Improve lowering of insert_vector_elt with 0.0 consts.

When moving +0.0 into a float vector, we can use to vi*gpr variants of
INS.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D90176
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/vecreduce-fadd-legalization.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
Commit b3dac4ee240897194a5167aaae2aabbfba76da85 by jay.foad
[TableGen] Treat reg as isolated in reg$foo (but not in ${foo}reg)

D9844 fixed a problem where the ss suffix in the AsmString "cmp${cc}ss"
was recognised as the X86 SS register, by only recognising a token as a
register name if it is "isolated", i.e. surrounded by separator
characters.

In the AMDGPU backend there are many operands like $clamp which expand
to an optional string " clamp" including the preceding space, so we want
to have AsmStrings including sequences like "vcc$clamp" where vcc is a
register name.

This patch relaxes the rules for an isolated token, to say that it's OK
if the token is immediately followed by a '$'.

Differential Revision: https://reviews.llvm.org/D90315
The file was modifiedllvm/utils/TableGen/AsmMatcherEmitter.cpp
Commit 50ee22d791864fb3243e4a022fd6e78d38102a64 by jay.foad
[AMDGPU] Fix double space in disassembly of SDWA instructions with vcc

Differential Revision: https://reviews.llvm.org/D90317
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
Commit 53f4c4b2cc51f4848dfc610a3a858ef821e39ae5 by flo
[InstCombine] Do not introduce bitcasts for swifterror arguments.

The following constraints hold for swifterror values:

    A swifterror value (either the parameter or the alloca) can only
    be loaded and stored from, or used as a swifterror argument.

This patch updates instcombine to not try to convert a bitcast of a
function into a bitcast of a swifterror argument.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D90258
The file was addedllvm/test/Transforms/InstCombine/swifterror-argument-bitcast-fold.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Commit 5b91a6a88bd681f63702116f4a7f28976f4fa848 by jay.foad
[AMDGPU] Allow some modifiers on VOP3B instructions

V_DIV_SCALE_F32/F64 are VOP3B encoded so they can't use the ABS src
modifier, but they can still use NEG and the usual output modifiers.

This partially reverts 3b99f12a4e6f "AMDGPU: Remove modifiers from v_div_scale_*".

Differential Revision: https://reviews.llvm.org/D90296
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/test/MC/AMDGPU/vop3.s
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/test/MC/AMDGPU/vop3-errs.s
The file was modifiedllvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit 90678f65ae47523586bd34392ed3cd1369cf5e9b by kostyak
[GWP-ASan] Abstract the thread local variables access

In a similar fashion to D87420 for Scudo, this CL introduces a way to
get thread local variables via a platform-specific reserved TLS slot,
since Fuchsia doesn't support ELF TLS from the libc itself.

If needing to use this, a platform will have to define
`GWP_ASAN_HAS_PLATFORM_TLS_SLOT` and provide `gwp_asan_platform_tls_slot.h`
which will define a `uint64_t *getPlatformGwpAsanTlsSlot()` function
that will return the TLS word of storage.

I snuck in a couple of cleanup items as well, moving some static
functions to anonymous namespace for consistency.

Differential Revision: https://reviews.llvm.org/D90195
The file was modifiedcompiler-rt/lib/gwp_asan/guarded_pool_allocator.cpp
The file was modifiedcompiler-rt/lib/gwp_asan/guarded_pool_allocator.h
The file was modifiedcompiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocator_posix.cpp
The file was modifiedcompiler-rt/lib/gwp_asan/CMakeLists.txt
The file was addedcompiler-rt/lib/gwp_asan/platform_specific/guarded_pool_allocator_tls.h
The file was modifiedcompiler-rt/lib/gwp_asan/utilities.cpp
The file was modifiedcompiler-rt/lib/gwp_asan/platform_specific/utilities_posix.cpp
Commit c3783847ae67d31aece461458d8510b8bd0469c3 by Duncan P. N. Exon Smith
C API: support scalable vectors

This adds support for scalable vector types in the C API and in
llvm-c-test, and also adds a test to ensure that llvm-c-test can properly
roundtrip operations involving scalable vectors.

While creating this diff, I discovered that the C API cannot properly roundtrip
_constant expressions_ involving shufflevector / scalable vectors, but that
seems to be a separate enough issue that I plan to address it in a future diff
(unless reviewers feel it should be addressed here).

Differential Revision: https://reviews.llvm.org/D89816
The file was modifiedllvm/tools/llvm-c-test/echo.cpp
The file was modifiedllvm/include/llvm-c/Core.h
The file was modifiedllvm/test/Bindings/llvm-c/echo.ll
The file was modifiedllvm/lib/IR/Core.cpp
Commit 51f8d46491c7efd4e2054b036c13ef6266fceab3 by alexshap
[llvm-install-name-tool] Quote passed rpath args in error messages

This diff refactors error reporting to make it more clear
what arguments were passed to llvm-install-name-tool.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D90080
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/install-name-tool-rpath.test
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/install-name-tool-delete-rpath.test
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/install-name-tool-add-rpath.test
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/install-name-tool-prepend-rpath.test
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.cpp
Commit 5dbccc6c89c0f6c6dc6277cc304057f6d50b298d by aaronpuchert
Better source location for -Wignored-qualifiers on trailing return types

We collect the source location of a trailing return type in the parser,
improving the location for regular functions and providing a location
for lambdas, where previously there was none.

Fixes PR47732.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D90129
The file was modifiedclang/include/clang/Sema/DeclSpec.h
The file was modifiedclang/lib/Parse/ParseExprCXX.cpp
The file was modifiedclang/test/SemaCXX/return.cpp
The file was modifiedclang/lib/Parse/ParseDeclCXX.cpp
The file was modifiedclang/lib/Sema/DeclSpec.cpp
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit ebfc427bbe08f0c36af9721d5a4e6d3ffe2e4bf5 by aaronpuchert
[Sema] Let getters assert that trailing return type exists, NFCI

This was requested in the review of D90129.
The file was modifiedclang/include/clang/Sema/DeclSpec.h