SuccessChanges

Summary

  1. [MSP430] Shift Amount Threshold in DAGCombine (Baseline Tests); NFC (details)
  2. [ARM] Add dependency on GlobalISel for unit tests to fix shared libs (details)
  3. [TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount (details)
  4. [X86] Pulled out helper to decode target shuffle element sentinel values (details)
  5. [SCEV] Simplify umin/max of zext and sext of the same value (details)
Commit 0a15981a84b9988ad7dce01cf81ea1d7cb022b82 by spatel
[MSP430] Shift Amount Threshold in DAGCombine (Baseline Tests); NFC
Patch by: @joanlluch (Joan LLuch)
Differential Revision: https://reviews.llvm.org/D69099
llvm-svn: 375345
The file was addedllvm/test/CodeGen/MSP430/shift-amount-threshold.ll
Commit 7d8ea71677f6b9985d4bbe5112067d5d48414383 by nemanja.i.ibm
[ARM] Add dependency on GlobalISel for unit tests to fix shared libs
build
The unit test uses GlobalISel but the dependency is not listed in the
CMakeLists.txt file which causes failures in shared libs build with GCC.
This just adds the dependency.
Differential revision: https://reviews.llvm.org/D69064
llvm-svn: 375346
The file was modifiedllvm/unittests/Target/ARM/CMakeLists.txt
Commit a298964d22a203d21bafe1f649a46ba8a2592ca4 by spatel
[TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount
Threshold (1/2)
Provides a TLI hook to allow targets to relax the emission of shifts,
thus enabling codegen improvements on targets with no multiple shift
instructions and cheap selects or branches.
Contributes to a Fix for PR43559:
https://bugs.llvm.org/show_bug.cgi?id=43559
Patch by: @joanlluch (Joan LLuch)
Differential Revision: https://reviews.llvm.org/D69116
llvm-svn: 375347
The file was modifiedllvm/test/CodeGen/MSP430/shift-amount-threshold.ll
The file was modifiedllvm/lib/Target/MSP430/MSP430ISelLowering.cpp
The file was modifiedllvm/lib/Target/MSP430/MSP430ISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 10213b90730e2459e6cbbeeb5c7289b18c298382 by llvm-dev
[X86] Pulled out helper to decode target shuffle element sentinel values
to 'Zeroable' known undef/zero bits. NFCI.
Renamed 'resolveTargetShuffleAndZeroables' to
'resolveTargetShuffleFromZeroables' to match.
llvm-svn: 375348
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 1d509201e2d2e926654ef762524754311fafcd59 by listmail
[SCEV] Simplify umin/max of zext and sext of the same value
This is a common idiom which arises after induction variables are
widened, and we have two or more exit conditions.  Interestingly, we
don't have instcombine or instsimplify support for this either.
Differential Revision: https://reviews.llvm.org/D69006
llvm-svn: 375349
The file was modifiedllvm/test/Analysis/ScalarEvolution/sext-mul.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-trip-count-address-space.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-trip-count.ll