Changes

[Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile
(Joined -> Flag)

[Concepts] Fix MarkUsedTemplateParameters for exprs
D41910 introduced a recursive visitor to MarkUsedTemplateParameters, but 
disregarded the 'Depth' parameter, and had incorrect assertions. This
fixes the visitor and removes the assertions.

Remove umask tests
These tests were added in 18627115f4d2db5dc73207e0b5312f52536be7dd and
e08b59f81d950bd5c8b8528fcb3ac4230c7b736c for validating a refactoring. 
Removing because they break on ACL-controlled folders on Ubuntu, and
their added value is low.
Differential Revision: https://reviews.llvm.org/D70854

[COFF] Align ARM64 range extension thunks at instruction boundary
RangeExtensionThunkARM64 is created for out-of-range branches on Windows
ARM64 because branch instructions has limited bits to encode target
address. Currently, RangeExtensionThunkARM64 is appended to its
referencing COFF section from object file at link time without any
alignment requirement, so if size of the preceding COFF section is not
aligned to instruction boundary (4 bytes), RangeExtensionThunkARM64 will
emit thunk instructions at unaligned address which is never a valid
branch target on ARM64, and usually triggers invalid instruction
exception when branching to it.
This PR fixes it by requiring such thunks to align at 4 bytes.
Differential revision: https://reviews.llvm.org/D72473

[TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare
from RunttimeLibcalls.def and all associated usages
Summary: This always just used the same libcall as unordered, but the
comparison predicate was different. This change appears to have been
made when targets were given the ability to override the predicates.
Before that they were hardcoded into the type legalizer. At that time we
never inverted predicates and we handled ugt/ult/uge/ule compares by
emitting an unordered check ORed with a ogt/olt/oge/ole checks. So only
ordered needed an inverted predicate. Later ugt/ult/uge/ule were
optimized to only call a single libcall and invert the compare.
This patch removes the ordered entries and just uses the inverting logic
that is now present. This removes some odd things in both the Mips and
WebAssembly code.
Reviewers: efriedma, ABataev, uweigand, cameron.mcinally, kpn
Reviewed By: efriedma
Subscribers: dschuff, sdardis, sbc100, arichardson, jgravelle-google,
kristof.beyls, hiraditya, aheejin, sunfish, atanasyan, Petar.Avramovic,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72536

[SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag

[NFC] [PowerPC] Update mi-peephole-splat test
Use script to re-generate the test case, for easier comparison with 
future patches.

[AMDGPU] Remove unnecessary v_mov from a register to itself in WQM
lowering.
Summary:
- SI Whole Quad Mode phase is replacing WQM pseudo instructions with
v_mov instructions. While this is necessary for the special handling of
moving results out of WWM live ranges, it is not necessary for WQM live
ranges. The result is a v_mov from a register to itself after every WQM
operation. This change uses a COPY psuedo in these cases, which allows
the register allocator to coalesce the moves away.
Reviewers: tpr, dstuttard, foad, nhaehnle
Reviewed By: nhaehnle
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71386

Mark the test/Feature/load_extension.ll test as unsupported on Darwin.
With plugins and examples enabled, this XPASSes. Mark it as unsupported
until the owner investigates what's going on.

[X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to
simplify some code. NFCI

[X86][Disassembler] Simplify readPrefixes

[X86] Preserve fpexcept property when turning strict_fp_extend and
strict_fp_round into stack operations.
We use the stack for X87 fp_round and for moving from SSE f32/f64 to X87
f64/f80. Or from X87 f64/f80 to SSE f32/f64.
Note for the SSE<->X87 conversions the conversion always happens in the 
X87 domain. The load/store ops in the X87 instructions are able to
signal exceptions.

[X86] Simplify code by removing an unreachable condition. NFCI
For X87<->SSE conversions, the SSE type is always smaller than the X87
type. So we can always use the smallest type for the memory type.

Add test for GDB pretty printers.
Reviewers: dblaikie, aprantl, davide, JDevlieghere
Reviewed By: aprantl
Subscribers: jmorse, aprantl, merge_guards_bot, mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72321

[X86] Remove dead code from X86DAGToDAGISel::Select that is no longer
needed now that we don't mutate strict fp nodes. NFC

[InstCombine] Preserve nuw on sub of geps (PR44419)
Fix https://bugs.llvm.org/show_bug.cgi?id=44419 by preserving the nuw on
sub of geps. We only do this if the offset has a multiplication as the
final operation, as we can't be sure the operations is nuw in the other
cases without more thorough analysis.
Differential Revision: https://reviews.llvm.org/D72048

[LoopSimplify] Regenerate test checks; NFC
For D72519.

[LoopRotate] Add tests for rotate with switch; NFC
For D72420.

DSE: fix bug where we would only check libcalls for name rather than
whole decl

[X86] Add more complex tests for vector masks used with AND/OR/XOR.
Additional test cases for D72524.

[X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering
Add initial support for lowering v4f64 shuffles to SHUFPD(VPERM2F128(V1,
V2), VPERM2F128(V1, V2)), eventually this could be used for v8f32 (and
maybe v8f64/v16f32) but I'm being conservative for the initial
implementation as only v4f64 can always succeed.
This currently is only called from lowerShuffleAsLanePermuteAndShuffle
so only gets used for unary shuffles, and we limit this to cases where
we use upper elements as otherwise concating 2 xmm shuffles is probably
the better case.
Helps with poor shuffles mentioned in D66004.

Fix copy+paste typo in shuffle test name

[Sema] Improve -Wrange-loop-analysis warnings.
No longer generate a diagnostic when a small trivially copyable type is 
used without a reference. Before the test looked for a POD type and had
no size restriction. Since the range-based for loop is only available in 
C++11 and POD types are trivially copyable in C++11 it's not required to 
test for a POD type.
Since copying a large object will be expensive its size has been 
restricted. 64 bytes is a common size of a cache line and if the object
is aligned the copy will be cheap. No performance impact testing has
been done.
Differential Revision: https://reviews.llvm.org/D72212

[X86] Fix outdated comment
The generic saturated math opcodes are no longer widened inside
X86TargetLowering

moveOperands - assert Src/Dst MachineOperands are non-null.
Fixes static-analyzer warnings.

Remove copy ctors identical to the default one. NFC.
Those do nothing but make the type no longer trivial to the compiler.

Fix uninitialized value clang static analyzer warning. NFC.

Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.

Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.

Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately within mangleCallingConvention and castAs will perform the
null assertion for us.

Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately).

Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are dereferenced
immediately and castAs will perform the null assertion for us.

GlobalModuleIndex - Fix use-after-move clang static analyzer warning.
Shadow variable names meant we were referencing the Buffer input
argument, not the GlobalModuleIndex member that its std::move()'d it.

[X86AsmBackend] Be consistent about placing definitions out of line
[NFC]

[X86AsmBackend] Move static function before sole use [NFC]

[X86] Adjust nop emission by compiler to consider target decode
limitations
The primary motivation of this change is to bring the code more closely
in sync behavior wise with the assembler's version of nop emission.  I'd
like to eventually factor them into one, but that's hard to do when one
has features the other doesn't.
The longest encodeable nop on x86 is 15 bytes, but many processors - for
instance all intel chips - can't decode the 15 byte form efficiently. 
On those processors, it's better to use either a 10 byte or 11 byte
sequence depending.

[mlir] NFC: Remove Value::operator* and Value::operator-> now that Value
is properly value-typed.
Summary: These were temporary methods used to simplify the transition.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D72548

[ASTMatchers] extract public matchers from const-analysis into own patch
Summary: The analysis for const-ness of local variables required a view
generally useful matchers that are extracted into its own patch.
They are `decompositionDecl` and `forEachArgumentWithParamType`, that
works for calls through function pointers as well.
Reviewers: aaron.ballman
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72505

Revert "[ASTMatchers] extract public matchers from const-analysis into
own patch"
This reverts commit 4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4. The
powerpc buildbots had an internal compiler error after this patch. This
requires some inspection.

[ExecutionEngine] Re-enable FastISel for non-iOS arm targets.
Patch by Nicolas Capens. Thanks Nicolas!
https://reviews.llvm.org/D65015

Add -Wrange-loop-analysis changes to ReleaseNotes
This reflects the recent changes done.

[X86] Turn FP_ROUND/STRICT_FP_ROUND into
X86ISD::VFPROUND/STRICT_VFPROUND during PreprocessISelDAG to remove some
duplicate isel patterns.

[X86][Disassembler] Simplify and optimize reader functions
llvm-objdump -d on clang is decreased from 8.2s to 7.8s.

[LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the
Expand* and Promote* methods.
All the Expand* and Promote* function assume they are being called with
result 0 anyway. Just hardcode result 0 into them.

[LegalizeVectorOps] Remove some of the simpler Expand methods. Pass
Results vector to a couple. NFCI
Some of the simplest handlers just call TLI and if that fails, they fall
back to unrolling. For those just inline the TLI call and share the
unrolling call with the default case of Expand.
For ExpandFSUB and ExpandBITREVERSE so that its obvious they don't
return results sometimes and want to defer to LegalizeDAG.

[X86][Disassembler] Replace custom logger with LLVM_DEBUG
llvm-objdump -d on clang is decreased from 7.8s to 7.4s.
The improvement is likely due to the elimination of logger setup and 
dbgprintf(), which has a large overhead.

[Support] Optionally call signal handlers when a function wrapped by the
the CrashRecoveryContext fails
This patch allows for handling a failure inside a CrashRecoveryContext
in the same way as the global exception/signal handler. A failure will
have the same side-effect, such as cleanup of temporarty file, printing
callstack, calling relevant signal handlers, and finally returning an
exception code. This is an optional feature, disabled by default. This
is a support patch for D69825.
Differential Revision: https://reviews.llvm.org/D70568

[ORC] Fix argv handling in runAsMain / lli.
This fixes an off-by-one error in the argc value computed by runAsMain,
and switches lli back to using the input bitcode (rather than the string
"lli") as the effective program name.
Thanks to Stefan Graenitz for spotting the bug.

[Disassembler] Delete the VStream parameter of
MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in 
llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no 
target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.
If we ever have the needs to add verbose log to disassemblers, we can 
record log with a member function, instead of passing it around as an 
argument.

[X86][Disassembler] Optimize argument passing and immediate reading

[X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M
In x86Disassembler{OneByte,TwoByte,...}Codes,
"/* EmptyTable */" is very common. Omitting it saves lots of space. 
Also, there is no need to display a table entry in multiple lines.
It is also common that the whole OpcodeDecision is { MODRM_ONEENTRY, 0}. 
Make use of zero-initialization.

[LegalizeVectorOps] Expand vector MERGE_VALUES immediately.
Custom legalization can produce MERGE_VALUES to return multiple results.
We can expand them immediately instead of leaving them around for DAG
combine to clean up.

[TargetLowering][X86] Connect the chain from STRICT_FSETCC in
TargetLowering::expandFP_TO_UINT and X86TargetLowering::FP_TO_INTHelper.

[LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT
legalization.
The lo and hi computation are independent. Give them the same input 
chain and TokenFactor the results together.

[SCEV] more accurate range for addrecexpr with nsw flag.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D72436

[X86] Don't call LowerSETCC from LowerSELECT for
STRICT_FSETCC/STRICT_FSETCCS nodes.
This causes the STRICT_FSETCC/STRICT_FSETCCS nodes to lowered early
while lowering SELECT, but the output chain doesn't get connected. Then
we visit the node again when it is its turn because we haven't replaced
the use of the chain result. In the case of the fp128 libcall lowering,
after D72341 this will cause the libcall to be emitted twice.

[NFC] Refactor memory ops cluster method
Current implementation of BaseMemOpsClusterMutation is a little bit 
obscure. This patch directly uses a map from store chain ID to set of 
memory instrs to make it simpler, so that future improvements are easier 
to read, update and review.
Reviewed By: evandro
Differential Revision: https://reviews.llvm.org/D72070

[profile] Support merge pool size >= 10
The executable acquires an advisory record lock (`fcntl(fd, F_SETLKW,
*)`) on a profile file. Merge pool size >= 10 may be beneficial when the
concurrency is large.
Also fix a small problem about snprintf. It can cause the filename to be
truncated after %m.
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D71970

[X86][Disassembler] Simplify

[X86][Disassembler] Merge X86DisassemblerDecoder.cpp into
X86Disassembler.cpp and refactor

[X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded
elements of the lane mask.
Fixes an cyclic dependency issue with an upcoming patch where
getVectorShuffle canonicalizes masks with splat build vector sources.

[X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64
shuffles.
Only perform this if we are shuffling lower and upper lane elements
across the lanes (otherwise splitting to lower xmm shuffles would be
better).
This is a regression if we shuffle build_vectors due to getVectorShuffle
canonicalizing 'blend of splat' build vectors, for now I've set this not
to shuffle build_vector nodes at all to avoid this.

[AMDGPU] Regenerate shl shift tests

[MIPS] Regenerate shl/lshr shift tests

Fix "pointer is null" static analyzer warnings. NFCI.
Use cast<> instead of dyn_cast<> and move into its users where its
dereferenced immediately.

[PowerPC] Delete PPCDarwinAsmPrinter and PPCMCAsmInfoDarwin
Darwin support has been removed.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D72063

[NFC] Fix compilation of CrashRecoveryContext.cpp on mingw
Patch by Markus Böck.
Differential Revision: https://reviews.llvm.org/D72564

__patchable_function_entries: don't use linkage field 'unique' with
-no-integrated-as
.section name, "flags"G, @type, GroupName[, linkage]
As of binutils 2.33, linkage cannot be 'unique'.  For integrated 
assembler, we use both 'o' flag and 'unique' linkage to support
--gc-sections and COMDAT with lld.
https://sourceware.org/ml/binutils/2019-11/msg00266.html

[AMDGPU] Add gfx8 assembler and disassembler test cases
Summary: This adds assembler tests for cases that were previously only
in the disassembler tests, and vice versa.
Reviewers: rampitec, arsenm, nhaehnle
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye,
jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72561

[MC][ELF] Emit a relocation if target is defined in the same section and
is non-local
For a target symbol defined in the same section, currently we don't emit 
a relocation if VariantKind is VK_None (with few exceptions like RISC-V 
relaxation), while GNU as emits one. This causes program behavior 
differences with and without -ffunction-sections, and can break intended 
symbol interposition in a -shared link.
```
.globl foo foo:
 call foo      # no relocation. On other targets, may be written as b
foo, etc
 call bar      # a relocation if bar is in another section (e.g.
-ffunction-sections)
 call foo@plt  # a relocation
```
Unify these cases by always emitting a relocation. If we ever want to 
optimize `call foo` in -shared links, we should emit a STB_LOCAL alias 
and call via the alias.
ARM/thumb2-beq-fixup.s: we now emit a relocation to global_thumb_fn as
GNU as does. X86/Inputs/align-branch-64-2.s: we now emit R_X86_64_PLT32
to foo as GNU does.
ELF/relax.s: rewrite the test as target-in-same-section.s . We omitted
relocations to `global` and now emit R_X86_64_PLT32. Note, GNU as does
not emit a relocation for `jmp global` (maybe its own bug). Our new
behavior is compatible except `jmp global`.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72197

Fix "pointer is null" static analyzer warning. NFCI.

Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are dereferenced
immediately and castAs will perform the null assertion for us.

[RISCV] Check register class for AMO memory operands
Summary: AMO memory operands use a custom parser in order to accept both
(reg) and 0(reg). However, the validation predicate used for these
operands was only checking that they were registers, and not the
register class, so non-GPRs (such as FPRs) were also accepted. Thus, fix
this by making the predicate check that they are GPRs.
Reviewers: asb, lenary
Reviewed By: asb, lenary
Subscribers: hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD,
kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01,
MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna,
Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72471

[SCEV] accurate range for addrecexpr with nuw flag
If addrecexpr has nuw flag, the value should never be less than its 
start value and start value does not required to be SCEVConstant.
Reviewed By: nikic, sanjoy
Differential Revision: https://reviews.llvm.org/D71690

[clangd] Assert that the testcases in FindExplicitReferencesTest.All
have no diagnostics
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72355

[clangd] Show template arguments in type hierarchy when possible
Summary: Fixes https://github.com/clangd/clangd/issues/31
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71533

AMDGPU/GlobalISel: Copy type when inserting readfirstlane
getDefIgnoringCopies will fail to find any def if no type is set if we 
try to use it on the use's operand, so propagate the type.

AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs
We don't use the xexec register classes for arbitrary values anymore.
Avoids a test variance beween GlobalISel and SelectionDAG>

AMDGPU: Split test function
This avoids slightly different scheduling/regalloc behavior, and avoids
a test diff between GlobalISel and SelectionDAG.

[X86] Use SDNPOptInGlue instead of SDNPInGlue on a couple SDNodes.
At least one of these is used without a Glue. This doesn't seem to
change the X86GenDAGISel.inc output so maybe it doesn't matter?

[DWARF5][DebugInfo]: Added support for DebugInfo generation for auto
return type for C++ member functions.
Summary: This patch will provide support for auto return type for the
C++ member functions. Before this return type of the member function is
deduced and stored in the DIE. This patch includes llvm side
implementation of this feature.
Patch by: Awanish Pandey <Awanish.Pandey@amd.com>
Reviewers: dblaikie, aprantl, shafik, alok, SouraVX, jini.susan.george
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D70524

[DWARF5][clang]: Added support for DebugInfo generation for auto return
type for C++ member functions.
Summary: This patch will provide support for auto return type for the
C++ member functions.
This patch includes clang side implementation of this feature.
Patch by: Awanish Pandey <Awanish.Pandey@amd.com>
Reviewers: dblaikie, aprantl, shafik, alok, SouraVX, jini.susan.george 
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D70524

[SCEV] Follow up of D71563: addressing post commit comment. NFC.

[NFC] Update loop.decrement.reg intrinsic comment
Note that the intrinsic is now understood by SCEV and that other 
optimisations can treat it as a sub.

Add zero_extendi and sign_extendi to intrinsic namespace
Summary:
- update zero_extendi and sign_extendi in edsc/intrinsic namespace
- Builder API test for zero_extendi and sign_extendi
Differential Revision: https://reviews.llvm.org/D72298

[lldb] Mark several tests as not dependent on debug info
Summary: This just adds `NO_DEBUG_INFO_TESTCASE` to tests that don't
really exercise anything debug information specific and therefore don't
need to be rerun for all debug information variants.
Reviewers: labath, jingham, aprantl, mib, jfb
Reviewed By: aprantl
Subscribers: dexonsmith, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72447

[RISCV] Collect Statistics on Compressed Instructions
Summary: It is useful to keep statistics on how many instructions we
have compressed, so we can see if future changes are increasing or
decreasing this number.
Reviewers: asb, luismarques
Reviewed By: asb, luismarques
Subscribers: xbolva00, sameer.abuasal, hiraditya, rbar, johnrusso,
simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27,
MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult,
the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67495

[clangd] Publish xref for macros from Index and AST.
Summary: With this patch the `findReferences` API will return Xref for
macros. If the symbol under the cursor is a macro then we collect the
references to it from: 1. Main file by looking at the ParsedAST. (These
were added to the ParsedAST in https://reviews.llvm.org/D70008) 2. Files
other than the mainfile by looking at the:
* static index (Added in https://reviews.llvm.org/D70489)
* file index (Added in https://reviews.llvm.org/D71406) This patch
collects all the xref from the above places and outputs it in
`findReferences` API.
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72395

Revert "[DWARF5][clang]: Added support for DebugInfo generation for auto
return type for C++ member functions."
This reverts commit 6d6a4590c5d4c7fc7445d72fe685f966b0a8cafb, which 
introduces a crash.
See https://reviews.llvm.org/D70524 for details.

[lldb] Fix eh-frame-small-fde test for changes in lld
lld in 2bfee35 started emitting relocations for some intra-section jumps 
between global symbols. This shifted the code around a bit, invalidating 
text expectations.
Change the symbols to local to keep the previous behavior.

This option allows selecting the TLS size in the local exec TLS model,
which is the default TLS model for non-PIC objects. This allows large/
many thread local variables or a compact/fast code in an executable.
Specification is same as that of GCC. For example, the code model option
precedes the TLS size option.
TLS access models other than local-exec are not changed. It means 
supoort of the large code model is only in the local exec TLS model.
Patch By KAWASHIMA Takahiro (kawashima-fj <t-kawashima@fujitsu.com>) 
Reviewers: dmgreen, mstorsjo, t.p.northover, peter.smith, ostannard 
Reviewd By: peter.smith Committed by: peter.smith
Differential Revision: https://reviews.llvm.org/D71688

ARMLowOverheadLoops: return earlier to avoid printing irrelevant dbg
msg. NFC

[DebugInfo][Support] Replace DWARFDataExtractor size function
This patch adds a new size function to the base DataExtractor class, 
which removes the need for the DWARFDataExtractor size function.
It is unclear why DWARFDataExtractor's size function returned zero in 
some circumstances (i.e. when it is constructed without a section, and 
with a different data source instead), so that behaviour has changed. 
The old behaviour could cause an assertion in the debug line parser, as 
the size did not reflect the actual data available, and could be lower 
than the current offset being parsed.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72337

[lldb][NFC] Use range-based for loops in IRInterpreter

[lldb] Fix lookup of symbols with the same address range but different
binding
This fixes a failing testcase on Fedora 30 x86_64 (regression Fedora
29->30):
PASS:
./bin/lldb
./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out
-o 'settings set symbols.enable-external-lookup false' -o r -o bt -o
quit
 * frame #0: 0x00007ffff7aa6e75 libc.so.6`__GI_raise + 325
   frame #1: 0x00007ffff7a91895 libc.so.6`__GI_abort + 295
   frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
   frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
   frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
   frame #5: 0x000000000040112e a.out`main(argc=<unavailable>,
argv=<unavailable>) at main.c:32:2
   frame #6: 0x00007ffff7a92f33 libc.so.6`__libc_start_main + 243
   frame #7: 0x000000000040106e a.out`_start + 46
vs.
FAIL - unrecognized abort() function:
./bin/lldb
./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out
-o 'settings set symbols.enable-external-lookup false' -o r -o bt -o
quit
 * frame #0: 0x00007ffff7aa6e75 libc.so.6`.annobin_raise.c + 325
   frame #1: 0x00007ffff7a91895
libc.so.6`.annobin_loadmsgcat.c_end.unlikely + 295
   frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
   frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
   frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
   frame #5: 0x000000000040112e a.out`main(argc=<unavailable>,
argv=<unavailable>) at main.c:32:2
   frame #6: 0x00007ffff7a92f33 libc.so.6`.annobin_libc_start.c + 243
   frame #7: 0x000000000040106e a.out`.annobin_init.c.hot + 46
The extra ELF symbols are there due to Annobin (I did not investigate
why this problem happened specifically since F-30 and not since F-28).
It is due to:
Symbol table '.dynsym' contains 2361 entries: Valu e          Size Type 
 Bind   Vis     Name 0000000000022769   5 FUNC   LOCAL  DEFAULT
_nl_load_domain.cold 000000000002276e   0 NOTYPE LOCAL  HIDDEN 
.annobin_abort.c.unlikely
... 000000000002276e   0 NOTYPE LOCAL  HIDDEN 
.annobin_loadmsgcat.c_end.unlikely
... 000000000002276e   0 NOTYPE LOCAL  HIDDEN 
.annobin_textdomain.c_end.unlikely 000000000002276e 548 FUNC   GLOBAL
DEFAULT abort 000000000002276e 548 FUNC   GLOBAL DEFAULT
abort@@GLIBC_2.2.5 000000000002276e 548 FUNC   LOCAL  DEFAULT __GI_abort 
0000000000022992   0 NOTYPE LOCAL  HIDDEN  .annobin_abort.c_end.unlikely
GDB has some more complicated preferences between overlapping and/or
sharing address symbols, I have made here so far the most simple fix for
this case.
Differential revision: https://reviews.llvm.org/D63540

[X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI.

[SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in
LSHR/SHL (PR44526)
As detailed in https://blog.regehr.org/archives/1709 we don't make use
of the known leading/trailing zeros for shifted values in cases where we
don't know the shift amount value.
This patch adds support to SelectionDAG::ComputeKnownBits to use
KnownBits::countMinTrailingZeros and countMinLeadingZeros to set the
minimum guaranteed leading/trailing known zero bits.
Differential Revision: https://reviews.llvm.org/D72573

[llvm-exegesis][mips] Expand loadImmediate()
Add support for loading 32-bit immediates and enable the use of GPR64 
registers.
Differential Revision: https://reviews.llvm.org/D71873

[clangd] Remove raw string literals in macros
Older (but still supported) versions of GCC don't handle C++11 raw 
string literals in macro parameters correctly.

[X86][SSE] Add knownbits test showing missing
getValidMinimumShiftAmountConstant() ISD::SHL support
As mentioned on D72573

[SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant()
ISD::SHL support
As mentioned on D72573

[clang] Remove raw string literals in macros
Older (but still supported) versions of GCC don't handle C++11 raw 
string literals in macro parameters correctly.

[lldb][NFC] Remove debug print statement from TestExprDiagnostics.py

[llvm-exegesis] Remove unneeded std::move()
Caught by buildbot breakage:
/home/docker/worker_env/ppc64le-clang-rhel-test/clang-ppc64le-rhel/llvm/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp:89:12:
error: moving a local object in a return statement prevents copy elision
[-Werror,-Wpessimizing-move]
   return std::move(Instructions);
          ^
/home/docker/worker_env/ppc64le-clang-rhel-test/clang-ppc64le-rhel/llvm/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp:89:12:
note: remove std::move call here
   return std::move(Instructions);
          ^~~~~~~~~~            ~

GlobalISel: Fix assertion on wide G_ZEXT sources
It's possible to have a type that needs a mask greater than 64-bits.

[FPEnv] Fix chain handling for fpexcept.strict nodes
We need to ensure that fpexcept.strict nodes are not optimized away even
if the result is unused. To do that, we need to chain them into the
block's terminator nodes, like already done for PendingExcepts.
This patch adds two new lists of pending chains, PendingConstrainedFP
and PendingConstrainedFPStrict to hold constrained FP intrinsic nodes
without and with fpexcept.strict markers. This allows not only to solve
the above problem, but also to relax chains a bit further by no longer
flushing all FP nodes before a store or other memory access. (They are
still flushed before nodes with other side effects.)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D72341

Revert "[libc++] Explicitly enumerate std::string external
instantiations."
This is causing failures for multiple buildbots and bootstrap builds, 
details at https://reviews.llvm.org/rG61bd1920.
This reverts commit 61bd19206f61ace4b007838a2ff8884a13ec0374.

[X86] Add knownbits tests showing missing shift amount demanded elts
handling.

[SelectionDAG] ComputeKnownBits - Add DemandedElts support to
getValidShiftAmountConstant/getValidMinimumShiftAmountConstant()

[SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for
shift opcodes
getValidShiftAmountConstant handles out of bounds shift amounts for us,
allowing us to remove the local handling.

[InstSimplify] move tests for select from InstCombine; NFC
InstCombine has transforms that would enable these simplifications in an
indirect way, but those transforms are unsafe and likely to be removed.

[MIPS][ELF] Use PC-relative relocations in .eh_frame when possible
When compiling position-independent executables, we now use 
DW_EH_PE_pcrel | DW_EH_PE_sdata4. However, the MIPS ABI does not define
a 64-bit PC-relative ELF relocation so we cannot use sdata8 for the
large code model case. When using the large code model, we fall back to
the previous behaviour of generating absolute relocations.
With this change clang-generated .o files can be linked by LLD without 
having to pass -Wl,-z,notext (which creates text relocations). This is
simpler than the approach used by ld.bfd, which rewrites the
.eh_frame section to convert absolute relocations into relative
references.
I saw in D13104 that apparently ld.bfd did not accept pc-relative
relocations for MIPS ouput at some point. However, I also checked that
recent ld.bfd can process the clang-generated .o files so this no longer
seems true.
Reviewed By: atanasyan Differential Revision:
https://reviews.llvm.org/D72228

[MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols
The R_(MICRO)MIPS_JALR optimization only works when used against
functions. Using the relocation against a data symbol (e.g. function
pointer) will cause some linkers that don't ignore the hint in this case
(e.g. LLD prior to commit 5bab291b7b) to generate a relative branch to
the data symbol which crashes at run time. Before this patch, LLVM was
erroneously emitting these relocations against local-dynamic TLS
function pointers and global function pointers with internal visibility.
Reviewers: atanasyan, jrtc27, vstefanovic Reviewed By: atanasyan 
Differential Revision: https://reviews.llvm.org/D72571

[AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below
Summary: The Pointer Authentication Extension (PAC) was added in
Armv8.3-A. Some instructions are implemented in the HINT space to allow
compiling code common to CPUs regardless of whether they feature PAC or
not, and still benefit from PAC protection in the PAC-enabled CPUs.
The 8.3-specific mnemonics were currently enabled in any architecture,
and LLVM was emitting them in assembly files when PAC code generation
was enabled. This was ok for compilations where both LLVM codegen and
the integrated assembler were used. However, the LLVM codegen was not 
compatible with other assemblers (e.g. GAS). Given the fact that the 
approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if 
compiling for Armv8.2-A or lower) is entirely reasonable, this patch
makes LLVM to emit HINT when building for Armv8.2-A and below, instead
of PACIASP, AUTIASP and friends. Then, LLVM assembly should be
compatible with other assemblers.
Reviewers: samparker, chill, LukeCheeseman
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71658

Add missing triples to tests in 0c29d3ff2233696f663ae34a8aeda23c750ac68f
so they target the right arch.

Sema::getOwningModule - take const Decl* type.
Fixes static analyzer warning that const_cast was being used despite
only const methods being called.

Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are always
dereferenced and castAs will perform the null assertion for us.

Fix some cppcheck shadow variable warnings. NFCI.

Merge isVectorType() and getAs<VectorType> calls to silence clang static
analyzer warning. NFCI.

Fix cppcheck uninitialized variable in DiffTree() constructor warning.
NFCI.

[RISCV] Handle globals and block addresses in asm operands
Summary: These seem to be the machine operand types currently needed by
the RISC-V target.
Reviewers: asb, lenary Reviewed By: lenary Tags: #llvm Differential
Revision: https://reviews.llvm.org/D72275

[Clang][Driver] Re-use the calling process instead of creating a new
process for the cc1 invocation
With this patch, the clang tool will now call the -cc1 invocation
directly inside the same process. Previously, the -cc1 invocation was
creating, and waiting for, a new process. This patch therefore reduces
the number of created processes during a build, thus it reduces build
times on platforms where process creation can be costly (Windows) and/or
impacted by a antivirus. It also makes debugging a bit easier, as
there's no need to attach to the secondary -cc1 process anymore,
breakpoints will be hit inside the same process.
Crashes or signaling inside the -cc1 invocation will have the same
side-effect as before, and will be reported through the same means.
This behavior can be controlled at compile-time through the
CLANG_SPAWN_CC1 cmake flag, which defaults to OFF. Setting it to ON will
revert to the previous behavior, where any -cc1 invocation will
create/fork a secondary process. At run-time, it is also possible to
tweak the CLANG_SPAWN_CC1 environment variable. Setting it and will
override the compile-time setting. A value of 0 calls -cc1 inside the
calling process; a value of 1 will create a secondary process, as
before.
Differential Revision: https://reviews.llvm.org/D69825

[mlir][Linalg] Update ReshapeOp::build to be more idiomatic
Summary: This diff makes it easier to create a `linalg.reshape` op and
adds an EDSC builder api test to exercise the new builders.
Reviewers: ftynse, jpienaar
Subscribers: mehdi_amini, rriddle, burmako, shauheen, antiagainst,
arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72580

[Inlining] Add PreInlineThreshold for the new pass manager
Summary: This patch makes it easy to try out different preinlining
thresholds with a command-line switch just like -preinline-threshold for
the legacy pass manager.
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72618

[mlir] Added missing GPU lowering ops.
Summary: This diff adds missing GPU lowering ops to MLIR.
Reviewers: herhut, pifon2a, ftynse
Tags: #pre-merge_beta_testing, #llvm
Differential Revision: https://reviews.llvm.org/D72439

[mlir] m_Constant()
Summary: Introduce m_Constant() which allows matching a constant
operation without forcing the user also to capture the attribute value.
Differential Revision: https://reviews.llvm.org/D72397

[DebugInfo] Make debug line address size mismatch non-fatal to parsing
Reasonable assumptions can be made when a parsed address length does not 
match the expected length, so there's no need for this to be fatal.
Reviewed by: ikudrin
Differential Revision: https://reviews.llvm.org/D72154

[ThinLTO] Add additional ThinLTO pipeline testing with new PM
Summary: I've added some more extensive ThinLTO pipeline testing with
the new PM, motivated by the bug fixed in D72386.
I beefed up llvm/test/Other/new-pm-pgo.ll a little so that it tests 
ThinLTO pre and post link with PGO, similar to the testing for the 
default pipelines with PGO.
Added new pre and post link PGO tests for both instrumentation and 
sample PGO that exhaustively test the pipelines at different 
optimization levels via opt.
Added a clang test to exhaustively test the post link pipeline invoked
for distributed builds. I am currently only testing O2 and O3 since
these are the most important for performance.
It would be nice to add similar exhaustive testing for full LTO, and for 
the old PM, but I don't have the bandwidth now and this is a start to 
cover some of the situations that are not currently default and were 
under tested.
Reviewers: wmi
Subscribers: mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith,
jfb, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72538

[AArch64][SVE] Add patterns for some arith SVE instructions.
Summary: Add patterns for the following instructions:
- smax, smin, umax, umin
Reviewers: sdesmalen, huntergr, rengolin, efriedma, c-rhodes, mgudim,
kmclaughlin
Subscribers: amehsan
Differential Revision: https://reviews.llvm.org/D71779

[Scheduler] Remove superfluous casts. NFC

[X86] Add AVX2 known signbits codegen tests

[X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform shift value

[SelectionDAG] ComputeNumSignBits add
getValidMinimumShiftAmountConstant() ISD::SRA support
Allows us to handle more non-uniform SRA sign bits cases

[LegalizeTypes] Add SoftenFloatResult support for
STRICT_SINT_TO_FP/STRICT_UINT_TO_FP
Some target like arm/riscv with soft-float will have compiling crash
when using -fno-unsafe-math-optimization option. This patch will add the
missing strict FP support to SoftenFloatRes_XINT_TO_FP.
Differential Revision: https://reviews.llvm.org/D72277

[lldb/Scripts] Remove SWIG bot
This is no longer used or maintained.
Differential revision: https://reviews.llvm.org/D72539

Fix tests for builtbot failures
Should fix most of the buildbot failures from 
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, by loosening up the matching 
on the AnalysisProxy output.
Added in --dump-input=fail on the one test that appears to be something 
different, so I can hopefully debug it better.

[lldb/Docs] Extend description section of the main page
The current description is a bit terse. I've copy/pasted the 
introduction form the website.

[X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift
value
Shows that for non-uniform SHL shifts we fail to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)

AMDGPU/GlobalISel: Simplify assert

AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF
The branch target needs to be changed depending on whether there is an 
unconditional branch or not.
Loops also need to be similarly fixed, but compiling a simple testcase 
end to end requires another set of patches that aren't upstream yet.

AMDGPU/GlobalISel: Add some baseline tests for vector extract
A future change will try to fold constant offsets into the loop which 
these will stress.

AMDGPU/GlobalISel: Set insert point after waterfall loop
The current users of the waterfall loop utility functions do not make 
use of the restored original insert point. The insertion is either done,
or they set the insert point somewhere else. A future change will want
to insert instructions after the waterfall loop, but figuring out the
point after the loop is more difficult than ensuring the insert point is
there after the loop.

[SelectionDAG] ComputeNumSignBits add
getValidMaximumShiftAmountConstant() for ISD::SHL support
Allows us to handle non-uniform SHL shifts to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)

AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap}

Try number 2 for fixing bot failures
Additional fixes for bot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f. Remove more exact matching on
AnalyisManagers, as they can vary. Also allow different orders between
LoopAnalysis and BranchProbabilityAnalysis as that can vary due to both
being accessed in the parameter list of a call.

Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf

Fix readability-identifier-naming missing member variables
Fixes PR41122 (missing fixes for member variables in a destructor) and 
PR29005 (does not rename class members in all locations).

Hopefully last fix for bot failures
Hopefully final bot fix for last few failures from 
2af97be8027a0823b88d4b6a07fc5eedb440bc1f.
Looks like sometimes the "llvm::" preceeding objects get printed in the 
debug pass manager output and sometimes they don't. Replace with 
wildcard matching.

[llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
This patch makes it so that cases where multiple instructions that
differ only in their FrameIndex MachineOperand values no longer collide.
For instance:
%1:_(p0) = G_FRAME_INDEX %stack.0
%2:_(p0) = G_FRAME_INDEX %stack.1
Prior to this patch these instructions would collide together.
Differential Revision: https://reviews.llvm.org/D71583

[X86][Disassembler] Fix a bug when disassembling an empty string
readPrefixes() assumes insn->bytes is non-empty. The code path is not 
exercised in llvm-mc because llvm-mc does not feed empty input to 
MCDisassembler::getInstruction().
This bug is uncovered by a5994c789a2982a770254ae1607b5b4cb641f73c. An
empty string did not crash before because the deleted regionReader() 
allowed UINT64_C(-1) as insn->readerCursor.
  Bytes.size() <= Address -> R->Base
 0 <= UINT64_C(-1) - UINT32_C(-1)

Add a couple of missed wildcards in debug-pass-manager output checking
Along with the previous fix for bot failures from 
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, need to add a wildcard in a 
couple of places where my local output did not print "llvm::" but the 
bot is.