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Took 9 min 31 sec

Success Build clang-r365432-t57813-b57813.tar.gz (Jul 8, 2019 9:15:47 PM)

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Build Log

Revision: 364448
Changes
  1. [AMDGPU] Added td definitions for HW regs

    Infrastructure work for future commit. NFC.

    Differential Revision: https://reviews.llvm.org/D64370 (detail)
    by rampitec
  2. [AMDGPU] Always use s_memtime for readcyclecounter

    Differential Revision: https://reviews.llvm.org/D64369 (detail)
    by rampitec
  3. [PowerPC][Peephole] Combine extsw and sldi after instruction selection

    Summary:
    `extsw` and `sldi` are supposed to be combined if they are in the same
    BB in instruction selection phase. This patch handles the case where
    extsw and sldi are not in the same BB.

    Differential Revision: https://reviews.llvm.org/D63806 (detail)
    by lkail
  4. [PowerPC][NFC] remove redundant function isVFReg(). (detail)
    by shchenz
  5. [MachinePipeliner] Fix Phi refers to Phi in same stage in 1st epilogue

    Summary:
    This is exposed by functional testing on PowerPC.
    In some pipelined loops, Phi refer to phi did not get value defined by
    the Phi, hence getting wrong value later.

    As the comment mentioned, we should "use the value defined by the Phi,
    unless we're generating the firstepilog and the Phi refers to a Phi
    in a different stage.", so Phi refering to same stage Phi should use
    the value defined by the Phi here.

    Reviewers: bcahoon, hfinkel

    Reviewed By: hfinkel

    Subscribers: MaskRay, wuzish, nemanjai, hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64035 (detail)
    by jsji
  6. [PowerPC][MachinePipeliner][NFC] Add a testcase for Phi bug. (detail)
    by jsji
  7. [WebAssembly] Make sret parameter work with AddMissingPrototypes

    Summary:
    Even with functions with `no-prototype` attribute, there can be an
    argument `sret` (structure return) attribute, which is an optimization
    when a function return type is a struct. Fixes PR42420.

    Reviewers: sbc100

    Subscribers: dschuff, jgravelle-google, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64318 (detail)
    by aheejin
  8. [LoopPred] Stylistic improvement to recently added NE/EQ normalization [NFC] (detail)
    by reames
  9. [BPF] add new intrinsics preserve_{array,union,struct}_access_index

    For background of BPF CO-RE project, please refer to
      http://vger.kernel.org/bpfconf2019.html
    In summary, BPF CO-RE intends to compile bpf programs
    adjustable on struct/union layout change so the same
    program can run on multiple kernels with adjustment
    before loading based on native kernel structures.

    In order to do this, we need keep track of GEP(getelementptr)
    instruction base and result debuginfo types, so we
    can adjust on the host based on kernel BTF info.
    Capturing such information as an IR optimization is hard
    as various optimization may have tweaked GEP and also
    union is replaced by structure it is impossible to track
    fieldindex for union member accesses.

    Three intrinsic functions, preserve_{array,union,struct}_access_index,
    are introducted.
      addr = preserve_array_access_index(base, index, dimension)
      addr = preserve_union_access_index(base, di_index)
      addr = preserve_struct_access_index(base, gep_index, di_index)
    here,
      base: the base pointer for the array/union/struct access.
      index: the last access index for array, the same for IR/DebugInfo layout.
      dimension: the array dimension.
      gep_index: the access index based on IR layout.
      di_index: the access index based on user/debuginfo types.

    For example, for the following example,
      $ cat test.c
      struct sk_buff {
         int i;
         int b1:1;
         int b2:2;
         union {
           struct {
             int o1;
             int o2;
           } o;
           struct {
             char flags;
             char dev_id;
           } dev;
           int netid;
         } u[10];
      };

      static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr)
          = (void *) 4;

      #define _(x) (__builtin_preserve_access_index(x))

      int bpf_prog(struct sk_buff *ctx) {
        char dev_id;
        bpf_probe_read(&dev_id, sizeof(char), _(&ctx->u[5].dev.dev_id));
        return dev_id;
      }
      $ clang -target bpf -O2 -g -emit-llvm -S -mllvm -print-before-all \
        test.c >& log

    The generated IR looks like below:

      ...
      define dso_local i32 @bpf_prog(%struct.sk_buff*) #0 !dbg !15 {
        %2 = alloca %struct.sk_buff*, align 8
        %3 = alloca i8, align 1
        store %struct.sk_buff* %0, %struct.sk_buff** %2, align 8, !tbaa !45
        call void @llvm.dbg.declare(metadata %struct.sk_buff** %2, metadata !43, metadata !DIExpression()), !dbg !49
        call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #4, !dbg !50
        call void @llvm.dbg.declare(metadata i8* %3, metadata !44, metadata !DIExpression()), !dbg !51
        %4 = load i32 (i8*, i32, i8*)*, i32 (i8*, i32, i8*)** @bpf_probe_read, align 8, !dbg !52, !tbaa !45
        %5 = load %struct.sk_buff*, %struct.sk_buff** %2, align 8, !dbg !53, !tbaa !45
        %6 = call [10 x %union.anon]* @llvm.preserve.struct.access.index.p0a10s_union.anons.p0s_struct.sk_buffs(
             %struct.sk_buff* %5, i32 2, i32 3), !dbg !53, !llvm.preserve.access.index !19
        %7 = call %union.anon* @llvm.preserve.array.access.index.p0s_union.anons.p0a10s_union.anons(
             [10 x %union.anon]* %6, i32 1, i32 5), !dbg !53
        %8 = call %union.anon* @llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons(
             %union.anon* %7, i32 1), !dbg !53, !llvm.preserve.access.index !26
        %9 = bitcast %union.anon* %8 to %struct.anon.0*, !dbg !53
        %10 = call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.anon.0s(
             %struct.anon.0* %9, i32 1, i32 1), !dbg !53, !llvm.preserve.access.index !34
        %11 = call i32 %4(i8* %3, i32 1, i8* %10), !dbg !52
        %12 = load i8, i8* %3, align 1, !dbg !54, !tbaa !55
        %13 = sext i8 %12 to i32, !dbg !54
        call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4, !dbg !56
        ret i32 %13, !dbg !57
      }

      !19 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "sk_buff", file: !3, line: 1, size: 704, elements: !20)
      !26 = distinct !DICompositeType(tag: DW_TAG_union_type, scope: !19, file: !3, line: 5, size: 64, elements: !27)
      !34 = distinct !DICompositeType(tag: DW_TAG_structure_type, scope: !26, file: !3, line: 10, size: 16, elements: !35)

    Note that @llvm.preserve.{struct,union}.access.index calls have metadata llvm.preserve.access.index
    attached to instructions to provide struct/union debuginfo type information.

    For &ctx->u[5].dev.dev_id,
      . The "%6 = ..." represents struct member "u" with index 2 for IR layout and index 3 for DI layout.
      . The "%7 = ..." represents array subscript "5".
      . The "%8 = ..." represents union member "dev" with index 1 for DI layout.
      . The "%10 = ..." represents struct member "dev_id" with index 1 for both IR and DI layout.

    Basically, traversing the use-def chain recursively for the 3rd argument of bpf_probe_read() and
    examining all preserve_*_access_index calls, the debuginfo struct/union/array access index
    can be achieved.

    The intrinsics also contain enough information to regenerate codes for IR layout.
    For array and structure intrinsics, the proper GEP can be constructed.
    For union intrinsics, replacing all uses of "addr" with "base" should be enough.

    The test case ThinLTO/X86/lazyload_metadata.ll is adjusted to reflect the
    new addition of the metadata.

    Signed-off-by: Yonghong Song <yhs@fb.com>

    Differential Revision: https://reviews.llvm.org/D61810 (detail)
    by yhs
  10. [LoopPred] Extend LFTR normalization to the inverse EQ case

    A while back, I added support for NE latches formed by LFTR.  I didn't think that quite through, as LFTR will also produce the inverse EQ form for some loops and I hadn't handled that.  This change just adds handling for that case as well. (detail)
    by reames
  11. [WebAssembly] Fix a typo in a test file name

    Reviewers: sbc100

    Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64324 (detail)
    by aheejin
  12. Changing CodeView debug info type record representation in assembly files to make it more human-readable & editable & fixing bug introduced in r364987 (detail)
    by nilanjana_basu
Revision: 364448
Changes
  1. Use `ln -n` to prevent forming a symlink cycle, instead of rm'ing the source

    This is a better fix for the problem fixed in r334972.

    Also remove the rm'ing of the symlink destination that was there to
    clean up the bots -- it's over a year later, bots should be happy now.

    Differential Revision: https://reviews.llvm.org/D64301 (detail)
    by nico
Revision: 364448
Changes
  1. [sanitizers][windows] FIX: Rtl-Heap Interception and tests

       - Adds interceptors for Rtl[Allocate|Free|Size|ReAllocate]Heap
       - Adds unit tests for the new interceptors and expands HeapAlloc
         tests to demonstrate new functionality.
       Reviewed as D62927
       - adds fixes for ~win and x64 tests

    llvm-svn: 365381 (detail)
    by mcgov
  2. [sanitizers][windows] Rtl-Heap Interception and tests
       - Adds interceptors for Rtl[Allocate|Free|Size|ReAllocate]Heap
       - Adds unit tests for the new interceptors and expands HeapAlloc
         tests to demonstrate new functionality.
       Reviewed as D62927 (detail)
    by mcgov
  3. [TSan] Fix linker error for Linux/AArch64 (detail)
    by yln

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