SuccessChanges

Summary

  1. [ARM] VPT validForTailPredication (details)
  2. [ARM] Remove MVEDomain from VLDR/STR of P0 (details)
  3. [MLIR] Add subf and rsqrt EDSC intrinsics (details)
  4. [mlir][Linalg] Uniformize linalg.generic with named ops. (details)
  5. [llvm-readobj/elf] - Stop reporting invalid extended indexes in warnings for unnamed section symbols. (details)
  6. [SyntaxTree][Synthesis] Fix: `deepCopy` -> `deepCopyExpandingMacros`. (details)
  7. Revert "Reapply Revert "RegAllocFast: Rewrite and improve"" (details)
  8. [ARM] Improve VPT predicate tracking (details)
  9. [AMDGPU] More codegen patterns for v2i16/v2f16 build_vector (details)
  10. Revert "Implement a new kind of Pass: dynamic pass pipeline" (details)
Commit e461921d6ccdd2a77209b2f4d3ca0a4db8e11c35 by sam.parker
[ARM] VPT validForTailPredication

Mark all VPT instructions as valid.

Differential Revision: https://reviews.llvm.org/D87759
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp
Commit a0c1dcc3182769ad1cb9b0ac8fd4ea8ff48847b4 by sam.parker
[ARM] Remove MVEDomain from VLDR/STR of P0

Remove the domain from the instructions and create a shouldInspect
helper for LowOverheadLoops which queries it or a vpr operand.

Differential Revision: https://reviews.llvm.org/D87900
The file was modifiedllvm/lib/Target/ARM/ARMInstrVFP.td
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir
Commit 0304c6da1006f6b472a1e5c1d8776a9f35c9439d by ntv
[MLIR] Add subf and rsqrt EDSC intrinsics

[MLIR] Add subf and rsqrt EDSC intrinsics

NOTE: Please merge it when ready.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D88039
The file was modifiedmlir/include/mlir/Dialect/StandardOps/EDSC/Intrinsics.h
Commit ed229132f1c4ea2ba0644fc345d8279e47a00565 by ntv
[mlir][Linalg] Uniformize linalg.generic with named ops.

This revision allows representing a reduction at the level of linalg on tensors for generic ops by uniformizing with the named ops approach.
The file was modifiedmlir/test/Conversion/LinalgToSPIRV/linalg-to-spirv.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile_parallel.mlir
The file was modifiedmlir/test/Dialect/Linalg/fold-unit-trip-loops.mlir
The file was modifiedmlir/include/mlir/Dialect/Utils/StructuredOpsUtils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir
The file was modifiedmlir/test/Transforms/buffer-placement-preparation-allowed-memref-results.mlir
The file was modifiedmlir/test/Transforms/copy-removal.mlir
The file was modifiedmlir/test/Dialect/Linalg/tensors-to-buffers.mlir
The file was modifiedmlir/test/Transforms/buffer-placement.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/TensorsToBuffers.cpp
The file was modifiedmlir/test/Dialect/Linalg/inlining.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion.mlir
The file was modifiedmlir/test/Transforms/buffer-placement-preparation.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion_indexed_generic.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp
The file was modifiedmlir/test/Dialect/Linalg/standard.mlir
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/Builders.h
The file was modifiedmlir/lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion-tensor.mlir
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile_indexed_generic.mlir
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/test/Dialect/Linalg/parallel_loops.mlir
The file was modifiedmlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
The file was modifiedmlir/test/lib/Transforms/TestBufferPlacement.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile_parallel_reduce.mlir
Commit 28b84dd138666abc005de4810af16bcf007530ea by grimar
[llvm-readobj/elf] - Stop reporting invalid extended indexes in warnings for unnamed section symbols.

We have an issue with `getFullSymbolName`: it assumes that the symbol passed is
always in the `.symtab`, what is wrong. We might calculate and report a wrong index currently.
I've added a test case revealing that.

This patch adds the "symbol index" argument to `getFullSymbolName` signature,
what fixes the issue.

Differential revision: https://reviews.llvm.org/D87899
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dyn-symbols.test
Commit 66bcb14312a08b5d7e1197d23d748b2e23c4d852 by ecaldas
[SyntaxTree][Synthesis] Fix: `deepCopy` -> `deepCopyExpandingMacros`.

There can be Macros that are tagged with `modifiable`. Thus verifying
`canModifyAllDescendants` is not sufficient to avoid macros when deep
copying.

We think the `TokenBuffer` could inform us whether a `Token` comes from
a macro. We'll look into that when we can surface this information
easily, for instance in unit tests for `ComputeReplacements`.

Differential Revision: https://reviews.llvm.org/D88034
The file was modifiedclang/include/clang/Tooling/Syntax/BuildTree.h
The file was modifiedclang/lib/Tooling/Syntax/Synthesis.cpp
The file was modifiedclang/unittests/Tooling/Syntax/SynthesisTest.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
Commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4 by omair.javaid
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""

This reverts commit 55f9f87da2c2ad791b9e62cccb1c035e037444fa.

Breaks following buildbots:
http://lab.llvm.org:8011/builders/lldb-arm-ubuntu/builds/4306
http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/9154
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The file was modifiedllvm/test/DebugInfo/X86/pieces-1.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address_pic.ll
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
The file was modifiedllvm/test/CodeGen/AArch64/br-cond-not-merge.ll
The file was modifiedllvm/test/CodeGen/X86/crash-O0.ll
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The file was removedllvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
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The file was modifiedllvm/test/CodeGen/X86/pr32340.ll
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The file was modifiedllvm/test/CodeGen/X86/pr44749.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
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The file was removedllvm/test/CodeGen/X86/bug47278-eflags-error.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
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The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll
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The file was modifiedllvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll
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The file was modifiedllvm/test/CodeGen/PowerPC/elf-common.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll
The file was modifiedllvm/test/CodeGen/ARM/debug-info-blocks.ll
The file was modifiedllvm/test/CodeGen/PowerPC/addegluecrash.ll
The file was modifiedllvm/test/CodeGen/ARM/Windows/alloca.ll
The file was modifiedllvm/test/CodeGen/ARM/swifterror.ll
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The file was modifiedllvm/test/CodeGen/Mips/msa/ldr_str.ll
The file was modifiedllvm/test/DebugInfo/Mips/prologue_end.ll
The file was modifiedllvm/test/CodeGen/ARM/thumb-big-stack.ll
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The file was modifiedllvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll
The file was modifiedllvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
The file was modifiedllvm/test/CodeGen/SPARC/fp16-promote.ll
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Commit b4fa884a73c5c883723738f67ad1810a6d48cc2d by sam.parker
[ARM] Improve VPT predicate tracking

The VPTBlock has been modified to track the 'global' state of the
VPR, as well as the state for each block. Each object now just holds
a list of instructions that makeup the block, while static structures
hold the predicate information. This enables global access for
querying how both a VPT block and individual instructions are
predicated. These changes now allow us, again, to handle more
complicated cases where multiple instructions build a predicate
and/or where the same predicate in used in multiple blocks.

It doesn't, however, get us back to before the tracking was 'fixed'
as some extra logic will be required to properly handle VPT
instructions. Currently a VPT could be effectively predicated because
of it's inputs, but the existing logic will not detect that and so
will refuse to perform the transformation. This can be seen in
remat-vctp.ll test where we still don't perform the transform.

Differential Revision: https://reviews.llvm.org/D87681
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-blocks.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tp-multiple-vpst.ll
Commit 892ef2e3c0b60656a95d0d9e9f458b73238b21b7 by jay.foad
[AMDGPU] More codegen patterns for v2i16/v2f16 build_vector

It's simpler to do this at codegen time than to do ad-hoc constant
folding of machine instructions in SIFoldOperands.

Differential Revision: https://reviews.llvm.org/D88028
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
Commit 0356a413a443864409f966b069656814f10e7710 by benny.kra
Revert "Implement a new kind of Pass: dynamic pass pipeline"

This reverts commit 385c3f43fceba227be2e4dce84a59075733541c1.

Test  mlir/test/Pass:dynamic-pipeline-fail-on-parent.mlir.test fails
when run with ASAN:

ERROR: AddressSanitizer: stack-use-after-scope on address ...

Reviewed By: bkramer, pifon2a

Differential Revision: https://reviews.llvm.org/D88079
The file was modifiedmlir/include/mlir/Pass/PassManager.h
The file was modifiedmlir/lib/Pass/Pass.cpp
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/Pass/Pass.h
The file was removedmlir/test/Pass/dynamic-pipeline-fail-on-parent.mlir
The file was removedmlir/test/Pass/dynamic-pipeline-nested.mlir
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was removedmlir/test/lib/Transforms/TestDynamicPipeline.cpp
The file was removedmlir/test/Pass/dynamic-pipeline.mlir