Started 2 mo 16 days ago
Took 6 min 45 sec

Success Build clang-r365496-t57827-b57827.tar.gz (Jul 9, 2019 9:08:02 AM)

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Build Log

Revision: 364448
Changes
  1. [ARM] Add test for MVE and no floats. NFC

    Adds a simple test that MVE with no floating point will be promoted correctly
    to software float calls. (detail)
    by dmgreen
  2. [InferFunctionAttrs] add more tests for derefenceable; NFC (detail)
    by spatel
  3. [MIPS GlobalISel] Register bank select for G_PHI. Select i64 phi

    Select gprb or fprb when def/use register operand of G_PHI is
    used/defined by either:
    copy to/from physical register or
    instruction with only one mapping available for that use/def operand.

    Integer s64 phi is handled with narrowScalar when mapping is applied,
    produced artifacts are combined away. Manually set gprb to all register
    operands of instructions created during narrowScalar.

    Differential Revision: https://reviews.llvm.org/D64351 (detail)
    by petar.avramovic
  4. AMDGPU/GlobalISel: Prepare some tests for store selection

    Mostsly these would fail due to trying to use SI with a flat
    operation. Implementing global loads with MUBUF is more work than
    flat, so these won't be handled in the initial load selection.

    Others fail because store of s64 won't initially work, as the current
    set of patterns expect everything to be turned into v2i32. (detail)
    by arsenm
  5. [MIPS GlobalISel] Regbanks for G_SELECT. Select i64, f32 and f64 select

    Select gprb or fprb when def/use register operand of G_SELECT is
    used/defined by either:
    copy to/from physical register or
    instruction with only one mapping available for that use/def operand.

    Integer s64 select is handled with narrowScalar when mapping is applied,
    produced artifacts are combined away. Manually set gprb to all register
    operands of instructions created during narrowScalar.

    For selection of floating point s32 or s64 select it is enough to set
    fprb of appropriate size and selectImpl will do the rest.

    Differential Revision: https://reviews.llvm.org/D64350 (detail)
    by petar.avramovic
  6. AMDGPU/GlobalISel: Fix test (detail)
    by arsenm
  7. [docs][llvm-dwarfdump] Fix wording (detail)
    by jhenderson
  8. AMDGPU/GlobalISel: Legalize more concat_vectors (detail)
    by arsenm
  9. AMDGPU/GlobalISel: Improve regbankselect for icmp s16

    Account for 64-bit scalar eq/ne when available. (detail)
    by arsenm
  10. AMDGPU/GlobalISel: Make s16 G_ICMP legal (detail)
    by arsenm
  11. AMDGPU/GlobalISel: Select G_SUB (detail)
    by arsenm
  12. AMDGPU/GlobalISel: Select G_UNMERGE_VALUES (detail)
    by arsenm
  13. AMDGPU/GlobalISel: Select G_MERGE_VALUES (detail)
    by arsenm
  14. gn build: Merge r365453 (detail)
    by nico
  15. [CodeGen] AccelTable - remove non-constexpr (MSVC) Atom defs

    Now that we've dropped VS2015 support (D64326) we can enable the constexpr variables on MSVC builds as VS2017+ correctly handles them (detail)
    by rksimon
Revision: 364448
Changes
  1. [libclang] Fix hang in release / assertion in debug when evaluating value-dependent types.

    Expression evaluator doesn't work in value-dependent types, so ensure that the
    precondition it asserts holds.

    This fixes https://bugs.llvm.org/show_bug.cgi?id=42532

    Differential Revision: https://reviews.llvm.org/D64409 (detail)
    by emilio
  2. [OPENMP]Fix the float point semantics handling on the device.

    The device should use the same float point representation as the host.
    Previous patch fixed the handling of the sizes of the float point types,
    but did not fixed the fp semantics. This patch makes target device to
    use the host fp semantics. this is required for the correct data
    transfer between host and device and correct codegen. (detail)
    by abataev
  3. [ItaniumMangle] Refactor long double/__float128 mangling and fix the mangled code

    In gcc PowerPC, long double has 3 mangling schemes:

    -mlong-double-64: `e`
    -mlong-double-128 -mabi=ibmlongdouble: `g`
    -mlong-double-128 -mabi=ieeelongdouble: `u9__ieee128` (gcc <= 8.1: `U10__float128`)

    The current useFloat128ManglingForLongDouble() bisection is not suitable
    when we support -mlong-double-128 in clang (D64277). Replace
    useFloat128ManglingForLongDouble() with getLongDoubleMangling() and
    getFloat128Mangling() to allow 3 mangling schemes.

    I also deleted the `getTriple().isOSBinFormatELF()` check (the Darwin
    support has gone: https://reviews.llvm.org/D50988).

    For x86, change the mangled code of __float128 from `U10__float128` to `g`. `U10__float128` was wrongly copied from PowerPC.
    The test will be added to `test/CodeGen/x86-long-double.cpp` in D64277.

    Reviewed By: erichkeane

    Differential Revision: https://reviews.llvm.org/D64276 (detail)
    by maskray
  4. [Syntax] Move roles into a separate enum

    To align with reviewer's suggestions. (detail)
    by ibiryukov

Started by upstream project relay-lnt-ctmark build number 8781
originally caused by:

This run spent:

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