Started 9 days 13 hr ago
Took 59 min on green-dragon-20

Failed Build rL:371595 - C:371597 - #548 (Sep 11, 2019 2:10:16 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 371595
  • http://llvm.org/svn/llvm-project/cfe/trunk : 371597
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 371584
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/zorg/trunk : 371154
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 371324
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 371504
Changes
  1. [ARM] Take into account -mcpu and -mfpu options while handling 'crypto' feature

    Submittin in behalf of krisb (Kristina Bessonova) <ch.bessonova@gmail.com>

    Summary:
    '+crypto' means '+aes' and '+sha2' for arch >= ARMv8 when they were
    not disabled explicitly. But this is correctly handled only in case of
    '-march' option, though the feature may also be specified through
    the '-mcpu' or '-mfpu' options. In the following example:

      $ clang -mcpu=cortex-a57 -mfpu=crypto-neon-fp-armv8

    'aes' and 'sha2' are disabled that is quite unexpected:

      $ clang -cc1 -triple armv8--- -target-cpu cortex-a57
        <...> -target-feature -sha2 -target-feature -aes -target-feature +crypto

    This exposed by https://reviews.llvm.org/D63936 that makes
    the 'aes' and 'sha2' features disabled by default.

    So, while handling the 'crypto' feature we need to take into account:
      - a CPU name, as it provides the information about architecture
        (if no '-march' option specified),
      - features, specified by the '-mcpu' and '-mfpu' options.

    Reviewers: SjoerdMeijer, ostannard, labrinea, dnsampaio

    Reviewed By: dnsampaio

    Subscribers: ikudrin, javed.absar, kristof.beyls, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D66018

    Author: krisb (detail/ViewSVN)
    by dnsampaio
  2. [LoopInterchange] Properly move condition, induction increment and ops to latch.

    Currently we only rely on the induction increment to come before the
    condition to ensure the required instructions get moved to the new
    latch.

    This patch duplicates and moves the required instructions to the
    newly created latch. We move the condition to the end of the new block,
    then process its operands. We stop at operands that are defined
    outside the loop, or are the induction PHI.

    We duplicate the instructions and update the uses in the moved
    instructions, to ensure other users remain intact. See the added
    test2 for such an example.

    Reviewers: efriedma, mcrosier

    Reviewed By: efriedma

    Differential Revision: https://reviews.llvm.org/D67367 (detail/ViewSVN)
    by fhahn
  3. [NFC][ARM] Add and modify tests

    Add test for ParallelDSP. (detail/ViewSVN)
    by sam_parker

Started by an SCM change (3 times)

This run spent:

  • 48 min waiting;
  • 59 min build duration;
  • 1 hr 48 min total from scheduled to completion.
LLVM/Clang Warnings: 2 warnings.

Identified problems

Regression test failed

This build failed because a regression test in the test suite FAILed. See the test report for details.
Indication 1

Compile Error

This build failed because of a compile error. Below is a list of all errors in the build log:
Indication 2

Assertion failure

This build failed because of an assertion failure. Below is a list of all errors in the build log:
Indication 3

Ninja target failed

Below is a link to the first failed ninja target.
Indication 4

Missing test results

The test result file Jenkins is looking for does not exist after the build.
Indication 5