1. [mlir] switch the modeling of LLVM types to use the new mechanism (details)
  2. [mlir] Fix GCC5 compilation problem in MLIR->LLVM type translation (details)
  3. [InstSimplify] fold nested min/max intrinsics with constant operands (details)
  4. [mlir][Vector] Add linalg.copy-based pattern for splitting vector.transfer_read into full and partial copies. (details)
  5. [lit] Add --time-trace-output to lit (details)
  6. [X86][AVX] isHorizontalBinOp - relax lane-crossing limits for AVX1-only targets. (details)
Commit ec1f4e7c3b17656658c9cf49c33bc06c4bc747c2 by zinenko
[mlir] switch the modeling of LLVM types to use the new mechanism

A new first-party modeling for LLVM IR types in the LLVM dialect has been
developed in parallel to the existing modeling based on wrapping LLVM `Type *`
instances. It resolves the long-standing problem of modeling identified
structure types, including recursive structures, and enables future removal of
LLVMContext and related locking mechanisms from LLVMDialect.

This commit only switches the modeling by (a) renaming LLVMTypeNew to LLVMType,
(b) removing the old implementaiton of LLVMType, and (c) updating the tests. It
is intentionally minimal. Separate commits will remove the infrastructure built
for the transition and update API uses where appropriate.

Depends On D85020

Reviewed By: rriddle

Differential Revision:
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
The file was modifiedmlir/test/Conversion/StandardToLLVM/invalid.mlir
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
The file was modifiedmlir/test/Dialect/GPU/outlining.mlir
The file was modifiedmlir/test/Conversion/GPUToROCm/lower-rocdl-kernel-to-hsaco.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/TypeDetail.h
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-funcs.mlir
The file was modifiedmlir/test/Target/import.ll
The file was modifiedmlir/include/mlir/Target/LLVMIR/TypeTranslation.h
The file was modifiedmlir/test/Dialect/GPU/multiple-all-reduce.mlir
The file was modifiedmlir/test/lib/Target/TestLLVMTypeTranslation.cpp
The file was modifiedmlir/lib/Target/LLVMIR/TypeTranslation.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/types.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/func-to-llvm.mlir
The file was modifiedmlir/test/Conversion/VectorToROCDL/vector-to-rocdl.mlir
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
The file was modifiedmlir/test/Dialect/LLVMIR/rocdl.mlir
The file was modifiedmlir/test/lib/Dialect/LLVMIR/LLVMTypeTestDialect.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/roundtrip.mlir
The file was modifiedmlir/test/Target/llvmir-intrinsics.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/comparison-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/GPUToCUDA/lower-nvvm-kernel-to-cubin.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/nvvm.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/standard-to-llvm.mlir
The file was modifiedmlir/test/Dialect/Linalg/llvm.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
The file was modifiedmlir/test/Target/llvmir-invalid.mlir
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/calling-convention.mlir
The file was modifiedmlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
The file was modifiedmlir/test/Target/nvvmir.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/
The file was modifiedmlir/test/Conversion/GPUToVulkan/invoke-vulkan.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/func.mlir
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
The file was modifiedmlir/test/Conversion/GPUCommon/memory-attrbution.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
The file was modifiedmlir/test/Conversion/GPUCommon/lower-launch-func-to-gpu-runtime-calls.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/spirv-types-to-llvm.mlir
The file was modifiedmlir/test/Target/rocdl.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-static-memref-ops.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/global.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir
The file was modifiedmlir/test/Target/llvmir.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-dynamic-memref-ops.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
The file was modifiedmlir/test/Target/avx512.mlir
The file was modifiedmlir/test/mlir-cpu-runner/simple.mlir
The file was modifiedmlir/test/Dialect/GPU/invalid.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/logical-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/shifts-to-llvm.mlir
Commit cb9f9df5f8239e291a62934b0f64eb795b26d84a by zinenko
[mlir] Fix GCC5 compilation problem in MLIR->LLVM type translation

GCC5 seems to dislike generic lambdas calling a method of the class
containing the lambda without explicit `this`.
The file was modifiedmlir/lib/Target/LLVMIR/TypeTranslation.cpp
Commit 04e45ae1c6d2fdbf3fd4242df69d1511df757d48 by spatel
[InstSimplify] fold nested min/max intrinsics with constant operands

This is based on the existing code for the non-intrinsic idioms
in InstCombine.

The vector constant constraint is non-obvious: undefs should be
ok in the outer call, but they can't propagate safely from the
inner call in all cases. Example:
  define <2 x i8> @src(<2 x i8> %x) {
    %m = umin <2 x i8> %x, { 7, undef }
    %m2 = umin <2 x i8> { 9, 9 }, %m
    ret <2 x i8> %m2
  define <2 x i8> @tgt(<2 x i8> %x) {
    %m = umin <2 x i8> %x, { 7, undef }
    ret <2 x i8> %m
  Transformation doesn't verify!
  ERROR: Value mismatch

  <2 x i8> %x = < undef, undef >

  <2 x i8> %m = < #x00 (0) [based on undef value], #x00 (0) >
  <2 x i8> %m2 = < #x00 (0), #x00 (0) >

  <2 x i8> %m = < #x07 (7), #x10 (16) >
  Source value: < #x00 (0), #x00 (0) >
  Target value: < #x07 (7), #x10 (16) >
The file was modifiedllvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit 1a4263d394c1a93757613bde4b1c2cf8d6a7bbb9 by ntv
[mlir][Vector] Add linalg.copy-based pattern for splitting vector.transfer_read into full and partial copies.

This revision adds a transformation and a pattern that rewrites a "maybe masked" `vector.transfer_read %view[...], %pad `into a pattern resembling:

   %1:3 = scf.if (%inBounds) {
      scf.yield %view : memref<A...>, index, index
    } else {
      %2 = linalg.fill(%extra_alloc, %pad)
      %3 = subview %view [...][...][...]
      linalg.copy(%3, %alloc)
      memref_cast %extra_alloc: memref<B...> to memref<A...>
      scf.yield %4 : memref<A...>, index, index
   %res= vector.transfer_read %1#0[%1#1, %1#2] {masked = [false ... false]}
where `extra_alloc` is a top of the function alloca'ed buffer of one vector.

This rewrite makes it possible to realize the "always full tile" abstraction where vector.transfer_read operations are guaranteed to read from a padded full buffer.
The extra work only occurs on the boundary tiles.
The file was modifiedmlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
The file was modifiedmlir/test/lib/Transforms/TestVectorTransforms.cpp
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorTransforms.h
The file was modifiedmlir/lib/Dialect/Vector/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.h
Commit 98827feddb90b8d8bfeb3c85f7801ee411bab2cd by russell.gallop
[lit] Add --time-trace-output to lit

This produces a chrome://tracing compatible trace file in the same way
as -ftime-trace.

This can be useful in optimising test time where one long test is causing
long overall test time on a wide machine.

This also helped in finding tests which have side effects on others

Differential Revision:
The file was modifiedllvm/utils/lit/lit/
The file was modifiedllvm/utils/lit/lit/
The file was modifiedllvm/utils/lit/lit/
The file was modifiedllvm/utils/lit/lit/
Commit 36750ba5bd0e9e72120dbfaab4166baafd89e98a by llvm-dev
[X86][AVX] isHorizontalBinOp - relax lane-crossing limits for AVX1-only targets.

Permit lane-crossing post shuffles on AVX1 targets as long as every element comes from the same source lane, which for v8f32/v4f64 cases can be efficiently lowered with the LowerShuffleAsLanePermuteAnd* style methods.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/haddsub-4.ll