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Success Build clang-r365511-t57829-b57829.tar.gz (Jul 9, 2019 10:16:35 AM)

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Revision: 364448
Changes
  1. [RISCV] Fix ICE in isDesirableToCommuteWithShift

    Summary:
    There was an error being thrown from isDesirableToCommuteWithShift in
    some tests. This was tracked down to the method being called before
    legalisation, with an extended value type, not a machine value type.

    In the case I diagnosed, the error was only hit with an instruction sequence
    involving `i24`s in the add and shift. `i24` is not a Machine ValueType, it is
    instead an Extended ValueType which was causing the issue.

    I have added a test to cover this case, and fixed the error in the callback.

    Reviewers: asb, luismarques

    Reviewed By: asb

    Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64425 (detail)
    by lenary
  2. [AArch64][GlobalISel] Optimize conditional branches followed by unconditional branches

    If we have an icmp->brcond->br sequence where the brcond just branches to the
    next block jumping over the br, while the br takes the false edge, then we can
    modify the conditional branch to jump to the br's target while inverting the
    condition of the incoming icmp. This means we can eliminate the br as an
    unconditional branch to the fallthrough block.

    Differential Revision: https://reviews.llvm.org/D64354 (detail)
    by aemerson
  3. [mips] Show error in case of using FP64 mode on pre MIPS32R2 CPU (detail)
    by atanasyan
  4. [mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC

    Support for 64-bit coprocessors on a 32-bit architecture
    was added in `MIPS32 R2`. (detail)
    by atanasyan
  5. [NFC] Fixed tests (detail)
    by xbolva00
  6. [DAGCombine] LoadedSlice - keep getOffsetFromBase() uint64_t offset. NFCI.

    Keep the uint64_t type from getOffsetFromBase() to stop truncation/extension overflow warnings in MSVC in alignment math. (detail)
    by rksimon
  7. [BPF] Support for compile once and run everywhere

    Introduction
    ============

    This patch added intial support for bpf program compile once
    and run everywhere (CO-RE).

    The main motivation is for bpf program which depends on
    kernel headers which may vary between different kernel versions.
    The initial discussion can be found at https://lwn.net/Articles/773198/.

    Currently, bpf program accesses kernel internal data structure
    through bpf_probe_read() helper. The idea is to capture the
    kernel data structure to be accessed through bpf_probe_read()
    and relocate them on different kernel versions.

    On each host, right before bpf program load, the bpfloader
    will look at the types of the native linux through vmlinux BTF,
    calculates proper access offset and patch the instruction.

    To accommodate this, three intrinsic functions
       preserve_{array,union,struct}_access_index
    are introduced which in clang will preserve the base pointer,
    struct/union/array access_index and struct/union debuginfo type
    information. Later, bpf IR pass can reconstruct the whole gep
    access chains without looking at gep itself.

    This patch did the following:
      . An IR pass is added to convert preserve_*_access_index to
        global variable who name encodes the getelementptr
        access pattern. The global variable has metadata
        attached to describe the corresponding struct/union
        debuginfo type.
      . An SimplifyPatchable MachineInstruction pass is added
        to remove unnecessary loads.
      . The BTF output pass is enhanced to generate relocation
        records located in .BTF.ext section.

    Typical CO-RE also needs support of global variables which can
    be assigned to different values to different hosts. For example,
    kernel version can be used to guard different versions of codes.
    This patch added the support for patchable externals as well.

    Example
    =======

    The following is an example.

      struct pt_regs {
        long arg1;
        long arg2;
      };
      struct sk_buff {
        int i;
        struct net_device *dev;
      };

      #define _(x) (__builtin_preserve_access_index(x))
      static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr) =
              (void *) 4;
      extern __attribute__((section(".BPF.patchable_externs"))) unsigned __kernel_version;
      int bpf_prog(struct pt_regs *ctx) {
        struct net_device *dev = 0;

        // ctx->arg* does not need bpf_probe_read
        if (__kernel_version >= 41608)
          bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg1)->dev));
        else
          bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg2)->dev));
        return dev != 0;
      }

    In the above, we want to translate the third argument of
    bpf_probe_read() as relocations.

      -bash-4.4$ clang -target bpf -O2 -g -S trace.c

    The compiler will generate two new subsections in .BTF.ext,
    OffsetReloc and ExternReloc.
    OffsetReloc is to record the structure member offset operations,
    and ExternalReloc is to record the external globals where
    only u8, u16, u32 and u64 are supported.

       BPFOffsetReloc Size
       struct SecLOffsetReloc for ELF section #1
       A number of struct BPFOffsetReloc for ELF section #1
       struct SecOffsetReloc for ELF section #2
       A number of struct BPFOffsetReloc for ELF section #2
       ...
       BPFExternReloc Size
       struct SecExternReloc for ELF section #1
       A number of struct BPFExternReloc for ELF section #1
       struct SecExternReloc for ELF section #2
       A number of struct BPFExternReloc for ELF section #2

      struct BPFOffsetReloc {
        uint32_t InsnOffset;    ///< Byte offset in this section
        uint32_t TypeID;        ///< TypeID for the relocation
        uint32_t OffsetNameOff; ///< The string to traverse types
      };

      struct BPFExternReloc {
        uint32_t InsnOffset;    ///< Byte offset in this section
        uint32_t ExternNameOff; ///< The string for external variable
      };

    Note that only externs with attribute section ".BPF.patchable_externs"
    are considered for Extern Reloc which will be patched by bpf loader
    right before the load.

    For the above test case, two offset records and one extern record
    will be generated:
      OffsetReloc records:
            .long   .Ltmp12                 # Insn Offset
            .long   7                       # TypeId
            .long   242                     # Type Decode String
            .long   .Ltmp18                 # Insn Offset
            .long   7                       # TypeId
            .long   242                     # Type Decode String

      ExternReloc record:
            .long   .Ltmp5                  # Insn Offset
            .long   165                     # External Variable

      In string table:
            .ascii  "0:1"                   # string offset=242
            .ascii  "__kernel_version"      # string offset=165

    The default member offset can be calculated as
        the 2nd member offset (0 representing the 1st member) of struct "sk_buff".

    The asm code:
        .Ltmp5:
        .Ltmp6:
                r2 = 0
                r3 = 41608
        .Ltmp7:
        .Ltmp8:
                .loc    1 18 9 is_stmt 0        # t.c:18:9
        .Ltmp9:
                if r3 > r2 goto LBB0_2
        .Ltmp10:
        .Ltmp11:
                .loc    1 0 9                   # t.c:0:9
        .Ltmp12:
                r2 = 8
        .Ltmp13:
                .loc    1 19 66 is_stmt 1       # t.c:19:66
        .Ltmp14:
        .Ltmp15:
                r3 = *(u64 *)(r1 + 0)
                goto LBB0_3
        .Ltmp16:
        .Ltmp17:
        LBB0_2:
                .loc    1 0 66 is_stmt 0        # t.c:0:66
        .Ltmp18:
                r2 = 8
                .loc    1 21 66 is_stmt 1       # t.c:21:66
        .Ltmp19:
                r3 = *(u64 *)(r1 + 8)
        .Ltmp20:
        .Ltmp21:
        LBB0_3:
                .loc    1 0 66 is_stmt 0        # t.c:0:66
                r3 += r2
                r1 = r10
        .Ltmp22:
        .Ltmp23:
        .Ltmp24:
                r1 += -8
                r2 = 8
                call 4

    For instruction .Ltmp12 and .Ltmp18, "r2 = 8", the number
    8 is the structure offset based on the current BTF.
    Loader needs to adjust it if it changes on the host.

    For instruction .Ltmp5, "r2 = 0", the external variable
    got a default value 0, loader needs to supply an appropriate
    value for the particular host.

    Compiling to generate object code and disassemble:
       0000000000000000 bpf_prog:
               0:       b7 02 00 00 00 00 00 00         r2 = 0
               1:       7b 2a f8 ff 00 00 00 00         *(u64 *)(r10 - 8) = r2
               2:       b7 02 00 00 00 00 00 00         r2 = 0
               3:       b7 03 00 00 88 a2 00 00         r3 = 41608
               4:       2d 23 03 00 00 00 00 00         if r3 > r2 goto +3 <LBB0_2>
               5:       b7 02 00 00 08 00 00 00         r2 = 8
               6:       79 13 00 00 00 00 00 00         r3 = *(u64 *)(r1 + 0)
               7:       05 00 02 00 00 00 00 00         goto +2 <LBB0_3>

        0000000000000040 LBB0_2:
               8:       b7 02 00 00 08 00 00 00         r2 = 8
               9:       79 13 08 00 00 00 00 00         r3 = *(u64 *)(r1 + 8)

        0000000000000050 LBB0_3:
              10:       0f 23 00 00 00 00 00 00         r3 += r2
              11:       bf a1 00 00 00 00 00 00         r1 = r10
              12:       07 01 00 00 f8 ff ff ff         r1 += -8
              13:       b7 02 00 00 08 00 00 00         r2 = 8
              14:       85 00 00 00 04 00 00 00         call 4

    Instructions #2, #5 and #8 need relocation resoutions from the loader.

    Signed-off-by: Yonghong Song <yhs@fb.com>

    Differential Revision: https://reviews.llvm.org/D61524 (detail)
    by yhs
  8. [ADT] Remove MSVC-only "no two-phase name lookup" typename path.

    Now that we've dropped VS2015 support (D64326) we can use the regular codepath as VS2017+ correctly handles it (detail)
    by rksimon
  9. [NFC] Added tests for D64285 (detail)
    by xbolva00
  10. [HardwareLoops] NFC - move hardware loop checking code to isHardwareLoopProfitable()

    Differential Revision: https://reviews.llvm.org/D64197 (detail)
    by shchenz
Revision: 364448
Changes
  1. Revert Revert Devirtualize destructor of final class.

    Revert r364359 and recommit r364100.

    r364100 was reverted as r364359 due to an internal test failure, but it was a
    false alarm. (detail)
    by yamauchi
  2. [OpenCL][Sema] Improve address space support for blocks

    Summary:
    This patch ensures that the following code is compiled identically with
    -cl-std=CL2.0 and -fblocks -cl-std=c++.

        kernel void test(void) {
          void (^const block_A)(void) = ^{
            return;
          };
        }

    A new test is not added because cl20-device-side-enqueue.cl will cover
    this once blocks are further improved for C++ for OpenCL.

    The changes to Sema::PerformImplicitConversion are based on
    the parts of Sema::CheckAssignmentConstraints on block pointer
    conversions.

    Reviewers: rjmccall, Anastasia

    Subscribers: yaxunl, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D64083 (detail)
    by mantognini
  3. [OpenCL][Sema] Fix builtin rewriting

    This patch ensures built-in functions are rewritten using the proper
    parent declaration.

    Existing tests are modified to run in C++ mode to ensure the
    functionality works also with C++ for OpenCL while not increasing the
    testing runtime. (detail)
    by mantognini
  4. Ignore trailing NullStmts in StmtExprs for GCC compatibility.

    Ignore trailing NullStmts in compound expressions when determining the result type and value. This is to match the GCC behavior which ignores semicolons at the end of compound expressions.

    Patch by Dominic Ferreira. (detail)
    by aaronballman

Started by upstream project relay-test-suite-verify-machineinstrs build number 5589
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