Started 5 mo 6 days ago
Took 20 min

Success Build clang-r362915-t57383-b57383.tar.gz (Jun 9, 2019 7:03:04 PM)


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Build Log

Revision: 362564
  1. [X86] Use EVEX instructions for f128 FAND/FOR/FXOR when avx512vl is enabled. (detail)
    by ctopper
  2. [X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns.

    Previously we did the equivalent operation in isel patterns with
    COPY_TO_REGCLASS operations to transition. By inserting
    scalar_to_vetors and extract_vector_elts before isel we can
    allow each piece to be selected individually and accomplish the
    same final result.

    I ideally we'd use vector operations earlier in lowering/combine,
    but that looks to be more difficult.

    The scalar-fp-to-i64.ll changes are because we have a pattern for
    using movlpd for store+extract_vector_elt. While an f64 store
    uses movsd. The encoding sizes are the same. (detail)
    by ctopper

Started by upstream project relay-test-suite-verify-machineinstrs build number 5419
originally caused by:

This run spent:

  • 11 min waiting;
  • 20 min build duration;
  • 20 min total from scheduled to completion.