Changes

Remove the obsolete BlockByRefStruct flag from LLVM IR
DIFlagBlockByRefStruct is an unused DIFlag that originally was used by 
clang to express (Objective-)C block captures in debug info. For the 
last year Clang has been emitting complex DIExpressions to describe 
block captures instead, which makes all the code supporting this flag 
redundant.
This patch removes the flag and all supporting "dead" code, so we can 
reuse the bit for something else in the future.
Since this only affects debug info generated by Clang with the block 
extension this mostly affects Apple platforms and I don't have any 
bitcode compatibility concerns for removing this. The Verifier will 
reject debug info that uses the bit and thus degrade gracefully when 
LTO'ing older bitcode with a newer compiler.
rdar://problem/44304813
Differential Revision: https://reviews.llvm.org/D67453
llvm-svn: 372272

[AArch64][GlobalISel] Support lowering musttail calls
Since we now lower most tail calls, it makes sense to support musttail.
Instead of always falling back to SelectionDAG, only fall back when a
musttail call was not able to be emitted as a tail call. Once we can
handle most incoming and outgoing arguments, we can change this to a
`report_fatal_error` like in ISelLowering.
Remove the assert that we don't have varargs and a musttail, and replace
it with a return false. Implementing this requires that we implement
`saveVarArgRegisters` from AArch64ISelLowering, which is an entirely
different patch.
Add GlobalISel lines to vararg-tallcall.ll to make sure that we produce
correct code. Right now we only fall back, but eventually this will be
relevant.
Differential Revision: https://reviews.llvm.org/D67681
llvm-svn: 372273

[Docs] Moves topics to new categories
This commit moves several topics to new categories. It also removes a
few duplicate links in Subsystem Documentation.
llvm-svn: 372274

[WebAssembly] Restore defaults for stores per memop
Summary: Large slowdowns were observed in Rust due to many small,
constant sized copies in conjunction with poorly-optimized memory.copy 
implementations. Since memory.copy cannot be expected to be inlined 
efficiently by engines at this time, stop using it for the smallest 
copies. We continue to lower all memcpy intrinsics to memory.copy, 
though.
Reviewers: aheejin, alexcrichton
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, JDevlieghere,
sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67639
llvm-svn: 372275

[utils] Amend update_llc_test_checks.py to non-llc tooling, NFC
Very minor change aiming to make it easier to extend the script 
downstream to support non-llc, but llc-like tools. The main objective is 
to decrease the probability of merge conflicts.
llvm-svn: 372276

[utils] Add minimal support for MIR inputs to update_llc_test_checks.py
update_{llc,mir}_test_checks.py applicability is determined by the 
output (assembly or MIR), not the input, which makes 
update_llc_test_checks.py the right tool to generate tests that start at 
MIR and stop at the final assembly.
This commit adds the minimal support for this path. Main limitation that 
remains:
- MIR has to have LLVM IR section, and the CHECK lines will be inserted
 into the LLVM IR functions that correspond to the MIR functions.
Running
 ../utils/update_llc_test_checks.py --llc-binary ./bin/llc on a slightly
modified  ../test/CodeGen/X86/bad-tls-fold.mir
produces the following diff:
+# NOTE: Assertions have been autogenerated by
utils/update_llc_test_checks.py
+# RUN: llc %s -o - | FileCheck %s
--- |
  target triple = "x86_64-unknown-linux-gnu"
@@ -6,17 +7,31 @@
  @i = external thread_local global i32
   define i32 @or() {
+  ; CHECK-LABEL: or:
+  ; CHECK:       # %bb.0: # %entry
+  ; CHECK-NEXT:    movq {{.*}}(%rip), %rax
+  ; CHECK-NEXT:    orq $7, %rax
+  ; CHECK-NEXT:    movq i@{{.*}}(%rip), %rcx
+  ; CHECK-NEXT:    orq %rax, %rcx
+  ; CHECK-NEXT:    movl %fs:(%rcx), %eax
+  ; CHECK-NEXT:    retq
  entry:
    ret i32 undef
  }
-
  define i32 @and() {
+  ; CHECK-LABEL: and:
+  ; CHECK:       # %bb.0: # %entry
+  ; CHECK-NEXT:    movq {{.*}}(%rip), %rax
+  ; CHECK-NEXT:    orq $7, %rax
+  ; CHECK-NEXT:    movq i@{{.*}}(%rip), %rcx
+  ; CHECK-NEXT:    andq %rax, %rcx
+  ; CHECK-NEXT:    movl %fs:(%rcx), %eax
+  ; CHECK-NEXT:    retq
  entry:
    ret i32 undef
  }
...
(not applied)
llvm-svn: 372277