FailedChanges

Summary

  1. [SimplifyCFG] Fix inconsistency in block size assessment for threading (details)
  2. Add front/back accessors to indexed_accessor_range. (details)
  3. [SVE][CodeGen] Fix bug in DAGCombiner::reduceBuildVecToShuffle (details)
  4. [llvm-objcopy][MachO] Fix segment size alignment (details)
  5. [SystemZ] Improve handling of ZERO_EXTEND_VECTOR_INREG. (details)
  6. [CodeGen] Fix warning in getNode for EXTRACT_SUBVECTOR (details)
Commit f01d9e6fc3e291a2faed8c9b7dcbabf760f32bd6 by mkazantsev
[SimplifyCFG] Fix inconsistency in block size assessment for threading

Sometimes SimplifyCFG may decide to perform jump threading. In order
to do it, it follows the following algorithm:

1. Checks if the block is small enough for threading;
2. If yes, inserts a PR Phi relying that the next iteration will remove it
   by performing jump threading;
3. The next iteration checks the block again and performs the threading.

This logic has a corner case: inserting the PR Phi increases block's size
by 1. If the block size at first check was max possible, one more Phi will
exceed this size, and we will neither perform threading nor remove the
created Phi node. As result, we will end up with worse IR than before.

This patch fixes this situation by excluding Phis from block size computation.
Excluding Phis from size computation for threading also makes sense by
itself because in case of threadign all those Phis will be removed.

Differential Revision: https://reviews.llvm.org/D81835
Reviewed By: asbirlea, nikic
The file was modifiedllvm/test/Transforms/SimplifyCFG/unprofitable-pr.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 6b9a706200cbb27e5e863cfd41fb3684ee616e23 by riddleriver
Add front/back accessors to indexed_accessor_range.

These map to the similar accessors on ArrayRef and other random access containers.

This fixes a compilation error on MLIR ODS for variadic operands/results, which relied on the availability of front in certain situations.
The file was modifiedllvm/include/llvm/ADT/STLExtras.h
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
Commit 46a7f4d6f4bf2cc23a410e771adb587c5968047d by david.sherwood
[SVE][CodeGen] Fix bug in DAGCombiner::reduceBuildVecToShuffle

When trying to reduce a BUILD_VECTOR to a SHUFFLE_VECTOR it's
important that we carefully check the vector types that led to
that BUILD_VECTOR. In the test I have attached to this commit
there is a case where the results of two SVE faddv instructions
are being stored to consecutive memory locations. With my fix,
as part of merging those stores we discover that each BUILD_VECTOR
element came from an extract of a SVE vector element and
therefore bail out.

Differential Revision: https://reviews.llvm.org/D82564
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-merging-stores.ll
Commit 2c663aa539c3c378599776f4a6849f1cbee5fb93 by alexshap
[llvm-objcopy][MachO] Fix segment size alignment

This diff addresses the old TODO in MachOObjcopy.cpp and
correctly sets the page size used for alignment of segments.
In particular, now llvm-objcopy's output is consistent
with the input (the alignment of vmsize doesn't change).

Test plan:

1. make check-all
2. verify that a binary copied via llvm-objcopy now correctly works on iOS.

Differential revision: https://reviews.llvm.org/D82503
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp
The file was addedllvm/test/tools/llvm-objcopy/MachO/segment-size-alignment.test
Commit ef7aad0db49f0a3623b42af991ba4ae48099a58d by paulsson
[SystemZ] Improve handling of ZERO_EXTEND_VECTOR_INREG.

Instead of doing multiple unpacks when zero extending vectors (e.g. v2i16 ->
v2i64), benchmarks have shown that it is better to do a VPERM (vector
permute) since that is only one sequential instruction on the critical path.

This patch achieves this by

1. Expand ZERO_EXTEND_VECTOR_INREG into a vector shuffle with a zero vector
   instead of (multiple) unpacks.

2. Improve SystemZ::GeneralShuffle to perform a single unpack as the last
   operation if Bytes matches it.

Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D78486
The file was addedllvm/test/CodeGen/SystemZ/vec-move-24.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-move-16.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was modifiedllvm/test/CodeGen/SystemZ/vec-zext.ll
The file was modifiedllvm/test/CodeGen/SystemZ/vec-move-23.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
Commit c02332a69399a82244298f0097bc98fafdeb3042 by david.sherwood
[CodeGen] Fix warning in getNode for EXTRACT_SUBVECTOR

Fix a warning in getNode() when extracting a subvector from a
concat vector. We can simply replace the call to getVectorNumElements
with getVectorMinNumElements as this follows the defined behaviour
for EXTRACT_SUBVECTOR.

Differential Revision: https://reviews.llvm.org/D82746
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c