Changes

Summary

[Driver] Change -fnostack-clash-protection to -fno-stack-clash-protection (details)
[SanitizerCoverage] Use zeroext for cmp parameters on all targets (details)
[UpdateTestChecks][FIX] Python 2.7 compatibility and use right prefix (details)
[SVE] Lower fixed length FP minnum/maxnum (details)
Fix sigaction interceptor to always correctly populate oldact (details)
[X86][GlobalISel] Legalize G_ICMP results to s8. (details)
[X86][SSE] Pull out BUILD_VECTOR operand equivalence tests. NFC. (details)
[ARM] Predicated VFMA patterns (details)
[Scheduler] Fix typo in comments. NFC (details)
[SVE] Remove default-false VectorType::get (details)

Commit df3bfaa39071a1382a59a94658ee1a2da30d92fd by Dávid Bolvanský [Driver] Change -fnostack-clash-protection to -fno-stack-clash-protection Clang command line docs mention `-fno-stack-clash-protection`, and GCC also uses -fno-stack-clash-protection. Fixes PR47139 Reviewed By: tstellar Differential Revision: https://reviews.llvm.org/D85844
	clang/include/clang/Driver/Options.td
	clang/test/Driver/stack-clash-protection.c
	clang/lib/Driver/ToolChains/Clang.cpp
Commit f5a252ed681c155b1d6337309519ab27d5f3b450 by iii [SanitizerCoverage] Use zeroext for cmp parameters on all targets Commit 9385aaa84851 ("[sancov] Fix PR33732") added zeroext to __sanitizer_cov_trace(_const)?_cmp[1248] parameters for x86_64 only, however, it is useful on other targets, in particular, on SystemZ: it fixes swap-cmp.test. Therefore, use it on all targets. This is safe: if target ABI does not require zero extension for a particular parameter, zeroext is simply ignored. A similar change has been implemeted as part of commit 3bc439bdff8b ("[MSan] Add instrumentation for SystemZ"), and there were no problems with it. Reviewed By: morehouse Differential Revision: https://reviews.llvm.org/D85689
	llvm/test/Instrumentation/SanitizerCoverage/cmp-tracing-api-x86_32.ll
	compiler-rt/test/fuzzer/swap-cmp.test
	llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Commit 07448c550457d2afb1e7d69254a58ad44dece3d2 by johannes [UpdateTestChecks][FIX] Python 2.7 compatibility and use right prefix
	llvm/utils/UpdateTestChecks/common.py
Commit ce2c991061bf81824e84fada848614c18a53fee0 by mcinally [SVE] Lower fixed length FP minnum/maxnum Lower fixed length MINNUM/MAXNUM to scalable vectors. Cherry-picked from D71767 with added tests. Differential Revision: https://reviews.llvm.org/D85744
	llvm/test/CodeGen/AArch64/sve-fixed-length-fp-minmax.ll
	llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
	llvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit fd893bda5576d34dd987d7cfe517a05486cd38f4 by mascasa Fix sigaction interceptor to always correctly populate oldact This fixes https://bugs.llvm.org/show_bug.cgi?id=47118. Before this change, when the sigaction interceptor prevented a signal from being changed, it also prevented the oldact output parameter from being written to. This resulted in a use-of-uninitialized-variable by any program that used sigaction for the purpose of reading signals. This change fixes this: the regular sigaction implementation is still called, but with the act parameter nullified, preventing any changes. Patch By: IanPudney Reviewed By: morehouse Differential Revision: https://reviews.llvm.org/D85797
	compiler-rt/lib/sanitizer_common/sanitizer_signal_interceptors.inc
	compiler-rt/test/msan/interception_sigaction_test.cpp
Commit 5f7cdb2effa213e1bb4cbf765b8bcb5d6604d435 by craig.topper [X86][GlobalISel] Legalize G_ICMP results to s8. We need to produce a setcc instruction which has an 8-bit result. This gets rid of a bunch of cases that were using the s1->s8/s16/s32/s64 handling in selectZExt. I'm not very familiar with GlobalISel yet so I'm not yet sure the best way to do things. I'd especially like feedback on the best way to handle the currently split 32-bit and 64-bit mode handling. Differential Revision: https://reviews.llvm.org/D85814
	llvm/test/CodeGen/X86/GlobalISel/legalize-cmp.mir
	llvm/test/CodeGen/X86/GlobalISel/cmp.ll
	llvm/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir
	llvm/lib/Target/X86/X86LegalizerInfo.cpp
	llvm/test/CodeGen/X86/GlobalISel/select-cmp.mir
	llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
	llvm/test/CodeGen/X86/GlobalISel/legalize-phi.mir
Commit 13d6cf0951f437d56677271475ce8c8f2111748c by llvm-dev [X86][SSE] Pull out BUILD_VECTOR operand equivalence tests. NFC. Pull out element equivalence code from isShuffleEquivalent/isTargetShuffleEquivalent, I've also removed many of the index modulos where possible. First step toward simply adding some additional equivalence tests.
	llvm/lib/Target/X86/X86ISelLowering.cpp
Commit 1bb348868501d1ae731ec859dfb43433e7e41022 by david.green [ARM] Predicated VFMA patterns Similar to the Two op + select patterns that were added recently, this adds some patterns for select + fma to turn them into predicated operations. Differential Revision: https://reviews.llvm.org/D85824
	llvm/test/CodeGen/Thumb2/mve-fmas.ll
	llvm/lib/Target/ARM/ARMInstrMVE.td
Commit f07f17ac7c14a611f8a2ba64a7ed76488f86078d by david.green [Scheduler] Fix typo in comments. NFC
	llvm/include/llvm/MC/MCSchedule.h
Commit 1da09b7214b4e487c371e5d1c5024d92aadc3c7a by ctetreau [SVE] Remove default-false VectorType::get Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84212
	llvm/include/llvm/IR/DerivedTypes.h