SuccessChanges

Summary

  1. [x86] use more shift or LEA for select-of-constants We can convert any select-of-constants to math ops: http://rise4fun.com/Alive/d7d For this patch, I'm enhancing an existing x86 transform that uses fake multiplies (they always become shl/lea) to avoid cmov or branching. The current code misses cases where we have a negative constant and a positive constant, so this is just trying to plug that hole. The DAGCombiner diff prevents us from hitting a terrible inefficiency: we can start with a select in IR, create a select DAG node, convert it into a sext, convert it back into a select, and then lower it to sext machine code. Some notes about the test diffs: 1. 2010-08-04-MaskedSignedCompare.ll - We were creating control flow that didn't exist in the IR. 2. memcmp.ll - Choose -1 or 1 is the case that got me looking at this again. I think we could avoid the push/pop in some cases if we used 'movzbl %al' instead of an xor on a different reg? That's a post-DAG problem though. 3. mul-constant-result.ll - The trade-off between sbb+not vs. setne+neg could be addressed if that's a regression, but I think those would always be nearly equivalent. 4. pr22338.ll and sext-i1.ll - These tests have undef operands, so I don't think we actually care about these diffs. 5. sbb.ll - This shows a win for what I think is a common case: choose -1 or 0. 6. select.ll - There's another borderline case here: cmp+sbb+or vs. test+set+lea? Also, sbb+not vs. setae+neg shows up again. 7. select_const.ll - These are motivating cases for the enhancement; replace cmov with cheaper ops. Assembly differences between movzbl and xor to avoid a partial reg stall are caused later by the X86 Fixup SetCC pass. Differential Revision: https://reviews.llvm.org/D35340
Revision 310208 by spatel:
[x86] use more shift or LEA for select-of-constants

We can convert any select-of-constants to math ops:
http://rise4fun.com/Alive/d7d

For this patch, I'm enhancing an existing x86 transform that uses fake multiplies
(they always become shl/lea) to avoid cmov or branching. The current code misses
cases where we have a negative constant and a positive constant, so this is just
trying to plug that hole.

The DAGCombiner diff prevents us from hitting a terrible inefficiency: we can start
with a select in IR, create a select DAG node, convert it into a sext, convert it
back into a select, and then lower it to sext machine code.

Some notes about the test diffs:

1. 2010-08-04-MaskedSignedCompare.ll - We were creating control flow that didn't exist in the IR.
2. memcmp.ll - Choose -1 or 1 is the case that got me looking at this again. I
   think we could avoid the push/pop in some cases if we used 'movzbl %al' instead of an xor on
   a different reg? That's a post-DAG problem though.
3. mul-constant-result.ll - The trade-off between sbb+not vs. setne+neg could be addressed if
   that's a regression, but I think those would always be nearly equivalent.
4. pr22338.ll and sext-i1.ll - These tests have undef operands, so I don't think we actually care about these diffs.
5. sbb.ll - This shows a win for what I think is a common case: choose -1 or 0.
6. select.ll - There's another borderline case here: cmp+sbb+or vs. test+set+lea? Also, sbb+not vs. setae+neg shows up again.
7. select_const.ll - These are motivating cases for the enhancement; replace cmov with cheaper ops.

Assembly differences between movzbl and xor to avoid a partial reg stall are caused later by the X86 Fixup SetCC pass.

Differential Revision: https://reviews.llvm.org/D35340
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cppllvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.llllvm.src/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
The file was modified/llvm/trunk/test/CodeGen/X86/memcmp-optsize.llllvm.src/test/CodeGen/X86/memcmp-optsize.ll
The file was modified/llvm/trunk/test/CodeGen/X86/memcmp.llllvm.src/test/CodeGen/X86/memcmp.ll
The file was modified/llvm/trunk/test/CodeGen/X86/merge-consecutive-stores.llllvm.src/test/CodeGen/X86/merge-consecutive-stores.ll
The file was modified/llvm/trunk/test/CodeGen/X86/mul-constant-result.llllvm.src/test/CodeGen/X86/mul-constant-result.ll
The file was modified/llvm/trunk/test/CodeGen/X86/pr22338.llllvm.src/test/CodeGen/X86/pr22338.ll
The file was modified/llvm/trunk/test/CodeGen/X86/sbb.llllvm.src/test/CodeGen/X86/sbb.ll
The file was modified/llvm/trunk/test/CodeGen/X86/select.llllvm.src/test/CodeGen/X86/select.ll
The file was modified/llvm/trunk/test/CodeGen/X86/select_const.llllvm.src/test/CodeGen/X86/select_const.ll
The file was modified/llvm/trunk/test/CodeGen/X86/sext-i1.llllvm.src/test/CodeGen/X86/sext-i1.ll