Started 2 mo 29 days ago
Took 2 hr 0 min on green-dragon-17

Success Build rL:366695 - C:366694 - #58172 (Jul 22, 2019 8:21:59 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 366695
  • http://llvm.org/svn/llvm-project/cfe/trunk : 366694
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 366638
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/zorg/trunk : 366654
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 366696
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 366687
Changes
  1. Update c++2a status page with post-Cologne information (detail/ViewSVN)
    by marshall
  2. TableGen: Support physical register inputs > 255

    This was truncating register value that didn't fit in unsigned char.
    Switch AMDGPU sendmsg intrinsics to using a tablegen pattern. (detail/ViewSVN)
    by arsenm
  3. [NFC] Relaxed regression tests for PR42665

    Following up on the buildbot failures, this commits relaxes some tests:
    instead of checking for specific IR output, it now ensures that the
    underlying issue (the crash), and only that, doesn't happen. (detail/ViewSVN)
    by mantognini
  4. [ARM][LowOverheadLoops] Revert remaining pseudos

    ARMLowOverheadLoops would assert a failure if it did not find all the
    pseudo instructions that comprise the hardware loop. Instead of doing
    this, iterate through all the instructions of the function and revert
    any remaining pseudo instructions that haven't been converted.

    Differential Revision: https://reviews.llvm.org/D65080 (detail/ViewSVN)
    by sam_parker

Started by an SCM change (4 times)

This run spent:

  • 59 min waiting;
  • 2 hr 0 min build duration;
  • 2 hr 59 min total from scheduled to completion.
LLVM/Clang Warnings: 1 warning.
    Test Result (no failures)