FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [X86] Remove isCommutable flag from MULX instructions. (details)
  2. Change default traversal in AST Matchers to ignore invisible nodes (details)
  3. [clang-format][PR46043] Parse git config w/ implicit values (details)
  4. [TargetLoweringObjectFileImpl] Use llvm::transform (details)
  5. [mlir] Expand operand adapter to take attributes (details)
  6. [MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label (details)
  7. [MCDwarf] Delete unneeded DW_AT_unspecified_parameters (details)
  8. [CMake] Properly handle the LTO cache arguments for MinGW (details)
  9. [VE][NFC] Correct sjlj_expection test (details)
  10. [clangd] Log use of heuristic go-to-def. NFC (details)
  11. [OpenMP] Fix a race in task queue reallocation (details)
  12. [LV] Clamp MaxVF to power of 2. (details)
  13. [AST] default implementation is possible for non-member functions in C++20. (details)
  14. [clangd] Enable cross-file-rename by default. (details)
  15. Prevent GetNumChildren from transitively walking pointer chains (details)
  16. [lldb][NFC] Pass DeclarationName to NameSearchContext by value (details)
  17. [AMDGPU][CODEGEN] Added 'A' constraint for inline assembler (details)
  18. TargetInstrInfo.h - remove unnecessary includes. NFC. (details)
  19. SystemZInstrBuilder.h - remove unnecessary PseudoSourceValue.h include. NFC. (details)
  20. [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling (details)
  21. [ObjectYAML][DWARF] Remove unimplemented function. (details)
  22. [ARM] VMULH tests for when other parts are working. NFC (details)
  23. [PowerPC][NFC] Split PPCELFStreamer::emitInstruction (details)
  24. Added pow intrinsic to LLVMIR dialect (details)
  25. FunctionLoweringInfo.h - remove orphan addSEHHandlersForLPads declaration. NFC. (details)
  26. FunctionLoweringInfo.h - move APInt.h dependency to FunctionLoweringInfo.cpp. NFC. (details)
  27. [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 (details)
Commit 51dec88c5df26d4ecb5ca3016f0a1c8668685f35 by craig.topper
[X86] Remove isCommutable flag from MULX instructions.

The fixed register constraint on EDX/RDX as an input
makes this not really commutable.
The file was modifiedllvm/lib/Target/X86/X86InstrArithmetic.td
Commit d0da5d2bbe8305d06dc01a98706fd73e11e24a9f by steveire
Change default traversal in AST Matchers to ignore invisible nodes

This makes many scenarios simpler by not requiring the user to write
ignoringImplicit() all the time, nor to account for non-visible
cxxConstructExpr() and cxxMemberCalExpr() nodes. This is also, in part,
inclusive of the equivalent of adding a use of ignoringParenImpCasts()
between all expr()-related matchers in an expression.

The pre-existing traverse(TK_AsIs, ...) matcher can be used to explcitly
match on implicit/invisible nodes. See

  http://lists.llvm.org/pipermail/cfe-dev/2019-December/064143.html

for more

Reviewers: aaron.ballman

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72534
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/include/clang/AST/ParentMapContext.h
Commit 52b03aaa22f650bbd36ceb3bdae4699dae71b2b8 by Jake.Merdich
[clang-format][PR46043] Parse git config w/ implicit values

Summary:
https://bugs.llvm.org/show_bug.cgi?id=46043

Git's config is generally of the format 'key=val', but a setting
'key=true' can be written as just 'key'.  The git-clang-format script
expects a value and crashes in this case; this change handles implicit
'true' values in the script.

Reviewers: MyDeveloperDay, krasimir, sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80486
The file was modifiedclang/tools/clang-format/git-clang-format
Commit 838d12207b04b7be7245fdff0ce93335bafe5b78 by maskray
[TargetLoweringObjectFileImpl] Use llvm::transform

Fixes a build issue with libc++ configured with _LIBCPP_RAW_ITERATORS (ADL not effective)

```
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp:1602:3: error: no matching function for call to 'transform'
  transform(HexString.begin(), HexString.end(), HexString.begin(), tolower);
  ^~~~~~~~~
```

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D80475
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Commit 4b8632e174d5ba79c4858a1245b96efd3ed281fb by jpienaar
[mlir] Expand operand adapter to take attributes

* Enables using with more variadic sized operands;
* Generate convenience accessors for attributes;
  - The accessor are named the same as their name in ODS and returns attribute
    type (not convenience type) and no derived attributes.

This is first step to changing adapter to support verifying argument
constraints before the op is even created. This does not change the name of
adaptor nor does it require it except for ops with variadic operands to keep this change smaller.

Considered creating separate adapter but decided against that given operands also require attributes in general (and definitely for verification of operands and attributes).

Differential Revision: https://reviews.llvm.org/D80420
The file was modifiedmlir/lib/TableGen/OpClass.cpp
The file was modifiedmlir/test/mlir-tblgen/op-decl.td
The file was modifiedmlir/include/mlir/TableGen/OpClass.h
The file was modifiedmlir/test/mlir-tblgen/op-operand.td
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Commit 20e9fc55feb58dd1f766a494c530684011291ff3 by maskray
[MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label
The file was modifiedllvm/test/MC/MachO/gen-dwarf.s
The file was modifiedllvm/lib/MC/MCDwarf.cpp
Commit 1b79509f97b6c9595027b53d3d67f174d0ae1c78 by maskray
[MCDwarf] Delete unneeded DW_AT_unspecified_parameters
The file was modifiedllvm/test/MC/MachO/gen-dwarf.s
The file was modifiedllvm/test/MC/ARM/dwarf-asm-multiple-sections.s
The file was modifiedllvm/lib/MC/MCDwarf.cpp
Commit 760f45eacadbabf9634fb81d7ccaa16c269cf19e by martin
[CMake] Properly handle the LTO cache arguments for MinGW

We want to make sure that LINKER_IS_LLD_LINK is properly set - in
this case it shouldn't be set when building for MinGW.

Then we want to make the test for it correct and finally include
the option to build with thinlto cache since the MinGW driver now
supports that.

Differential Revision: https://reviews.llvm.org/D80493
The file was modifiedllvm/cmake/modules/HandleLLVMOptions.cmake
Commit 5b7ff6f07ffbcbcfad24f39faad5858cc379fad0 by simon.moll
[VE][NFC] Correct sjlj_expection test

Summary: '|&' works with bash only, so it should not be used in regression
tests.

Differential Revision: https://reviews.llvm.org/D80501
The file was modifiedllvm/test/CodeGen/VE/sjlj_except.ll
Commit b752a2743ab0d24d8da5d97c07fbdb996df78b1f by sam.mccall
[clangd] Log use of heuristic go-to-def. NFC

Generally:
- found results using this method -> log
- no results using this method -> vlog
- method wasn't applied because ineligible -> no log
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit 3895148d7cd8ff76220f8f8209ec06369a8e816f by protze
[OpenMP] Fix a race in task queue reallocation

__kmp_realloc_task_deque implicitly assumes, that the task queue is full
(ntasks == size), therefore tail = size in line 319.
An assertion is added to document this assumption.

The first check for a full queue is before the locking and might not hold
when the lock is taken. So, we need to check again for this condition when
we have the lock.

Reviewed By: AndreyChurbanov

Differential Revision: https://reviews.llvm.org/D80480
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
Commit 840450549c9199150cbdee29acef756c19660ca1 by ayal.zaks
[LV] Clamp MaxVF to power of 2.

If a loop has a constant trip count known to be a multiple of MaxVF (times user
UF), LV infers that no tail will be generated for any chosen VF. This relies on
the chosen VF's being powers of 2 bound by MaxVF, and assumes MaxVF is a power
of 2. Make sure the latter holds, in particular when MaxVF is set by a memory
dependence distance which may not be a power of 2.

Differential Revision: https://reviews.llvm.org/D80491
The file was addedllvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 447ea9b4f5f562c8fab7d11ecbb10ecd33155d5b by hokein.wu
[AST] default implementation is possible for non-member functions in C++20.

Summary:
Make RAV not visit the default function decl by default.
Also update some stale comments on FunctionDecl::isDefault.

Fixes https://github.com/clangd/clangd/issues/383

Reviewers: sammccall, rsmith

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80288
The file was modifiedclang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
Commit 72c5ea1d73bb89af6f82c14ddb0b7f4c2510bab7 by hokein.wu
[clangd] Enable cross-file-rename by default.

Summary:
The cross-file rename feature is stable enough to enable it (has been
rolled out internally for a few weeks).

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80507
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp
Commit 83bd2c4a06803fa9af7f92a474b1d37cb70397cc by Raphael Isemann
Prevent GetNumChildren from transitively walking pointer chains

Summary:

This is an attempt to fix https://bugs.llvm.org/show_bug.cgi?id=45988,
where SBValue::GetNumChildren returns 2, but SBValue::GetChildAtIndex(1) returns
an invalid value sentinel.

The root cause of this seems to be that GetNumChildren can return the number of
children of a wrong value. In particular, for pointers GetNumChildren just
recursively calls itself on the pointee type, so it effectively walks chains of
pointers. This is different from the logic of GetChildAtIndex, which only
recurses if pointee.IsAggregateType() returns true (IsAggregateType is false for
pointers and references), so it never follows chain of pointers.

This patch aims to make GetNumChildren (more) consistent with GetChildAtIndex by
only recursively calling GetNumChildren for aggregate types.

Ideally, GetNumChildren and GetChildAtIndex would share the code that decides
which pointers/references are followed, but that is a bit more invasive change.

Reviewers: teemperor, jingham, clayborg

Reviewed By: teemperor, clayborg

Subscribers: clayborg, labath, shafik, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D80254
The file was addedlldb/test/API/functionalities/pointer_num_children/main.cpp
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was addedlldb/test/API/functionalities/pointer_num_children/Makefile
The file was addedlldb/test/API/functionalities/pointer_num_children/TestPointerNumChildren.py
Commit fe22e5689e94370b8eadef4b7267201cc9fcb2e3 by Raphael Isemann
[lldb][NFC] Pass DeclarationName to NameSearchContext by value

DeclarationName is usually passed around by value as it's just a pointer.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.h
Commit b087b91c917087bc53d47282a16ee4af78bfe286 by dmitry.preobrazhensky
[AMDGPU][CODEGEN] Added 'A' constraint for inline assembler

Summary: 'A' constraint requires an immediate int or fp constant that can be inlined in an instruction encoding.

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D78494
The file was modifiedllvm/test/CodeGen/AMDGPU/inline-constraints.ll
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Commit 8e62f3b658cc85bf0a42dec1326c5e87e848485c by llvm-dev
TargetInstrInfo.h - remove unnecessary includes. NFC.
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
Commit 0e83e67cd359aef475e5c3b86c1a5c932cfb1aba by llvm-dev
SystemZInstrBuilder.h - remove unnecessary PseudoSourceValue.h include. NFC.
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrBuilder.h
Commit 9fa58d1bf2f83a556c109f701aacfb92e2184c23 by llvm-dev
[DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling

For the supported binops (basic arithmetic, logicals + shifts), if we fail to simplify the demanded vector elts, then call SimplifyMultipleUseDemandedBits and try to peek through ops to remove unnecessary dependencies.

This helps with PR40502.

Differential Revision: https://reviews.llvm.org/D79003
The file was modifiedllvm/test/CodeGen/X86/combine-sdiv.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-pmuldq.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/oddsubvector.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-narrow-binop.ll
The file was modifiedllvm/test/CodeGen/AArch64/mul_by_elt.ll
Commit 7b15dc1e0e8dfaf3efb608734421eac4e2399d6a by Xing
[ObjectYAML][DWARF] Remove unimplemented function.

```
StringMap<std::unique_ptr<MemoryBuffer>>
EmitDebugSections(llvm::DWARFYAML::Data &DI, bool ApplyFixups);
```
is unimplemented and unused.
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFEmitter.h
Commit 9ff361b099f16ce27c8af61806447df5bca52228 by david.green
[ARM] VMULH tests for when other parts are working. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
Commit 5a4bcec8db420cf22b06720d45a9f9981b0297bf by stefanp
[PowerPC][NFC] Split PPCELFStreamer::emitInstruction

Split off PPCELFStreamer::emitPrefixedInstruction from
PPCELFStreamer::emitInstruction.

Differential Revision: https://reviews.llvm.org/D79626
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
Commit 7293dd5b4033d94ce1397b192a93010e64b2d949 by antiagainst
Added pow intrinsic to LLVMIR dialect

Added pow intrinsic to LLVMIR dialect. Added a roundrip test for it.

Differential Revision: https://reviews.llvm.org/D80248
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/test/Dialect/LLVMIR/roundtrip.mlir
The file was modifiedmlir/test/Target/llvmir-intrinsics.mlir
Commit 38366cf1676f9ac8d421586658e8bcd5ac4ab62d by llvm-dev
FunctionLoweringInfo.h - remove orphan addSEHHandlersForLPads declaration. NFC.
The file was modifiedllvm/include/llvm/CodeGen/FunctionLoweringInfo.h
Commit 8f48814879c06bbf9f211fa5d959419f0d2d38b6 by llvm-dev
FunctionLoweringInfo.h - move APInt.h dependency to FunctionLoweringInfo.cpp. NFC.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/FunctionLoweringInfo.h
Commit fa038e03504c7d0dfd438b1dfdd6da7081e75617 by spatel
[x86] favor vector constant load to avoid GPR to XMM transfer, part 2

This replaces the build_vector lowering code that was just added in
D80013
and matches the pattern later from the x86-specific "vzext_movl".
That seems to result in the same or better improvements and gets rid
of the 'TODO' items from that patch.

AFAICT, we always shrink wider constant vectors to 128-bit on these
patterns, so we still get the implicit zero-extension to ymm/zmm
without wasting space on larger vector constants. There's a trade-off
there because that means we miss potential load-folding.

Similarly, we could load scalar constants here with implicit
zero-extension even to 128-bit. That saves constant space, but it
means we forego load-folding, and so it increases register pressure.
This seems like a good middle-ground between those 2 options.

Differential Revision: https://reviews.llvm.org/D80131
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll
The file was modifiedllvm/test/CodeGen/X86/combine-udiv.ll
The file was modifiedllvm/test/CodeGen/X86/vec_shift2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
The file was modifiedllvm/test/CodeGen/X86/insert-into-constant-vector.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
The file was modifiedllvm/test/CodeGen/X86/packss.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
The file was modifiedllvm/test/CodeGen/X86/vec_set-A.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-arith.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/ret-mmx.ll
The file was modifiedllvm/test/CodeGen/X86/fcmp-constant.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
The file was modifiedllvm/test/CodeGen/X86/pshufb-mask-comments.ll
The file was modifiedllvm/test/CodeGen/X86/vector-tzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/sad.ll
The file was modifiedllvm/test/CodeGen/X86/vector-lzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-v1.ll