SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. Removed unused TestBuilders. (details)
Commit 05481260c40e502d68e8d523b66eb8e23641c8b9 by gkistanova
Removed unused TestBuilders.
The file was removedzorg/buildbot/builders/TestBuilders.py

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar." (details)
  2. [AArch64] reuse another map iterator. NFC (details)
  3. [mlir] [VectorOps] changes to printing support for integers (details)
  4. scudo: Re-order Allocator fields for improved performance. NFCI. (details)
  5. [python][tests] Fix string comparison with "is" (details)
  6. [CostModel] fill in arguments as part of intrinsic attribute constructor (details)
  7. [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types (details)
  8. [lldb] Enable markdown support for documentation (details)
  9. Once we've found a firmware binary and loaded it, don't search more (details)
  10. [CostModel] remove hack for intrinsic cost based on cost type (details)
  11. [wasm] Move WasmTraits.h to BinaryFormat (details)
  12. [libc++] Fix heap UaF issue in coroutine test (details)
  13. [libc++] Add UNSUPPORTED markup to atomic test in single-threaded mode (details)
  14. [libc++] Replace uses of __libcpp_allocate by std::allocator<> (details)
  15. [COFF] Aliases resolve directly to defined external targets (details)
  16. [InstCombine] Regenerate cast tests. NFC. (details)
  17. [X86] Use inlineasm flag output for the _bittest* intrinsics. (details)
  18. [mlir] [VectorOps] Relaxed restrictions on vector.reduction types even more (details)
  19. Revert "Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar."" (details)
  20. [lldb] Add print_function import (details)
  21. Fix a think-o with the numerical suffixes in the docs for init_priority. (details)
  22. [gn build] Re-run CompletionModelCodegen when input json files change (details)
  23. [CMake][AIX] Limit tools in external project build (details)
  24. [GlobalISel] Add support for lowering of vector G_SELECT and use for AArch64. (details)
  25. [X86] Add tests for D87883. NFC (details)
  26. [X86] Add support for calling SimplifyDemandedBits on the input of PDEP with a constant mask. (details)
  27. [libc++] Fix constexpr dynamic allocation on GCC 10 (details)
  28. [libcxx] Don't pass -s to libtool (details)
  29. [mlir][shape] Make conversion passes more consistent. (details)
  30. [EHStreamer] Simplify sharedTypeIDs with std::mismatch (details)
  31. [CVP] Allow two transforms in one invocation (details)
  32. Guard `find_library(tensorflow_c_api ...)` by checking for TENSORFLOW_C_LIB_PATH to be set by the user (details)
  33. [clang] Selectively ena/disa-ble format-insufficient-args warning (details)
  34. [scudo][standalone] Remove unused atomic_compare_exchange_weak (details)
  35. [mlir][Affine][VectorOps] Fix super vectorizer utility (D85869) (details)
  36. Attempt to clear some msan errors in the libcxx atomic tests. (details)
  37. [clang][driver][AIX] Set compiler-rt as default rtlib (details)
  38. BPF: move AbstractMemberAccess and PreserveDIType passes to EP_EarlyAsPossible (details)
  39. BuildVectorType with a dependent (array) type is crashing the compiler  - Fix for PR-47542 (details)
  40. [RegisterCoalescer] Pass Undefs to extendToIndices() (details)
  41. [clang] Update warning-wall.c test (details)
  42. Ensure that we don't compute linkage for an anonymous class too early if (details)
  43. [gn build] Port 54d9f743c8b (details)
  44. Remove dependency from LLVM Dialect on the OpenMP dialect (details)
  45. [clangd] When finding refs for a renaming alias, do not return refs to underlying decls (details)
  46. [mlir][openacc] Add acc.data operation verifier (details)
  47. Skip -fPIE for AMDGPU and HIP toolchain (details)
  48. [AArch64][GlobalISel] Scalarize <2 x s64> G_MUL since we don't have native support for it. (details)
  49. Recommit "[HIP] Change default --gpu-max-threads-per-block value to 1024" (details)
  50. [HIP] Return non-zero value for invalid target ID (details)
  51. BPF: explicitly specify bpfel triple for certain tests (details)
  52. [MLIR][OpenMP] Removed the ambiguity in flush op assembly syntax (details)
  53. [OpenMP][FIX] Verify compatible types for declare variant calls (details)
  54. [IndVars] Remove exiting conditions that are trivially true/false (details)
  55. [NFC] Use assert instead of checking the guaranteed condition (details)
  56. [Docs][NewPM] Add note about required passes (details)
Commit 6c8168324b5329c94fe7e8f9a1619802091b9bec by Amara Emerson
Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar."

This reverts commit b5e87c9ef2243ecd65e0ef87a1bf303c0c26db04 as it seems to have
broken a bot.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir
Commit 83dc53d30c273960c0e398b2fa7459c8ecf2b03f by jonathan_roelofs
[AArch64] reuse another map iterator. NFC
The file was modifiedllvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
Commit 54759cefdba929c89a0bde07df19d8946312a974 by ajcbik
[mlir] [VectorOps] changes to printing support for integers

(1) simplify integer printing logic by always using 64-bit print
(2) add index support (since vector<16xindex> is planned to be added)
(3) adjust naming convention print_x -> printX

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D88436
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/lib/ExecutionEngine/CRunnerUtils.cpp
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
The file was modifiedmlir/test/mlir-cpu-runner/unranked_memref.mlir
The file was modifiedmlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
The file was modifiedmlir/include/mlir/ExecutionEngine/CRunnerUtils.h
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Commit e851aeb0a5084d968d6384fbc2257bbe05dcdacb by peter
scudo: Re-order Allocator fields for improved performance. NFCI.

Move smaller and frequently-accessed fields near the beginning
of the data structure in order to improve locality and reduce
the number of instructions required to form an access to those
fields. With this change I measured a ~5% performance improvement on
BM_malloc_sql_trace_default on aarch64 Android devices (Pixel 4 and
DragonBoard 845c).

Differential Revision: https://reviews.llvm.org/D88350
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
Commit 0c82fa677f24d8a9656af41ac9cc64ea4f818bc0 by chfast
[python][tests] Fix string comparison with "is"
The file was modifiedclang/bindings/python/tests/cindex/test_cursor_kind.py
Commit 33125cffda96fd5c5d2b80eebfa89fbf4f6b76a6 by spatel
[CostModel] fill in arguments as part of intrinsic attribute constructor

This appears to be an error of code duplication - instead of
one constructor variant calling another, we have N similar
but not identical versions.

I think this is 'NFC' based on the current callers, but it's
hard to tell or guess the intent in all cases.
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
Commit 0156914275be5b07155ecefe4dc2d58588265abc by baptiste.saleil
[PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

This patch legalizes the v256i1 and v512i1 types that will be used for MMA.

It implements loads and stores of these types.
v256i1 is a pair of VSX registers, so for this type, we load/store the two
underlying registers. v512i1 is used for MMA accumulators. So in addition to
loading and storing the 4 associated VSX registers, we generate instructions to
prime (copy the VSX registers to the accumulator) after loading and unprime
(copy the accumulator back to the VSX registers) before storing.

This patch also adds the UACC register class that is necessary to implement the
loads and stores. This class represents accumulator in their unprimed form and
allow the distinction between primed and unprimed accumulators to avoid invalid
copies of the VSX registers associated with primed accumulators.

Differential Revision: https://reviews.llvm.org/D84968
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedclang/test/CodeGen/target-data.c
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.td
The file was addedllvm/test/CodeGen/PowerPC/mma-acc-memops.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp
Commit 8b95bd3310c126e76e0714bea6003a9b1aa739fb by Jonas Devlieghere
[lldb] Enable markdown support for documentation

This enables support for writing LLDB documentation in markdown in
addition to reStructured text. We already had documentation written in
markdown (StructuredDataPlugins and DarwinLog) which will now also be
available on the website.
The file was modifiedlldb/docs/index.rst
The file was addedlldb/docs/resources/structureddataplugins.md
The file was removedlldb/docs/structured_data/DarwinLog.md
The file was modifiedlldb/docs/conf.py
The file was removedlldb/docs/structured_data/StructuredDataPlugins.md
Commit 6e54918db7f4dad0d5a6fbff140009ed6f151d2c by Jason Molenda
Once we've found a firmware binary and loaded it, don't search more

Add the flag in ProcessMachCore::DoLoadCore that stops additional
searches for the binaries when we have an LC_NOTE identifying the
firmware/standalone binary as the correct one & we have loaded it
successfully.
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
Commit c37a8acef64213c2d9cf6fc76f958eb6bd252b4f by spatel
[CostModel] remove hack for intrinsic cost based on cost type

This hack seems to only have been necessary because of the
constructor bug noted in 33125cffd.

Once again, it's hard to prove NFC, but that's the hope...
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Commit b59dff4b164c62fd802d06bb7be75fe31de94c71 by benny.kra
[wasm] Move WasmTraits.h to BinaryFormat

There's no dependency on Object in there and this avoids a cyclic
dependency between libMC and libObject.
The file was modifiedlld/wasm/SyntheticSections.h
The file was removedllvm/include/llvm/Object/WasmTraits.h
The file was modifiedlld/wasm/Writer.cpp
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was addedllvm/include/llvm/BinaryFormat/WasmTraits.h
Commit 46fdaac098a3a14cfbca3fe2d922ae62a100794d by Louis Dionne
[libc++] Fix heap UaF issue in coroutine test

This wasn't being flagged by older versions of ASAN, but it is now.
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/expected.pass.cpp
Commit 93ba33066c35d1430bc9305c4cb112f769c9ee30 by Louis Dionne
[libc++] Add UNSUPPORTED markup to atomic test in single-threaded mode
The file was modifiedlibcxx/test/libcxx/atomics/ext-int.verify.cpp
Commit 59f8ac3eb441b9bf1fb589facc024a03c218bece by Louis Dionne
[libc++] Replace uses of __libcpp_allocate by std::allocator<>

Both are equivalent, however std::allocator can appear in constant
expressions and is higher level.
The file was modifiedlibcxx/include/valarray
The file was modifiedlibcxx/include/__sso_allocator
Commit bd19876dc60c69f50a7110740e97c6878e56be60 by epastor
[COFF] Aliases resolve directly to defined external targets

Avoid introducing unnecessary indirection for weak-external references.

We only need to introduce ".weak.<SYMBOL>.default" when referencing a
symbol that is defined, but not external.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D88305
The file was modifiedllvm/lib/MC/WinCOFFObjectWriter.cpp
The file was modifiedllvm/test/MC/COFF/weak.s
The file was addedllvm/test/MC/COFF/weak-alias-labels.s
Commit 2f768a68a148a73bf1f52b160a28b9f77c6d830e by llvm-dev
[InstCombine] Regenerate cast tests. NFC.
The file was modifiedllvm/test/Transforms/InstCombine/cast.ll
Commit 288c5776c9d3cb14abe1c86f961c8ff166772d28 by craig.topper
[X86] Use inlineasm flag output for the _bittest* intrinsics.

Instead of expliciting emitting a setc in the inline asm instructions,
we can use flag output. This allows the backend to use the flag
directly if it is needed by a branch. Previously we needed a test
instruction to convert the register back to a flag.

If the flag can't be used directly, the backend will emit a setcc.

Differential Revision: https://reviews.llvm.org/D87888
The file was modifiedclang/test/CodeGen/bittest-intrin.c
The file was addedllvm/test/CodeGen/X86/bittest-intrin.ll
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit e9628955f5e965b0a60b8df3c731fc6bfa87ad20 by ajcbik
[mlir] [VectorOps] Relaxed restrictions on vector.reduction types even more

Recently, restrictions on vector reductions were made more relaxed by
accepting any width signless integer and floating-point. This CL relaxes
the restriction even more by including unsigned and signed integers.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D88442
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-reductions-i4.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-reductions-si4.mlir
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-reductions-ui4.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
Commit 5aa56b242951ab0f0181386ea58509f19b09206e by Amara Emerson
Revert "Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar.""

This isn't a real with the codegen, it's a previously known bug in clang which
causes non-deterministic failures due to garbage bits in undef registers being
used in saturating instructions.

I'm disabling the result checking for the test until this issue is resolved.

This reverts commit 6c8168324b5329c94fe7e8f9a1619802091b9bec.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir
Commit 974551d37da8352c22fd849d19cb8fb1facff680 by Jonas Devlieghere
[lldb] Add print_function import
The file was modifiedlldb/docs/conf.py
Commit e7549dafcd33ced4280a81ca1d1ee4cc78ed253f by aaron
Fix a think-o with the numerical suffixes in the docs for init_priority.
The file was modifiedclang/include/clang/Basic/AttrDocs.td
Commit d89735133582ebca482e94bc2710733a09dfb643 by thakis
[gn build] Re-run CompletionModelCodegen when input json files change
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/quality/gen_decision_forest.gni
Commit 25affb04aab7ad55bd7c0dc95e8c2d3973ab8f6d by daltenty
[CMake][AIX] Limit tools in external project build

This is a follow on to D85329 which disabled some llvm tools in the
runtimes build due to XCOFF64 limitations. This change disables them
in other external project builds as well, when no list of tools is
specified in the arguments.

Reviewed By: hubert.reinterpretcast, stevewan

Differential Revision: https://reviews.llvm.org/D88310
The file was modifiedllvm/cmake/modules/LLVMExternalProjectUtils.cmake
Commit 082321909e514d3cb50adedfdeb4e8de22df9113 by Amara Emerson
[GlobalISel] Add support for lowering of vector G_SELECT and use for AArch64.

The lowering is a port of the SDAG expansion.

Differential Revision: https://reviews.llvm.org/D88364
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vabs.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit e5ef523ee46895ab5c75260b420d608f08002d97 by craig.topper
[X86] Add tests for D87883. NFC
The file was modifiedllvm/test/CodeGen/X86/bmi2.ll
Commit e53196b1e862902c74d83f0ce6f3578b1326f23d by craig.topper
[X86] Add support for calling SimplifyDemandedBits on the input of PDEP with a constant mask.

We can do several optimizations for PDEP using computeKnownBits and SimplifyDemandedBits

-If the MSBs of the output aren't demanded, those MSBs of the mask input aren't demanded either. We need to keep the most significant demanded bit of the mask and any mask bits before it.
-The number of possible ones in the mask determines how many bits of the lsbs of the other operand are demanded. Any bits of the mask we don't demand by the previous rule should not be counted.
-The result will have zeros in any position that the mask is zero.
-Since non-mask input bits can only be output in the original position or a higher bit position, the result will have at least as many trailing zeroes as the non-mask input.

Differential Revision: https://reviews.llvm.org/D87883
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/bmi2.ll
The file was modifiedllvm/test/CodeGen/X86/bmi2-x86_64.ll
Commit d092c912885cc152bef27019525b8fd0761aaaa2 by Louis Dionne
[libc++] Fix constexpr dynamic allocation on GCC 10

We're technically not allowed by the Standard to call ::operator new in
constexpr functions like __libcpp_allocate. Clang doesn't seem to complain
about it, but GCC does.
The file was modifiedlibcxx/include/new
The file was modifiedlibcxx/include/memory
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.construct/construct_at.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy_at.pass.cpp
Commit 2d657d1bd7f1e45722ced24e1da897ba5e87ab7a by phosek
[libcxx] Don't pass -s to libtool

This flag is the default in libtool on Darwin, and it's not supported
by llvm-libtool-darwin causing a build failure.

Differential Revision: https://reviews.llvm.org/D88449
The file was modifiedlibcxx/utils/merge_archives.py
Commit a975be0e00a12fdf09ffc9127825321c79813f33 by silvasean
[mlir][shape] Make conversion passes more consistent.

- use select-ops to make the lowering simpler
- change style of FileCheck variables names to be consistent
- change some variable names in the code to be more explicit

Differential Revision: https://reviews.llvm.org/D88258
The file was modifiedmlir/test/Conversion/ShapeToStandard/convert-shape-constraints.mlir
The file was modifiedmlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ConvertShapeConstraints.cpp
Commit bd08a87cfede308f040d79b45245213afd87959a by i
[EHStreamer] Simplify sharedTypeIDs with std::mismatch

(Note that EMStreamer.cpp is largely under tested. The only test checking the prefix sharing is CodeGen/WebAssembly/eh-lsda.ll)
The file was modifiedllvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp
Commit e46d74b58922a427562552464d798448520e4928 by listmail
[CVP] Allow two transforms in one invocation

For a call site which had both constant deopt operands and nonnull arguments, we were missing the opportunity to recognize the later by bailing early.

This is somewhat of a speculative fix.  Months ago, I'd had a private report of performance and compile time regressions from the deopt operand folding.  I never received a test case.  However, the only possibility I see was that after that change CVP missed the nonnull fold, and we end up with a pass ordering/missed simplification issue.  So, since it's a real issue, fix it and hope.
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/deopt.ll
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit e72d792c147ee506e337401e20c0f23042cc43fe by joker.eph
Guard `find_library(tensorflow_c_api ...)` by checking for TENSORFLOW_C_LIB_PATH to be set by the user

Also have CMake fails if the user provides a TENSORFLOW_C_LIB_PATH but
we can't find TensorFlow at this path.

At the moment the CMake script tries to figure if TensorFlow is
available on the system and enables support for it. This is in general
not desirable to customize build features this way and instead it is
preferable to let the user opt-in explicitly into the features they want
to enable. This is in line with other optional external dependencies
like Z3.
There are a few reasons to this but amongst others:
- reproducibility: making features "magically" enabled based on whether
  we find a package on the system or not makes it harder to handle bug
  reports from users.
- user control: they can't have TensorFlow on the system and build LLVM
  without TensorFlow right now. They also would suddenly distribute LLVM
  with a different set of features unknowingly just because their build
  machine environment would change subtly.

Right now this is motivated by a user reporting build failures on their system:

.../mesa-git/llvm-git/src/llvm-project/llvm/lib/Analysis/TFUtils.cpp:23:10: fatal error: tensorflow/c/c_api.h: No such file or directory
   23 | #include "tensorflow/c/c_api.h"
      |          ^~~~~~

It looks like we detected TensorFlow at configure time but couldn't set all the paths correctly.

Differential Revision: https://reviews.llvm.org/D88371
The file was modifiedllvm/CMakeLists.txt
Commit 1e86d637eb4f88e03fcd4b9fd78192487dc2a302 by Jan Korous
[clang] Selectively ena/disa-ble format-insufficient-args warning

Differential Revision: https://reviews.llvm.org/D87176
The file was addedclang/test/Sema/warn-printf-insufficient-data-args.c
The file was modifiedclang/test/Misc/warning-wall.c
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
Commit f668a84b58dcd816656236d7ba7e820dce52e7f8 by kostyak
[scudo][standalone] Remove unused atomic_compare_exchange_weak

`atomic_compare_exchange_weak` is unused in Scudo, and its associated
test is actually wrong since the weak variant is allowed to fail
spuriously (thanks Roland).

This lead to flakes such as:
```
[ RUN      ] ScudoAtomicTest.AtomicCompareExchangeTest
../../zircon/third_party/scudo/src/tests/atomic_test.cpp:98: Failure: Expected atomic_compare_exchange_weak(reinterpret_cast<T *>(&V), &OldVal, NewVal, memory_order_relaxed) is true.
    Expected: true
    Which is: 01
    Actual  : atomic_compare_exchange_weak(reinterpret_cast<T *>(&V), &OldVal, NewVal, memory_order_relaxed)
    Which is: 00
../../zircon/third_party/scudo/src/tests/atomic_test.cpp:100: Failure: Expected atomic_compare_exchange_weak( reinterpret_cast<T *>(&V), &OldVal, NewVal, memory_order_relaxed) is false.
    Expected: false
    Which is: 00
    Actual  : atomic_compare_exchange_weak( reinterpret_cast<T *>(&V), &OldVal, NewVal, memory_order_relaxed)
    Which is: 01
../../zircon/third_party/scudo/src/tests/atomic_test.cpp:101: Failure: Expected OldVal == NewVal.
    Expected: NewVal
    Which is: 24
    Actual  : OldVal
    Which is: 42
[  FAILED  ] ScudoAtomicTest.AtomicCompareExchangeTest (0 ms)
[----------] 2 tests from ScudoAtomicTest (1 ms total)
```

So I am removing this, if someone ever needs the weak variant, feel
free to add it back with a test that is not as terrible. This test was
initially ported from sanitizer_common, but their weak version calls
the strong version, so it works for them.

Differential Revision: https://reviews.llvm.org/D88443
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/atomic_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/atomic_helpers.h
Commit 93936da90479c4ac444f989ba060eedec4133154 by diego.caballero
[mlir][Affine][VectorOps] Fix super vectorizer utility (D85869)

Adding missing code that should have been part of "D85869: Utility to
vectorize loop nest using strategy."

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D88346
The file was modifiedmlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
The file was modifiedmlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp
The file was modifiedmlir/include/mlir/Dialect/Affine/Utils.h
The file was modifiedmlir/test/Dialect/Affine/SuperVectorize/vector_utils.mlir
Commit 665dc4012b65589618cc1b22f44f1e59e021145c by ogiroux
Attempt to clear some msan errors in the libcxx atomic tests.
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_helpers.h
Commit ee80615b5c1c5b15c90a92d6954007b3a82825b0 by daltenty
[clang][driver][AIX] Set compiler-rt as default rtlib

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D88182
The file was modifiedclang/test/Driver/aix-ld.c
The file was modifiedclang/lib/Driver/ToolChains/AIX.cpp
The file was modifiedclang/lib/Driver/ToolChains/AIX.h
The file was addedclang/test/Driver/aix-rtlib.c
The file was modifiedclang/lib/Driver/ToolChain.cpp
Commit 54d9f743c8b0f501288119123cf1828bf7ade69c by yhs
BPF: move AbstractMemberAccess and PreserveDIType passes to EP_EarlyAsPossible

Move abstractMemberAccess and PreserveDIType passes as early as
possible, right after clang code generation.

Currently, compiler may transform the above code
  p1 = llvm.bpf.builtin.preserve.struct.access(base, 0, 0);
  p2 = llvm.bpf.builtin.preserve.struct.access(p1, 1, 2);
  a = llvm.bpf.builtin.preserve_field_info(p2, EXIST);
  if (a) {
    p1 = llvm.bpf.builtin.preserve.struct.access(base, 0, 0);
    p2 = llvm.bpf.builtin.preserve.struct.access(p1, 1, 2);
    bpf_probe_read(buf, buf_size, p2);
  }
to
  p1 = llvm.bpf.builtin.preserve.struct.access(base, 0, 0);
  p2 = llvm.bpf.builtin.preserve.struct.access(p1, 1, 2);
  a = llvm.bpf.builtin.preserve_field_info(p2, EXIST);
  if (a) {
    bpf_probe_read(buf, buf_size, p2);
  }
and eventually assembly code looks like
  reloc_exist = 1;
  reloc_member_offset = 10; //calculate member offset from base
  p2 = base + reloc_member_offset;
  if (reloc_exist) {
    bpf_probe_read(bpf, buf_size, p2);
  }
if during libbpf relocation resolution, reloc_exist is actually
resolved to 0 (not exist), reloc_member_offset relocation cannot
be resolved and will be patched with illegal instruction.
This will cause verifier failure.

This patch attempts to address this issue by do chaining
analysis and replace chains with special globals right
after clang code gen. This will remove the cse possibility
described in the above. The IR typically looks like
  %6 = load @llvm.sk_buff:0:50$0:0:0:2:0
  %7 = bitcast %struct.sk_buff* %2 to i8*
  %8 = getelementptr i8, i8* %7, %6
for a particular address computation relocation.

But this transformation has another consequence, code sinking
may happen like below:
  PHI = <possibly different @preserve_*_access_globals>
  %7 = bitcast %struct.sk_buff* %2 to i8*
  %8 = getelementptr i8, i8* %7, %6

For such cases, we will not able to generate relocations since
multiple relocations are merged into one.

This patch introduced a passthrough builtin
to prevent such optimization. Looks like inline assembly has more
impact for optimizaiton, e.g., inlining. Using passthrough has
less impact on optimizations.

A new IR pass is introduced at the beginning of target-dependent
IR optimization, which does:
  - report fatal error if any reloc global in PHI nodes
  - remove all bpf passthrough builtin functions

Changes for existing CORE tests:
  - for clang tests, add "-Xclang -disable-llvm-passes" flags to
    avoid builtin->reloc_global transformation so the test is still
    able to check correctness for clang generated IR.
  - for llvm CodeGen/BPF tests, add "opt -O2 <ir_file> | llvm-dis" command
    before "llc" command since "opt" is needed to call newly-placed
    builtin->reloc_global transformation. Add target triple in the IR
    file since "opt" requires it.
  - Since target triple is added in IR file, if a test may produce
    different results for different endianness, two tests will be
    created, one for bpfeb and another for bpfel, e.g., some tests
    for relocation of lshift/rshift of bitfields.
  - field-reloc-bitfield-1.ll has different relocations compared to
    old codes. This is because for the structure in the test,
    new code returns struct layout alignment 4 while old code
    is 8. Align 8 is more precise and permits double load. With align 4,
    the new mechanism uses 4-byte load, so generating different
    relocations.
  - test intrinsic-transforms.ll is removed. This is used to test
    cse on intrinsics so we do not lose metadata. Now metadata is attached
    to global and not instruction, it won't get lost with cse.

Differential Revision: https://reviews.llvm.org/D87153
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
The file was modifiedllvm/lib/Target/BPF/CMakeLists.txt
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-global-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-7.c
The file was modifiedclang/test/CodeGen/builtin-preserve-access-index-typedef.c
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-5.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-enum-value.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-1.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
The file was modifiedllvm/lib/Target/BPF/BPFCORE.h
The file was modifiedllvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-6.c
The file was modifiedllvm/lib/Target/BPF/BPFTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-global-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/no-narrow-load.ll
The file was modifiedllvm/lib/Target/BPF/BPFPreserveDIType.cpp
The file was addedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
The file was addedllvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
The file was removedllvm/test/CodeGen/BPF/CORE/intrinsic-transforms.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
The file was modifiedclang/test/CodeGen/builtins-bpf-preserve-field-info-2.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-4.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsBPF.td
The file was modifiedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/no-elf-ama-symbol.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union.ll
The file was modifiedclang/test/CodeGen/bpf-preserve-access-index.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
The file was modifiedclang/test/CodeGen/builtins-bpf-preserve-field-info-3.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-access-str.ll
The file was addedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-global-3.ll
The file was modifiedllvm/lib/Target/BPF/BPF.h
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-8.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct-2.ll
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-3.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
The file was modifiedclang/test/CodeGen/builtins-bpf-preserve-field-info-4.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
The file was modifiedclang/test/CodeGen/builtin-bpf-btf-type-id.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-size-2.ll
The file was addedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/builtin-btf-type-id.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
The file was addedllvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
The file was modifiedclang/test/CodeGen/bpf-attr-preserve-access-index-2.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/store-addr.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-array.ll
The file was modifiedclang/test/CodeGen/builtins-bpf-preserve-field-info-1.c
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-typeinfo-type-exist.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-array-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-union.ll
Commit efd04721c9a2a856dd47e47a08c42d21efd5dd2b by rnk
BuildVectorType with a dependent (array) type is crashing the compiler  - Fix for PR-47542

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D88150
The file was modifiedclang/test/SemaCXX/attr-gnu.cpp
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit 73805329baa0f5c463b70d16f18555365d3a020e by ruiling.song
[RegisterCoalescer] Pass Undefs to extendToIndices()

When extending the subranges, the reaching-def may be an undefs. When
extending such kind of subrange, it will try to search for the reaching
def first. If the reaching def is an undef and we did not provide 'Undefs',
The findReachingDefs() will fail with message:
"Use of $noreg does not have a corresponding definition on every path:
LLVM ERROR: Use not jointly dominated by defs."
So we computeSubRangeUndefs() and pass the result to extendToIndices().

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D87744
The file was modifiedllvm/lib/CodeGen/RegisterCoalescer.cpp
The file was addedllvm/test/CodeGen/AMDGPU/coalescer-removepartial-extend-undef-subrange.mir
Commit 6fd8c69049a8fc119278097be6d0bdc3e781f1ba by Jan Korous
[clang] Update warning-wall.c test

Follow-up to 1e86d637eb4f:
[clang] Selectively ena/disa-ble format-insufficient-args warning
The file was modifiedclang/test/Misc/warning-wall.c
Commit c375635d05f6f10c7c95ecc74a0569213d176d8e by richard
Ensure that we don't compute linkage for an anonymous class too early if
it has a member whose name is the same as a builtin.

Fixes a regression from the introduction of BuiltinAttr.
The file was modifiedclang/test/SemaCXX/anonymous-struct.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 727c4223d714eb220ed65a9244c1cc499d0cd461 by llvmgnsyncbot
[gn build] Port 54d9f743c8b
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/BPF/BUILD.gn
Commit 9f9f89d44bebe79a7672799619a0c7e5ce213fa3 by joker.eph
Remove dependency from LLVM Dialect on the OpenMP dialect

The OmpDialect is in practice optional during translation to LLVM IR: the code is tolerant
to have a "nullptr" when not present / needed.

The dependency still exists on the export to LLVMIR.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88351
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/lib/Target/CMakeLists.txt
The file was modifiedmlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/lib/Dialect/LLVMIR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
Commit cc6d1f8029b05cd747c46ad3244a1b31ae970c61 by zeratul976
[clangd] When finding refs for a renaming alias, do not return refs to underlying decls

Fixes https://github.com/clangd/clangd/issues/515

Differential Revision: https://reviews.llvm.org/D87225
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit bbb5dc4923cf01f7f5760e1917b09b0487c64b72 by clementval
[mlir][openacc] Add acc.data operation verifier

Add a basic verifier for the data operation following the restriction from the standard.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D88334
The file was modifiedmlir/test/Dialect/OpenACC/invalid.mlir
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
The file was modifiedmlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
The file was modifiedmlir/test/Dialect/OpenACC/ops.mlir
Commit 10eb3bf2d430825195bf092d3a75c4745d463826 by Yaxun.Liu
Skip -fPIE for AMDGPU and HIP toolchain

AMDGPU toolchain does not support -fPIE, therefore skip it if specified by driver.

Differential Revision: https://reviews.llvm.org/D88425
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.h
The file was addedclang/test/Driver/hip-fpie-option.hip
The file was modifiedclang/lib/Driver/ToolChains/HIP.cpp
Commit b9f2b3bc431a0053159939a4132814fb113af131 by Amara Emerson
[AArch64][GlobalISel] Scalarize <2 x s64> G_MUL since we don't have native support for it.

Differential Revision: https://reviews.llvm.org/D88437
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
Commit 187658b8a6112446d9e7797d495bc7542ac83905 by Yaxun.Liu
Recommit "[HIP] Change default --gpu-max-threads-per-block value to 1024"

Recommit 04abbb3a78186aa92809866b43217c32cba90b71
The file was modifiedclang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/test/CodeGenCUDA/kernel-amdgcn.cu
The file was modifiedclang/include/clang/Basic/LangOptions.def
Commit 5a3023a91c0ec82e7272569c5ca7a6eb372b129f by Yaxun.Liu
[HIP] Return non-zero value for invalid target ID

This is part of https://reviews.llvm.org/D60620
The file was modifiedclang/test/Driver/hip-invalid-target-id.hip
The file was modifiedclang/lib/Driver/Driver.cpp
Commit ca1ce397acc39f348f4018e446c84a5746fd5e1e by yhs
BPF: explicitly specify bpfel triple for certain tests

Commit 54d9f743c8b0 ("BPF: move AbstractMemberAccess and
PreserveDIType passes to EP_EarlyAsPossible") changed most
of CORE tests with opt run followed by llc and opt requires
the target triple specified in the IR.

There are few tests where little endian and big endian will
report different result and for little endian versions of
tests, "target triple = "bpf"" will produce wrong results
if the test executed in a big endian machine, e.g.
PowerPC big endian machine, since target "bpf" represents
host endian and will resolve to "bpfeb".
The builtbot reported such failures when build-and-run
on a PowerPC big endian machine.

To fix the issue, using "target triple = "bpfel"" instead.
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
Commit f3ead88e9c6c352edb10cba43e62696fc852c7d6 by kirankumar.tp
[MLIR][OpenMP] Removed the ambiguity in flush op assembly syntax

Summary:
========
Bugzilla Ticket No: Bug 46884 [https://bugs.llvm.org/show_bug.cgi?id=46884]

Flush op assembly syntax was ambiguous:

Consider the below test case:
flush operation is not having any arguments.
But the next statement token i.e "%2" is read as the argument for flush operation and then translator issues an error.
***************************************************************
$ cat -n flush.mlir
     1  llvm.func @_QQmain(%arg0: !llvm.i32) {
     2    %0 = llvm.mlir.constant(1 : i64) : !llvm.i64
     3    %1 = llvm.alloca %0 x !llvm.i32 {in_type = i32, name = "a"} : (!llvm.i64) -> !llvm.ptr<i32>
     4    omp.flush
     5    %2 = llvm.load %1 : !llvm.ptr<i32>
     6    llvm.return
     7  }

$ mlir-translate -mlir-to-llvmir flush.mlir
flush.mlir:5:6: error: expected ':'
  %2 = llvm.load %1 : !llvm.ptr<i32>
     ^
***************************************************************

Solution:
=========
Introduced begin ( `(` ) and end token ( `)` ) to determince the begin and end of variadic arguments.

The patch includes code changes and testcase modifications.

Reviewed By: Valentin Clement, Mehdi AMINI

Differential Revision: https://reviews.llvm.org/D88376
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
The file was modifiedmlir/test/Dialect/OpenMP/ops.mlir
The file was modifiedmlir/test/Target/openmp-llvm.mlir
Commit c942095790decf525a445f3bd68fb9bcc9aa43c6 by johannes
[OpenMP][FIX] Verify compatible types for declare variant calls

Especially for templates we need to check at some point if the base
function matches the specialization we might call instead. Before this
lead to the replacement of `std::sqrt(int(2))` calls with one that
converts the argument to a `std::complex<int>`, clearly not the desired
behavior.

Reported as PR47655

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D88384
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was addedclang/test/AST/ast-dump-openmp-begin-declare-variant_template_3.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
Commit d266fd960e73e2ebdcc194564fc2554ff629d12a by mkazantsev
[IndVars] Remove exiting conditions that are trivially true/false

When removing exiting loop conditions, we only consider checks for
which we know the exact exit count. We could also eliminate checks for
which the condition is always true/false.

Differential Revision: https://reviews.llvm.org/D87344
Reviewed By: lebedev.ri, reames
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
The file was modifiedllvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
Commit e862e78b63f918c000ce65f9c475730e673a4966 by mkazantsev
[NFC] Use assert instead of checking the guaranteed condition

From preconditions it is known that either A dominates B or
B dominates A. If A does not dominate B, we do not really need
to check it. Assert should be enough. Should save some compile
time.
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Commit da036b4514702f3a7c1d2981ff11b3067bad4329 by aeubanks
[Docs][NewPM] Add note about required passes

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D88342
The file was modifiedllvm/docs/WritingAnLLVMNewPMPass.rst