SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [InstCombine] collectBitParts - convert to use PatterMatch matchers and avoid IntegerType casts. (details)
  2. [AArch64] Remove a duplicate call to setHasWinCFI. NFCI. (details)
  3. [AArch64] Don't merge sp decrement into later stores when using WinCFI (details)
  4. [clangd] Split DecisionForest Evaluate() into one func per tree. (details)
  5. Reland  rG4fcd1a8e6528:[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking. (details)
  6. [mlir][Linalg] NFC : Move fusion on tensors to separate file. (details)
  7. [runtimes] Remove TOOLCHAIN_TOOLS specialization (details)
  8. [NFC] Let (MC)Register APIs check isStackSlot (details)
  9. [flang] Add checks for misuse of formatted I/O APIs in unformatted I/O statement (details)
  10. Allow to specify macro names for android-comparison-in-temp-failure-retry (details)
  11. [flang] Fix INQUIRE of access and formatting possibilities (details)
  12. [libc++] Don't re-export new/delete from libc++abi when they are defined in libc++ (details)
  13. [flang] Fix WRITE after BACKSPACE (details)
  14. Reland No.3: Add new hidden option -print-changed which only reports changes to IR (details)
  15. [libc++] NFC: Add missing SHA to ABI Changelog (details)
  16. [DSE] Look through memory PHI arguments when removing noop stores in MSSA. (details)
  17. [InstCombine] auto-generate complete test checks; NFC (details)
  18. [AST] do not error on APFloat invalidOp in default mode (details)
  19. [libc++][ci] Add a job to run the vanilla configuration on Apple (details)
  20. [Format] Don't treat compound extension headers (foo.proto.h) as foo.cc main-file header. (details)
  21. [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic (details)
  22. Revert "[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic" (details)
  23. Revert "[CFGuard] Add address-taken IAT tables and delay-load support" (details)
  24. [APFloat] convert SNaN to QNaN in convert() and raise Invalid signal (details)
  25. [CMake] Use -isystem flag to access libc++ headers (details)
  26. [InstCombine] Fix select operand simplification with undef (PR47696) (details)
  27. [PDB] Use one func id DenseMap instead of per-source maps, NFC (details)
  28. [lit] Fix Python 2/3 compat in new winreg search code (details)
  29. [CMake][Fuchsia] Don't set WIN32 API, rely on autodetection (details)
  30. Raland D87318 [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic (details)
  31. [clang][Sema] Fix PR47676: Handle dependent AltiVec C-style cast (details)
  32. [AArch64][GlobalISel] Camp oversize v4s64 G_FPEXT operations. (details)
  33. [AArch64][GlobalISel] Use custom legalization for G_TRUNC for v8i8 vectors. (details)
  34. libclc: Use find_package to find Python 3 and require it (details)
  35. [gn build] Support building with ThinLTO (details)
  36. [AArch64][GlobalISel] Merge G_SHL, G_ASHR and G_LSHR legalizer rules together. (details)
  37. [lldb] Skip unique_ptr import-std-module tests on Linux (details)
  38. [LLD][COFF] Fix crash with /summary and PCH input files (details)
  39. [AArch64][GlobalISel] Make <8 x s8> shifts legal. (details)
  40. Revert "[AArch64][GlobalISel] Make <8 x s8> shifts legal." (details)
  41. [AArch64][GlobalISel] Make <8 x s8> shifts legal and add selection support. (details)
  42. [AArch64][GlobalISel] Make <8 x s8> integer arithmetic ops legal. (details)
  43. [AArch64][GlobalISel] Alias rules for G_FCMP to G_ICMP. (details)
  44. [AArch64][GlobalISel] Use emitTestBit in selection for G_BRCOND (details)
  45. [GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs (details)
  46. [flang] Readability improvement in binary->decimal conversion (details)
  47. [AMDGPU] Allow SOP asm mnemonic to differ (details)
  48. Fix a bug in memset formation with vectors of non-integral pointers (details)
  49. [AArch64][SVE] Add lowering for llvm fabs (details)
  50. [memcpyopt] Conservatively handle non-integral pointers (details)
  51. [flang][msvc] Rework a MSVC work-around to avoid clang warning (details)
  52. [flang] Fix buffering read->write transition (details)
  53. [XCOFF] Enable -fdata-sections on AIX (details)
  54. [flang] Fix actions at end of output record (details)
  55. [flang] Extend runtime API for PAUSE to allow a stop code (details)
  56. [flang][openacc] Update loop construct lowering (details)
  57. [OpenMP] Add Missing Runtime Call for Globalization Remarks (details)
  58. [PowerPC] Put the CR field in low bits of GRC during copying CRRC to GRC. (details)
  59. CodeGen: Fix livein calculation in MachineBasicBlock splitAt (details)
  60. Have kernel binary scanner load dSYMs as binary+dSYM if best thing found (details)
  61. [AMDGPU] SIInsertSkips: Tidy block splitting to use splitAt (details)
  62. [gvn] Handle a corner case w/vectors of non-integral pointers (details)
Commit 29ac9fae54c9cbd819ce400d42dd2e76bf5259ab by llvm-dev
[InstCombine] collectBitParts - convert to use PatterMatch matchers and avoid IntegerType casts.

Make sure we're using getScalarSizeInBits instead of cast<IntegerType> to get Type bit widths.

This is preliminary cleanup before we can start adding vector support to the bswap/bitreverse (element level) matching.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit 51e74e21aae8b4e885e23d3f15922a58bc173c34 by martin
[AArch64] Remove a duplicate call to setHasWinCFI. NFCI.

The function already has a cleanup scope that calls the same whenever
the function is exited. When reading the code, seeing that this return
codepath has an explicit call while other return paths lack it is
confusing.

In the hypothetical case of a function having a prologue that
set the HasWinCFI flag in the MF, but the epilogue containing no
WinCFI instructions, the HasWinCFI flag in the MF would end up reset back
to false.

Differential Revision: https://reviews.llvm.org/D88636
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Commit f4b9dfd9bc414a316d997a314b05ac7f9258a722 by martin
[AArch64] Don't merge sp decrement into later stores when using WinCFI

This matches the corresponding existing case in
AArch64LoadStoreOpt::findMatchingUpdateInsnForward.

Both cases could also be modified to check
MBBI->getFlag(FrameSetup/FrameDestroy) instead of forbidding any
optimization involving SP, but the effect is probably pretty much
the same.

Differential Revision: https://reviews.llvm.org/D88541
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-windows-calls.ll
Commit 45698ac0052ae5b1c5beb739636396a5b7263966 by usx
[clangd] Split DecisionForest Evaluate() into one func per tree.

This allows us MSAN to instrument this function. Previous version is not
instrumentable due to it shear volume.

Differential Revision: https://reviews.llvm.org/D88536
The file was modifiedclang-tools-extra/clangd/quality/CompletionModelCodegen.py
Commit cb3fd715f324ff0f58dfeb7d08a88a05477cb0d5 by vyng
Reland  rG4fcd1a8e6528:[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking.

This is mostly for the benefit of the LBR latency mode.
Right now, it performs no checking. If this is run on non-supported hardware, it will produce all zeroes for latency.

      Differential Revision: https://reviews.llvm.org/D85254

New change: Updated lit.local.cfg to use pass the right argument to llvm-exegesis to actually request the LBR mode.

Differential Revision: https://reviews.llvm.org/D88670
The file was modifiedllvm/tools/llvm-exegesis/lib/X86/Target.cpp
The file was modifiedllvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp
The file was modifiedllvm/tools/llvm-exegesis/lib/Target.h
The file was modifiedllvm/tools/llvm-exegesis/lib/X86/X86Counter.h
The file was modifiedllvm/test/tools/llvm-exegesis/X86/lbr/lit.local.cfg
The file was modifiedllvm/tools/llvm-exegesis/llvm-exegesis.cpp
Commit c6ea095b9756dff035aed27e7b5b44bf42d22462 by ravishankarm
[mlir][Linalg] NFC : Move fusion on tensors to separate file.

Differential Revision: https://reviews.llvm.org/D88633
The file was addedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
Commit dcb5b6dfbfb5dafb66797e8dba2f04eb76a153b7 by smeenai
[runtimes] Remove TOOLCHAIN_TOOLS specialization

https://reviews.llvm.org/D88310 fixed the AIX issue in LLVMExternalProjectUtils,
so we shouldn't need the workaround in the runtimes build anymore. I'm
reverting it because it prevents the target-specific tool selection in
LLVMExternalProjectUtils from taking effect, which we rely on for our
runtimes builds.

Reviewed By: daltenty

Differential Revision: https://reviews.llvm.org/D88627
The file was modifiedllvm/runtimes/CMakeLists.txt
Commit 17640c5aac649c154959ca1075953f0d252a4a5b by mtrofin
[NFC] Let (MC)Register APIs check isStackSlot

The user is expected to make the isStackSlot check before calling isPhysicalRegister
or isVirtualRegister. The APIs assert otherwise. We can improve the usability
of these APIs by carrying out the check in the 2 APIs: they become a
complete "source of truth" and remove an extra responsibility from the
user.

Differential Revision: https://reviews.llvm.org/D88598
The file was modifiedllvm/include/llvm/MC/MCRegister.h
The file was modifiedllvm/include/llvm/CodeGen/Register.h
Commit cdfb95ad580fbf366a9bffc5082df22e9d2b5fa3 by pklausler
[flang] Add checks for misuse of formatted I/O APIs in unformatted I/O statement

Add checking to I/O statement APIs to catch cases where the formatted
I/O data item transfer routines like OutputInteger64 are being
incorrectly used for unformatted I/O, which should use the
unformatted block or descriptor-based data item interfaces.

Differential revision: https://reviews.llvm.org/D88672
The file was modifiedflang/runtime/io-api.h
The file was modifiedflang/runtime/io-stmt.h
The file was modifiedflang/runtime/unit.cpp
The file was modifiedflang/runtime/type-code.cpp
The file was modifiedflang/runtime/io-api.cpp
Commit 9d40fb808fd0fbd33eb3b50c20d7f402de5db91e by George Burgess IV
Allow to specify macro names for android-comparison-in-temp-failure-retry

Some projects do not use the TEMP_FAILURE_RETRY macro but define their
own one, as not to depend on glibc / Bionic details. By allowing the
user to override the list of macros, these projects can also benefit
from this check.

Differential Revision: https://reviews.llvm.org/D83144
The file was modifiedclang-tools-extra/clang-tidy/android/ComparisonInTempFailureRetryCheck.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/android-comparison-in-temp-failure-retry.rst
The file was addedclang-tools-extra/test/clang-tidy/checkers/android-comparison-in-temp-failure-retry-custom-macro.c
The file was modifiedclang-tools-extra/clang-tidy/android/ComparisonInTempFailureRetryCheck.h
Commit df6de2222c66c5a1c62da0b10c35de432ddc270a by pklausler
[flang] Fix INQUIRE of access and formatting possibilities

Don't give false positives from INQUIRE about possible
access mode changes on connected units.  DIRECT and SEQUENTIAL
cannot be intermixed, apart from allowing DIRECT on a SEQUENTIAL
file with fixed-size records and positioning.  Nor can
FORMATTED and UNFORMATTED be interchanged.  On unconnected
files, the best that we can do is "UNKNOWN".

Differential revision: https://reviews.llvm.org/D88673
The file was modifiedflang/runtime/io-stmt.cpp
Commit 8654a0f8bbf3e28eb210c75c8c70c739de637226 by Louis Dionne
[libc++] Don't re-export new/delete from libc++abi when they are defined in libc++

This is a temporary workaround until the new/delete situation is made
better (i.e. we don't include new/delete in both libc++ and libc++abi
by default).
The file was modifiedlibcxx/src/CMakeLists.txt
The file was modifiedlibcxxabi/src/CMakeLists.txt
Commit e29c9d77f128e7ef9b2b5f8f09fb06b01a9dad3a by pklausler
[flang] Fix WRITE after BACKSPACE

A WRITE to an unformatted sequential variable-length unit after
a BACKSPACE needs to forget its previous knowledge of the length
of the record that's about to be overwritten, and a BACKSPACE
after an ENDFILE or at the start of the file needs to be a no-op.

Differential revision: https://reviews.llvm.org/D88675
The file was modifiedflang/runtime/io-api.cpp
The file was modifiedflang/runtime/unit.cpp
Commit 71124a9dbdcc76cd5efec8c148001a3f808bd769 by anhtuyen
Reland No.3: Add new hidden option -print-changed which only reports changes to IR

A new hidden option -print-changed is added along with code to support
printing the IR as it passes through the opt pipeline in the new pass
manager. Only those passes that change the IR are reported, with others
only having the banner reported, indicating that they did not change the
IR, were filtered out or ignored. Filtering of output via the
-filter-print-funcs is supported and a new supporting hidden option
-filter-passes is added. The latter takes a comma separated list of pass
names and filters the output to only show those passes in the list that
change the IR. The output can also be modified via the -print-module-scope
function.

The code introduces an abstract template base class that generalizes the
comparison of IRs that takes an IR representation as template parameter.
Derived classes provide overrides that provide an event based API
for generalized reporting of IRs as they are changed in the opt pipeline
through the new pass manager.

The first of several instantiations is provided that prints the IR
in a form similar to that produced by -print-after-all with the above
mentioned filtering capabilities. This version, and the others to
follow will be introduced at the upcoming developer's conference.

Reviewed By: aeubanks (Arthur Eubanks), yrouban (Yevgeny Rouban), ychen (Yuanfang Chen), MaskRay (Fangrui Song)

Differential Revision: https://reviews.llvm.org/D86360
The file was modifiedllvm/lib/Passes/StandardInstrumentations.cpp
The file was modifiedllvm/lib/IR/LegacyPassManager.cpp
The file was modifiedllvm/include/llvm/Passes/StandardInstrumentations.h
The file was addedllvm/test/Other/change-printer.ll
Commit a0119e56751c16e3104d6bd760bb1c114a79bce7 by Louis Dionne
[libc++] NFC: Add missing SHA to ABI Changelog
The file was modifiedlibcxx/lib/abi/CHANGELOG.TXT
Commit 6c25816d7b68e794a04ba0d7659178ab17252637 by zoecarver
[DSE] Look through memory PHI arguments when removing noop stores in MSSA.

Summary:
Adds support for "following" memory through MSSA PHI arguments. This will help catch more noop stores that exist between blocks.

Originally part of D79391.

Reviewers: fhahn, jfb, asbirlea

Differential Revision: https://reviews.llvm.org/D82588
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/noop-stores.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was removedllvm/test/Transforms/DeadStoreElimination/MSSA/simple-todo.ll
Commit 114e964dce9f18e8f3c25a3a4136e59ead9ae50c by spatel
[InstCombine] auto-generate complete test checks; NFC
The file was modifiedllvm/test/Transforms/InstCombine/bitreverse-known-bits.ll
Commit 686eb0d8ded9159b090c3ef7b33a422e1f05166e by spatel
[AST] do not error on APFloat invalidOp in default mode

If FP exceptions are ignored, we should not error out of compilation
just because APFloat indicated an exception.
This is required as a preliminary step for D88238
which changes APFloat behavior for signaling NaN convert() to set
the opInvalidOp exception status.

Currently, there is no way to trigger this error because convert()
never sets opInvalidOp. FP binops that set opInvalidOp also create
a NaN, so the path to checkFloatingPointResult() is blocked by a
different diagnostic:

  // [expr.pre]p4:
  //   If during the evaluation of an expression, the result is not
  //   mathematically defined [...], the behavior is undefined.
  // FIXME: C++ rules require us to not conform to IEEE 754 here.
  if (LHS.isNaN()) {
    Info.CCEDiag(E, diag::note_constexpr_float_arithmetic) << LHS.isNaN();
    return Info.noteUndefinedBehavior();
  }
  return checkFloatingPointResult(Info, E, St);

Differential Revision: https://reviews.llvm.org/D88664
The file was modifiedclang/lib/AST/ExprConstant.cpp
Commit ba9b15072c5aa6c6d89bcb8b4f7af9d546867292 by Louis Dionne
[libc++][ci] Add a job to run the vanilla configuration on Apple

Previously, we'd only have jobs testing the Apple cache on Apple platforms,
but libc++ should also work out-of-the-box.
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/utils/ci/run-buildbot.sh
Commit c1b209cc61290f1ce1243470b825e0994645cb7d by hokein.wu
[Format] Don't treat compound extension headers (foo.proto.h) as foo.cc main-file header.

We receive internal bugs about this false positives after D86597.

Differential Revision: https://reviews.llvm.org/D88640.
The file was modifiedclang/unittests/Format/SortIncludesTest.cpp
The file was modifiedclang/lib/Tooling/Inclusions/HeaderIncludes.cpp
Commit 79122868f9a3909cfd94d51e9bfe960917a1be05 by stefanp
[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic

Add Thread Local Storage support for the 34 bit relocation R_PPC64_GOT_TLSGD_PCREL34 used in General Dynamic.

The compiler will produce code that looks like:
```
pla r3, x@got@tlsgd@pcrel            R_PPC64_GOT_TLSGD_PCREL34
bl __tls_get_addr@notoc(x@tlsgd)     R_PPC64_TLSGD
                                     R_PPC64_REL24_NOTOC
```
LLD should be able to correctly compute the relocation for  R_PPC64_GOT_TLSGD_PCREL34 as well as do the following two relaxations where possible:
General Dynamic to Local Exec:
```
paddi r3, r13, x@tprel
nop
```
and General Dynamic to Initial Exec:
```
pld r3, x@got@tprel@pcrel
add r3, r3, r13
```
Note:
This patch adds support for the PC Relative (no TOC) version of General Dynamic on top of the existing support for the TOC version of General Dynamic.
The ABI does not provide any way to tell by looking only at the relocation `R_PPC64_TLSGD` when it is being used in a TOC instruction sequence or and when it is being used in a no TOC sequence. The TOC sequence should always be 4 byte aligned. This patch adds one to the offset of the relocation when it is being used in a no TOC sequence. In this way LLD can tell by looking at the alignment of the offset of `R_PPC64_TLSGD` whether or not it is being used as part of a TOC or no TOC sequence.

Reviewed By: NeHuang, sfertile, MaskRay

Differential Revision: https://reviews.llvm.org/D87318
The file was addedlld/test/ELF/ppc64-tls-pcrel-gd.s
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was modifiedlld/ELF/Relocations.cpp
Commit 5f3e565f59ee8c5614663a484df1dc853ca3694d by stefanp
Revert "[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic"

This reverts commit 79122868f9a3909cfd94d51e9bfe960917a1be05.
The file was removedlld/test/ELF/ppc64-tls-pcrel-gd.s
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was modifiedlld/ELF/Relocations.cpp
Commit 499260c03b916920d77c5833022937fd0e20d2c0 by aeubanks
Revert "[CFGuard] Add address-taken IAT tables and delay-load support"

This reverts commit ef4e971e5e18ae796466623df8f26265ba6bdfb5.
The file was modifiedlld/COFF/InputFiles.cpp
The file was modifiedllvm/tools/llvm-readobj/COFFDumper.cpp
The file was modifiedllvm/include/llvm/MC/MCObjectFileInfo.h
The file was modifiedlld/COFF/InputFiles.h
The file was modifiedlld/COFF/Symbols.h
The file was removedlld/test/COFF/giats.s
The file was modifiedlld/COFF/DLL.cpp
The file was modifiedllvm/lib/MC/MCObjectFileInfo.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
The file was modifiedlld/COFF/ICF.cpp
The file was modifiedlld/COFF/Writer.cpp
The file was removedllvm/test/CodeGen/WinCFGuard/cfguard-giats.ll
Commit 149f5b573c79eac0c519ada4d2f7c50e17796cdf by spatel
[APFloat] convert SNaN to QNaN in convert() and raise Invalid signal

This is an alternate fix (see D87835) for a bug where a NaN constant
gets wrongly transformed into Infinity via truncation.
In this patch, we uniformly convert any SNaN to QNaN while raising
'invalid op'.
But we don't have a way to directly specify a 32-bit SNaN value in LLVM IR,
so those are always encoded/decoded by calling convert from/to 64-bit hex.

See D88664 for a clang fix needed to allow this change.

Differential Revision: https://reviews.llvm.org/D88238
The file was modifiedclang/test/CodeGen/builtin-nan-legacy.c
The file was modifiedclang/test/CodeGen/builtin-nan-exception.c
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/unittests/ADT/APFloatTest.cpp
The file was modifiedllvm/lib/Support/APFloat.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/cast.ll
The file was modifiedclang/test/CodeGen/mips-unsupported-nan.c
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/nancvt.ll
Commit 8d26760a95bae34aa5c1161a1c2ab8c1cdaa10a1 by phosek
[CMake] Use -isystem flag to access libc++ headers

This is a partial revert of D62155. Rather than copying libc++ headers
into the build directory to be later overwritten by the final headers,
use -isystem flag to access libc++ headers during CMake checks. This
should address the occasional flake we've seen, especially on Windows
builders where CMake fails to overwrite __config with the final version.

Differential Revision: https://reviews.llvm.org/D88454
The file was modifiedllvm/runtimes/CMakeLists.txt
The file was modifiedlibcxx/include/CMakeLists.txt
Commit 9d1c8c0ba94a273c53829f0800335045e547db88 by nikita.ppv
[InstCombine] Fix select operand simplification with undef (PR47696)

When replacing X == Y ? f(X) : Z with X == Y ? f(Y) : Z, make sure
that Y cannot be undef. If it may be undef, we might end up picking
a different value for undef in the comparison and the select
operand.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/test/Transforms/InstCombine/select.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modifiedllvm/test/Transforms/InstCombine/select-binop-cmp.ll
Commit 5d46d7e8b288a52de1eff97d6c5b44039ede6661 by rnk
[PDB] Use one func id DenseMap instead of per-source maps, NFC

This avoids some DenseMap copies when /Zi is in use, and results in
fewer data structures.

Differential Revision: https://reviews.llvm.org/D88617
The file was modifiedlld/COFF/DebugTypes.h
The file was modifiedlld/COFF/PDB.cpp
The file was modifiedlld/COFF/TypeMerger.h
The file was modifiedlld/COFF/DebugTypes.cpp
Commit d12ae042e17b27ebc8d2b5ae3d8dd5f88384d093 by rnk
[lit] Fix Python 2/3 compat in new winreg search code

This should fix the test failures on the clang win64 bot:
http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/18830
It has been red since Sept 23-ish.

This was subtle to debug. Windows has 'find' and 'sort' utilities in
C:\Windows\system32, but they don't support all the same flags as the
coreutils programs. I configured the buildbot above with Python 2.7
64-bit (hey, it was set up in 2016). When I installed git for Windows, I
opted to add all the Unix utilities that come with git to the system
PATH. This is *almost* enough to make the LLVM tests pass, but not
quite, because if you use the system PATH, the Windows version of find
and sort come first, but the tests that use diff, cmp, etc, will all
pass. So only a handful of tests will fail, and with cryptic error
messages.

The code changed in this CL doesn't work with Python 2. Before
Python 3.2, the winreg.OpenKey function did not accept the `access=`
keyword argument, the caller was required to pass an unused `reserved`
positional argument of 0. The try/except/pass around the OpenKey
operation masked this usage error in Python 2.

Further, the result of the registry operation has to be converted from
unicode to add it to the environment, but that was incidental.
The file was modifiedllvm/utils/lit/lit/llvm/config.py
Commit de47e7122f69d56399c4f8864ba279e5ce635970 by phosek
[CMake][Fuchsia] Don't set WIN32 API, rely on autodetection

We prefer autodetection here to avoid persisting this configuration
in the generated __config header which is shared across targets.

Differential Revision: https://reviews.llvm.org/D88694
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit 88f2fe5cad6cc3a3830448cb8a88b52ee449f2d1 by i
Raland D87318 [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic

Add Thread Local Storage support for the 34 bit relocation R_PPC64_GOT_TLSGD_PCREL34 used in General Dynamic.

The compiler will produce code that looks like:
```
pla r3, x@got@tlsgd@pcrel            R_PPC64_GOT_TLSGD_PCREL34
bl __tls_get_addr@notoc(x@tlsgd)     R_PPC64_TLSGD
                                     R_PPC64_REL24_NOTOC
```
LLD should be able to correctly compute the relocation for  R_PPC64_GOT_TLSGD_PCREL34 as well as do the following two relaxations where possible:
General Dynamic to Local Exec:
```
paddi r3, r13, x@tprel
nop
```
and General Dynamic to Initial Exec:
```
pld r3, x@got@tprel@pcrel
add r3, r3, r13
```
Note:
This patch adds support for the PC Relative (no TOC) version of General Dynamic on top of the existing support for the TOC version of General Dynamic.
The ABI does not provide any way to tell by looking only at the relocation `R_PPC64_TLSGD` when it is being used in a TOC instruction sequence or and when it is being used in a no TOC sequence. The TOC sequence should always be 4 byte aligned. This patch adds one to the offset of the relocation when it is being used in a no TOC sequence. In this way LLD can tell by looking at the alignment of the offset of `R_PPC64_TLSGD` whether or not it is being used as part of a TOC or no TOC sequence.

Reviewed By: NeHuang, sfertile, MaskRay

Differential Revision: https://reviews.llvm.org/D87318
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was addedlld/test/ELF/ppc64-tls-pcrel-gd.s
The file was modifiedlld/ELF/Relocations.cpp
Commit 35ecc7fe49ba881a77e8146b51870a60a52b211f by hubert.reinterpretcast
[clang][Sema] Fix PR47676: Handle dependent AltiVec C-style cast

Fix premature decision in the presence of type-dependent expression
operands on whether AltiVec vector initializations from single
expressions are "splat" operations.

Verify that the instantiation is able to determine the correct cast
semantics for both the scalar type and the vector type case.

Note that, because the change only affects the single-expression
case (and the target type is an AltiVec-style vector type), the
replacement of a parenthesized list with a parenthesized expression
does not change the semantics of the program in a program-observable
manner.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D88526
The file was addedclang/test/SemaTemplate/pr47676.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
Commit 4c265ce665630b74ad9f25f67cd2114714b9aaab by Amara Emerson
[AArch64][GlobalISel] Camp oversize v4s64 G_FPEXT operations.
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit 73457536ff335a2cbe2381354512e0fcf9d703fd by Amara Emerson
[AArch64][GlobalISel] Use custom legalization for G_TRUNC for v8i8 vectors.

Truncating to v8i8 is a case where we want to split the source but also generate
intermediate truncates to reduce the size of the source vector before truncating
down to v8i8. This implements the same strategy as what SelectionDAG does, but
I'm not certain where if anywhere in generic code it should live.

Use it for legalization of v8s8 = G_ICMP v8s32.

Differential Revision: https://reviews.llvm.org/D88191
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-icmp.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit 1c1a8105580784c96212db1afc097a844740bc69 by aaronpuchert
libclc: Use find_package to find Python 3 and require it

The script's shebang wants Python 3, so we use FindPython3. The
original code didn't work when an unversioned python was not available.
This is explicitly allowed in PEP 394. ("Distributors may choose to set
the behavior of the python command as follows: python2, python3, not
provide python command, allow python to be configurable by an end user
or a system administrator.")

Also I think it's actually required, so let the configuration fail if we
can't find it.

Lastly remove the shebang, since the script is only run via interpreter
and doesn't have the executable bit set anyway.

Reviewed By: jvesely

Differential Revision: https://reviews.llvm.org/D88366
The file was modifiedlibclc/generic/lib/gen_convert.py
The file was modifiedlibclc/CMakeLists.txt
Commit b29573b672d795dfc58aaf70c70511229584e3c3 by aeubanks
[gn build] Support building with ThinLTO

Differential Revision: https://reviews.llvm.org/D88584
The file was modifiedllvm/utils/gn/build/buildflags.gni
The file was modifiedllvm/utils/gn/build/BUILD.gn
Commit 9f6acb13586b0b3b4e83dc03648ced02517bd236 by Amara Emerson
[AArch64][GlobalISel] Merge G_SHL, G_ASHR and G_LSHR legalizer rules together.

There's no need for any difference between these.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Commit 15ea45f16b261521e3251b4ff0bceaadf31a4515 by Raphael Isemann
[lldb] Skip unique_ptr import-std-module tests on Linux

This seems to fail on ubuntu 18.04.5 with Clang 9 due to:

Error output:
error: Couldn't lookup symbols:
  std::__1::default_delete<int>::operator()(int) const
The file was modifiedlldb/test/API/commands/expression/import-std-module/unique_ptr/TestUniquePtrFromStdModule.py
The file was modifiedlldb/test/API/commands/expression/import-std-module/unique_ptr-dbg-info-content/TestUniquePtrDbgInfoContent.py
Commit 4140f0744fb2deccb74e77282e23ff731f67821b by alexandre.ganea
[LLD][COFF] Fix crash with /summary and PCH input files

Before this patch /summary was crashing with some .PCH.OBJ files, because tpiMap[srcIdx++] was reading at the wrong location. When the TpiSource depends on a .PCH.OBJ file, the types should be offset by the previously merged PCH.OBJ set of indices.

Differential Revision: https://reviews.llvm.org/D88678
The file was addedlld/test/COFF/precomp-summary-fail.test
The file was addedlld/test/COFF/Inputs/precomp2-a.yaml
The file was modifiedlld/COFF/DebugTypes.cpp
The file was addedlld/test/COFF/Inputs/precomp2.yaml
Commit 8071c2f5c6149d0dc976819002dc46d9e7edfa40 by Amara Emerson
[AArch64][GlobalISel] Make <8 x s8> shifts legal.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit 9a2b3bbc59d57c4cf3a3b898cbfa805c4cc9263f by Amara Emerson
Revert "[AArch64][GlobalISel] Make <8 x s8> shifts legal."

Accidentally pushed this.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit a97e97faedab0ba57f7c471f778d38cfd18988b8 by Amara Emerson
[AArch64][GlobalISel] Make <8 x s8> shifts legal and add selection support.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit e28c5899a24117cdb0b081a54508af486a2634a0 by Amara Emerson
[AArch64][GlobalISel] Make <8 x s8> integer arithmetic ops legal.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vabs.ll
Commit 017b871502b0c6fe72f52c5b47780f77e38d9035 by Amara Emerson
[AArch64][GlobalISel] Alias rules for G_FCMP to G_ICMP.

No need to be different here for the vast majority of rules.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-icmp.mir
Commit 8e8664e55e8986e061283cb20c30f21fb2d2b641 by Jessica Paquette
[AArch64][GlobalISel] Use emitTestBit in selection for G_BRCOND

Partially refactoring, partially fixing a bug.

- We shouldn't use TB(N)ZX unless the bit number is >= 32
- We can fold more than xor using emitTestBit

Also remove a check which isn't relevant anymore + update tests.

Rename select-brcond-of-not.mir to select-brcond-of-binop.mir, since it now
tests more than just G_XOR.

Differential Revision: https://reviews.llvm.org/D88702
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/select-brcond-of-not.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-brcond-of-binop.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir
Commit 5402d11b1d8853ff10417b0f8d32edde3f4a51c0 by Jessica Paquette
[GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs

Similar to the FP case in `AArch64TargetLowering::LowerBR_CC`.

Instead of emitting the csets + a tbnz, just emit a compare + bcc
(or two bccs, depending on the condition code)

This improves cases like this: https://godbolt.org/z/v8hebx

This is a 0.1% geomean code size improvement for CTMark at -O3.

Differential Revision: https://reviews.llvm.org/D88624
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit e99d184d54937b56d5f4f1ba06fb984019beaee1 by pklausler
[flang] Readability improvement in binary->decimal conversion

Tweak binary->decimal conversions to avoid an integer multiplication
in a hot loop to improve readability and get a minor (~5%) speed-up.
Use native integer division by constants for more readability, too,
since current build compilers seem to optimize it correctly now.
Delete the now needless temporary work-around facility in
Common/unsigned-const-division.h.

Differential revision: https://reviews.llvm.org/D88604
The file was modifiedflang/runtime/edit-output.cpp
The file was modifiedflang/lib/Decimal/big-radix-floating-point.h
The file was removedflang/include/flang/Common/unsigned-const-division.h
The file was modifiedflang/lib/Decimal/binary-to-decimal.cpp
Commit caeb13aba853b949ca45627f023dbeac77c13b2f by Stanislav.Mekhanoshin
[AMDGPU] Allow SOP asm mnemonic to differ

Allows the creation of real SOP1 instructions with
assembler mnemonics that differ from their
pseudo-instruction mnemonics. The default behavior
keeps the mnemonics matching.

Corrects a subtarget label typo in a comment.

Authored By: Joe_Nash

Differential Revision: https://reviews.llvm.org/D88708
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
Commit de3cb9548d77726186db2d384193e0565cb0afc5 by listmail
Fix a bug in memset formation with vectors of non-integral pointers

We were converting the non-integral store into a integer store which is not legal.
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
Commit aab6f7db471d577d313f334cba37667c35158420 by muhammad.asif.manzoor
[AArch64][SVE] Add lowering for llvm fabs

Add the functionality to lower fabs for passthru variant

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D88679
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/test/CodeGen/AArch64/sve-fp.ll
Commit bb0344644a656734d707ab9c0baf6eb0533ac905 by listmail
[memcpyopt] Conservatively handle non-integral pointers

If we allow the non-integral pointers to become memset and memcpy, we loose the ability to reason about pointer propagation.  This patch is modeled on changes we've carried downstream for a long time, figured it was worth being equally conservative for other users.  There is room to refine the semantics and handling here if anyone is motivated.
The file was addedllvm/test/Transforms/MemCpyOpt/non-integral.ll
The file was modifiedllvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
Commit 75a5ec1bad18ae1d741830cc46946da00fed6ed9 by pklausler
[flang][msvc] Rework a MSVC work-around to avoid clang warning

A recent MSVC work-around patch is eliciting unused variable
warnings from clang; package the lambda reference arguments
into a struct to avoid the warning.

Differential revision: https://reviews.llvm.org/D88695
The file was modifiedflang/lib/Evaluate/fold-implementation.h
Commit 61687f3a48c254436cbdd55e10bfb23b727f3eb5 by pklausler
[flang] Fix buffering read->write transition

The buffer needs to be Reset() after a Flush(), since the
Flush() can be a no-op after a read->write transition.
And record numbers are 1-based, not 0-based.
This fixes a bug with rewrites of records that have been
recently read.

Differential revision: https://reviews.llvm.org/D88612
The file was modifiedflang/runtime/buffer.h
The file was modifiedflang/runtime/io-api.cpp
Commit 78a9e62aa6f8f39fe8141e5486fca6db29947ecf by jasonliu
[XCOFF] Enable -fdata-sections on AIX

Summary:
Some design decision worth noting about:

I've noticed a recent mailing discussing about why string literal is
not affected by -fdata-sections for ELF target:
http://lists.llvm.org/pipermail/llvm-dev/2020-September/145121.html

But on AIX, our linker could not split the mergeable string like other target.
So I think it would make more sense for us to emit separate csect for
every mergeable string in -fdata-sections mode,
as there might not be other ways for linker to do garbage collection
on unused mergeable string.

Reviewed By: daltenty, hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D88339
The file was addedllvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Commit a94d943f1a3f42efede7e908bb250c84f9f442b1 by pklausler
[flang] Fix actions at end of output record

It turns out that unformatted fixed-size output records
do need to be padded out if short, in order to avoid a
spurious EOF crash on a short record at the end of the file.
While here in AdvanceRecord(), move the unformatted
variable-length record header/footer writing code to here
from EndIoStatement().

Differential revision: https://reviews.llvm.org/D88685
The file was modifiedflang/runtime/io-stmt.cpp
The file was modifiedflang/runtime/io-stmt.h
The file was modifiedflang/runtime/unit.cpp
Commit 3261aefc72b3769e8b3eccbb67e1145e195ffa8d by pklausler
[flang] Extend runtime API for PAUSE to allow a stop code

Support integer and default character stop codes on PAUSE
statements.  Add length argument to STOP statement with a
character stop code.

Differential revision: https://reviews.llvm.org/D88692
The file was modifiedflang/runtime/stop.cpp
The file was modifiedflang/runtime/stop.h
Commit c1dcb573a861dc45be6e4cfc598b340c9079fc1f by clementval
[flang][openacc] Update loop construct lowering

Update the loop construct lowering to support multiple occurences of the same clauses
such as private. Add some utility functions used by other constructs.

Upstreaming part of https://github.com/flang-compiler/f18-llvm-project/pull/438/

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D88253
The file was modifiedflang/lib/Lower/OpenACC.cpp
Commit 82453e759c77941cf2281ade79fb9b945b7e9458 by jhuber6
[OpenMP] Add Missing Runtime Call for Globalization Remarks

Summary:
Add a missing runtime call to perform data globalization checks.

Reviewers: jdoerfert

Subscribers: guansong hiraditya llvm-commits sstefan1 yaxunl

Tags: #LLVM #OpenMP

Differential Revision: https://reviews.llvm.org/D88621
The file was modifiedllvm/test/Transforms/OpenMP/globalization_remarks.ll
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
Commit c4690b007743d2f564bc1156fdbdbcaad2adddcc by esme.yi
[PowerPC] Put the CR field in low bits of GRC during copying CRRC to GRC.

Summary: How we copying the CRRC to GRC is using a single MFOCRF to copy the contents of CR field n (CR bits 4×n+32:4×n+35) into bits 4×n+32:4×n+35 of register GRC. That’s not correct because we expect the value of destination register equals to source so we have to put the the contents of CR field in the lowest 4 bits. This patch adds a RLWINM after MFOCRF to achieve that.
The problem came up when adding builtins for xvtdivdp, xvtdivsp, xvtsqrtdp, xvtsqrtsp, as posted in D88278. We need to move the outputs (in CR register) to GRC. However outputs of these instructions may not in a fixed CR# register, so we can’t directly add a rotation instruction in the .td patterns, but need to wait until the CR register is determined. Then we confirmed this should be a bug in POST-RA PSEUDO PASS.

Reviewed By: nemanjai, shchenz

Differential Revision: https://reviews.llvm.org/D88274
The file was modifiedllvm/test/CodeGen/PowerPC/htm-ttest.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrHTM.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Commit 5136f4748a2b3302da581f6140ca453bb37f11e9 by carl.ritson
CodeGen: Fix livein calculation in MachineBasicBlock splitAt

Fix and simplify computation of liveins for new block.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D88535
The file was modifiedllvm/lib/CodeGen/MachineBasicBlock.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
Commit a1e97923a025d09934b557ca4343d8e4b5a9973d by Jason Molenda
Have kernel binary scanner load dSYMs as binary+dSYM if best thing found

lldb's PlatforDarwinKernel scans the local filesystem (well known
locations, plus user-specified directories) for kernels and kexts
when doing kernel debugging, and loads them automatically.  Sometimes
kernel developers want to debug with *only* a dSYM, in which case they
give lldb the DWARF binary + the dSYM as a binary and symbol file.
This patch adds code to lldb to do this automatically if that's the
best thing lldb can find.

A few other bits of cleanup in PlatformDarwinKernel that I undertook
at the same time:

1. Remove the 'platform.plugin.darwin-kernel.search-locally-for-kexts'
setting.  When I added the local filesystem index at start of kernel
debugging, I thought people might object to the cost of the search
and want a way to disable it.  No one has.

2. Change the behavior of
'plugin.dynamic-loader.darwin-kernel.load-kexts' setting so it does
not disable the local filesystem scan, or use of the local filesystem
binaries.

3. PlatformDarwinKernel::GetSharedModule into GetSharedModuleKext and
GetSharedModuleKernel for easier readability & maintenance.

4. Added accounting of .dSYM.yaa files (an archive format akin to tar)
that I come across during the scan.  I'm not using these for now; it
would be very expensive to expand the archives & see if the UUID matches
what I'm searching for.

<rdar://problem/69774993>
Differential Revision: https://reviews.llvm.org/D88632
The file was modifiedlldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.h
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformMacOSXProperties.td
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
Commit 2ef9d21e1a3cf8a58049921c785de1487fbcd7e1 by carl.ritson
[AMDGPU] SIInsertSkips: Tidy block splitting to use splitAt

Convert to use new MachineBasicBlock splitAt function.
Place code in splitBlock function for reuse in future changes.
Should yield no functional change.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D88537
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
Commit f29645e7afdbb8d1fc2dd603c0b128bac055625c by listmail
[gvn] Handle a corner case w/vectors of non-integral pointers

If we try to coerce a vector of non-integral pointers to a narrower type (either narrower vector or single pointer), we use inttoptr and violate the semantics of non-integral pointers.  In theory, we can handle many of these cases, we just need to use a different code idiom to convert without going through inttoptr and back.

This shows up as wrong code bugs, and in some cases, crashes due to failed asserts.  Modeled after a change which has lived downstream for a couple years, though completely rewritten to be more idiomatic.
The file was modifiedllvm/test/Transforms/GVN/non-integral-pointers.ll
The file was modifiedllvm/lib/Transforms/Utils/VNCoercion.cpp