FailedChanges

Summary

  1. [X86][SSE] resolveTargetShuffleInputs - call getTargetShuffleInputs instead of using setTargetShuffleZeroElements directly. NFCI.
  2. [Docs] Adds new Getting Started/Tutorials page Adds a new page for Getting Started/Tutorials topics. Also updates existing topic categories on the User Guides and Reference pages.
  3. Revert [DAGCombine] Match more patterns for half word bswap This reverts r373850 (git commit 25ba49824d2d4f2347b4a7cb1623600a76ce9433) This patch appears to cause multiple codegen regression test failures - http://lab.llvm.org:8011/builders/clang-cmake-armv7-quick/builds/10680
  4. [NFC] Replace 'isDarwin' with 'IsDarwin' Summary: Replace 'isDarwin' with 'IsDarwin' based on LLVM naming convention. Differential Revision: https://reviews.llvm.org/D68336
  5. [InstCombine] fold fneg disguised as select+fmul (PR43497) Extends rL373230 and solves the motivating bug (although in a narrow way): https://bugs.llvm.org/show_bug.cgi?id=43497
  6. [DAGCombine] Match more patterns for half word bswap Summary: It ensures that the bswap is generated even when a part of the subtree already matches a bswap transform. Reviewers: craig.topper, efriedma, RKSimon, lebedev.ri Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68250
  7. [X86][AVX] combineExtractSubvector - merge duplicate variables. NFCI.
  8. [InstCombine] add fast-math-flags for better test coverage; NFC
  9. [InstCombine] don't assume 'inbounds' for bitcast pointer to GEP transform (PR43501) https://bugs.llvm.org/show_bug.cgi?id=43501 We can't declare a GEP 'inbounds' in general. But we may salvage that information if we have known dereferenceable bytes on the source pointer. Differential Revision: https://reviews.llvm.org/D68244
  10. [X86][SSE] matchVectorShuffleAsBlend - use Zeroable element mask directly. We can make use of the Zeroable mask to indicate which elements we can safely set to zero instead of creating a target shuffle mask on the fly. This allows us to remove createTargetShuffleMask. This is part of the work to fix PR43024 and allow us to use SimplifyDemandedElts to simplify shuffle chains - we need to get to a point where the target shuffle masks isn't adjusted by its source inputs in setTargetShuffleZeroElements but instead we cache them in a parallel Zeroable mask.
  11. [X86] Enable AVX512BW for memcmp()
  12. [clang-format][docs] Fix the Google C++ and Chromium style guide URLs Summary: The Google C++ and Chromium style guides are broken in the clang-format docs. This patch updates them. Reviewers: djasper, MyDeveloperDay Reviewed By: MyDeveloperDay Subscribers: cfe-commits Tags: #clang Patch by: m4tx Differential Revision: https://reviews.llvm.org/D61256
  13. AMDGPU/GlobalISel: Fall back on weird G_EXTRACT offsets
  14. AMDGPU/GlobalISel: RegBankSelect mul24 intrinsics
  15. AMDGPU/GlobalISel: RegBankSelect DS GWS intrinsics
  16. AMDGPU/GlobalISel: Lower G_ATOMIC_CMPXCHG_WITH_SUCCESS
  17. GlobalISel: Partially implement lower for G_EXTRACT Turn into shift and truncate. Doesn't yet handle pointers.
  18. AMDGPU/GlobalISel: Fix RegBankSelect for sendmsg intrinsics This wasn't updated for the immarg handling change.
  19. [FastISel] Copy the inline assembly dialect to the INLINEASM instruction. Fixes PR43575.
  20. [X86][AVX] Push sign extensions of comparison bool results through bitops (PR42025) As discussed on PR42025, with more complex boolean math we can end up with many truncations/extensions of the comparison results through each bitop. This patch handles the cases introduced in combineBitcastvxi1 by pushing the sign extension through the AND/OR/XOR ops so its just the original SETCC ops that gets extended. Differential Revision: https://reviews.llvm.org/D68226
Revision 373855 by rksimon:
[X86][SSE] resolveTargetShuffleInputs - call getTargetShuffleInputs instead of using setTargetShuffleZeroElements directly. NFCI.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 373854 by dr87:
[Docs] Adds new Getting Started/Tutorials page

Adds a new page for Getting Started/Tutorials topics. Also updates existing topic categories on the User Guides and Reference pages.
Change TypePath in RepositoryPath in Workspace
The file was added/llvm/trunk/docs/GettingStartedTutorials.rstllvm.src/docs/GettingStartedTutorials.rst
The file was modified/llvm/trunk/docs/ProgrammingDocumentation.rst (diff)llvm.src/docs/ProgrammingDocumentation.rst
The file was modified/llvm/trunk/docs/Reference.rst (diff)llvm.src/docs/Reference.rst
The file was modified/llvm/trunk/docs/SubsystemDocumentation.rst (diff)llvm.src/docs/SubsystemDocumentation.rst
The file was modified/llvm/trunk/docs/UserGuides.rst (diff)llvm.src/docs/UserGuides.rst
The file was modified/llvm/trunk/docs/index.rst (diff)llvm.src/docs/index.rst
Revision 373853 by spatel:
Revert [DAGCombine] Match more patterns for half word bswap

This reverts r373850 (git commit 25ba49824d2d4f2347b4a7cb1623600a76ce9433)

This patch appears to cause multiple codegen regression test failures - http://lab.llvm.org:8011/builders/clang-cmake-armv7-quick/builds/10680
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/bswap_tree.ll (diff)llvm.src/test/CodeGen/X86/bswap_tree.ll
Revision 373852 by xiangling_liao:
[NFC] Replace 'isDarwin' with 'IsDarwin'

Summary: Replace 'isDarwin' with 'IsDarwin' based on LLVM naming convention.

Differential Revision: https://reviews.llvm.org/D68336
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp (diff)llvm.src/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h (diff)llvm.src/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
The file was modified/llvm/trunk/lib/Target/PowerPC/PPC.h (diff)llvm.src/lib/Target/PowerPC/PPC.h
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (diff)llvm.src/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (diff)llvm.src/lib/Target/PowerPC/PPCFrameLowering.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (diff)llvm.src/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCMCInstLower.cpp (diff)llvm.src/lib/Target/PowerPC/PPCMCInstLower.cpp
Revision 373851 by spatel:
[InstCombine] fold fneg disguised as select+fmul (PR43497)

Extends rL373230 and solves the motivating bug (although in a narrow way):
https://bugs.llvm.org/show_bug.cgi?id=43497
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp (diff)llvm.src/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
The file was modified/llvm/trunk/test/Transforms/InstCombine/fmul.ll (diff)llvm.src/test/Transforms/InstCombine/fmul.ll
Revision 373850 by deadalnix:
[DAGCombine] Match more patterns for half word bswap

Summary: It ensures that the bswap is generated even when a part of the subtree already matches a bswap transform.

Reviewers: craig.topper, efriedma, RKSimon, lebedev.ri

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68250
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/bswap_tree.ll (diff)llvm.src/test/CodeGen/X86/bswap_tree.ll
Revision 373849 by rksimon:
[X86][AVX] combineExtractSubvector - merge duplicate variables. NFCI.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 373848 by spatel:
[InstCombine] add fast-math-flags for better test coverage; NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/InstCombine/fmul.ll (diff)llvm.src/test/Transforms/InstCombine/fmul.ll
Revision 373847 by spatel:
[InstCombine] don't assume 'inbounds' for bitcast pointer to GEP transform (PR43501)

https://bugs.llvm.org/show_bug.cgi?id=43501
We can't declare a GEP 'inbounds' in general. But we may salvage that information if
we have known dereferenceable bytes on the source pointer.

Differential Revision: https://reviews.llvm.org/D68244
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/test/CodeGen/aapcs-bitfield.c (diff)clang.src/test/CodeGen/aapcs-bitfield.c
The file was modified/cfe/trunk/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp (diff)clang.src/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp
The file was modified/cfe/trunk/test/CodeGenCXX/microsoft-abi-typeid.cpp (diff)clang.src/test/CodeGenCXX/microsoft-abi-typeid.cpp
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (diff)llvm.src/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modified/llvm/trunk/test/Transforms/InstCombine/addrspacecast.ll (diff)llvm.src/test/Transforms/InstCombine/addrspacecast.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/cast.ll (diff)llvm.src/test/Transforms/InstCombine/cast.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/load-bitcast-vec.ll (diff)llvm.src/test/Transforms/InstCombine/load-bitcast-vec.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/memset.ll (diff)llvm.src/test/Transforms/InstCombine/memset.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/unpack-fca.ll (diff)llvm.src/test/Transforms/InstCombine/unpack-fca.ll
Revision 373846 by rksimon:
[X86][SSE] matchVectorShuffleAsBlend - use Zeroable element mask directly.

We can make use of the Zeroable mask to indicate which elements we can safely set to zero instead of creating a target shuffle mask on the fly.

This allows us to remove createTargetShuffleMask.

This is part of the work to fix PR43024 and allow us to use SimplifyDemandedElts to simplify shuffle chains - we need to get to a point where the target shuffle masks isn't adjusted by its source inputs in setTargetShuffleZeroElements but instead we cache them in a parallel Zeroable mask.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/packss.ll (diff)llvm.src/test/CodeGen/X86/packss.ll
Revision 373845 by davezarzycki:
[X86] Enable AVX512BW for memcmp()
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/memcmp.ll (diff)llvm.src/test/CodeGen/X86/memcmp.ll
The file was modified/llvm/trunk/test/CodeGen/X86/setcc-wide-types.ll (diff)llvm.src/test/CodeGen/X86/setcc-wide-types.ll
Revision 373844 by paulhoad:
[clang-format][docs] Fix the Google C++ and Chromium style guide URLs

Summary: The Google C++ and Chromium style guides are broken in the clang-format docs. This patch updates them.

Reviewers: djasper, MyDeveloperDay

Reviewed By: MyDeveloperDay

Subscribers: cfe-commits

Tags: #clang

Patch by: m4tx

Differential Revision: https://reviews.llvm.org/D61256
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/docs/ClangFormatStyleOptions.rst (diff)clang.src/docs/ClangFormatStyleOptions.rst
Revision 373842 by arsenm:
AMDGPU/GlobalISel: Fall back on weird G_EXTRACT offsets
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Revision 373841 by arsenm:
AMDGPU/GlobalISel: RegBankSelect mul24 intrinsics
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Revision 373840 by arsenm:
AMDGPU/GlobalISel: RegBankSelect DS GWS intrinsics
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
Revision 373839 by arsenm:
AMDGPU/GlobalISel: Lower G_ATOMIC_CMPXCHG_WITH_SUCCESS
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-with-success.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-with-success.mir
Revision 373838 by arsenm:
GlobalISel: Partially implement lower for G_EXTRACT

Turn into shift and truncate. Doesn't yet handle pointers.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (diff)llvm.src/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)llvm.src/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
Revision 373837 by arsenm:
AMDGPU/GlobalISel: Fix RegBankSelect for sendmsg intrinsics

This wasn't updated for the immarg handling change.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir
Revision 373836 by ctopper:
[FastISel] Copy the inline assembly dialect to the INLINEASM instruction.

Fixes PR43575.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/FastISel.cpp
The file was added/llvm/trunk/test/CodeGen/X86/pr43575.llllvm.src/test/CodeGen/X86/pr43575.ll
Revision 373834 by rksimon:
[X86][AVX] Push sign extensions of comparison bool results through bitops (PR42025)

As discussed on PR42025, with more complex boolean math we can end up with many truncations/extensions of the comparison results through each bitop.

This patch handles the cases introduced in combineBitcastvxi1 by pushing the sign extension through the AND/OR/XOR ops so its just the original SETCC ops that gets extended.

Differential Revision: https://reviews.llvm.org/D68226
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll (diff)llvm.src/test/CodeGen/X86/bitcast-and-setcc-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll (diff)llvm.src/test/CodeGen/X86/bitcast-and-setcc-512.ll