SuccessChanges

Summary

  1. clang/AMDGPU: Fix default for frame-pointer attribute (details)
  2. [PGO][PGSO] Instrument the code gen / target passes. (details)
  3. [x86] add cost model special-case for insert/extract from element 0 (details)
  4. Revert "ARM-Darwin: keep the frame register reserved even if not (details)
  5. [libcxx{,abi}] Don't link libpthread and libdl on Fuchsia (details)
Commit 2cc11941a2e88236e0b4842229454ae6d85142cd by arsenm2
clang/AMDGPU: Fix default for frame-pointer attribute
Enabling optimization should allow frame pointer elimination.
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was addedclang/test/Driver/frame-pointer-elim.cl
Commit 9a0b5e14075a1f42a72eedb66fd4fde7985d37ac by yamauchi
[PGO][PGSO] Instrument the code gen / target passes.
Summary: Split off of D67120.
Add the profile guided size optimization instrumentation / queries in
the code gen or target passes. This doesn't enable the size
optimizations in those passes yet as they are currently disabled in
shouldOptimizeForSize (for non-IR pass queries).
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71072
The file was modifiedllvm/lib/CodeGen/ExpandMemCmp.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/CodeGen/MachineCombiner.cpp
The file was modifiedllvm/lib/CodeGen/BranchFolding.cpp
The file was modifiedllvm/lib/CodeGen/TailDuplicator.cpp
The file was modifiedllvm/lib/CodeGen/BranchFolding.h
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/CodeGen/IfConversion.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
The file was modifiedllvm/include/llvm/CodeGen/TailDuplicator.h
The file was modifiedllvm/test/CodeGen/AArch64/O0-pipeline.ll
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/AArch64/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/O3-pipeline.ll
The file was modifiedllvm/lib/Target/X86/X86FixupBWInsts.cpp
The file was modifiedllvm/include/llvm/CodeGen/AsmPrinter.h
The file was modifiedllvm/lib/CodeGen/TailDuplication.cpp
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was modifiedllvm/lib/CodeGen/MachineBlockPlacement.cpp
The file was modifiedllvm/lib/Target/X86/X86OptimizeLEAs.cpp
The file was modifiedllvm/lib/Target/X86/X86PadShortFunction.cpp
Commit 7ff0fcb53f6e71bc22d37494fdfa68bbf2d3709b by spatel
[x86] add cost model special-case for insert/extract from element 0
This is a follow-up to D70607 where we made any extract element on SLM
more costly than default. But that is pessimistic for extract from
element 0 because that corresponds to x86 movd/movq instructions. These
generally have >1 cycle latency, but they are probably implemented as
single uop instructions.
Note that no vectorization tests are affected by this change. Also, no
targets besides SLM are affected because those are falling through to
the default cost of 1 anyway. But this will become visible/important if
we add more specializations via cost tables.
Differential Revision: https://reviews.llvm.org/D71023
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/fptoui.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vector-extract.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/fptosi.ll
Commit c7faa6814248cf2443cce856a74247fc70699f98 by asbirlea
Revert "ARM-Darwin: keep the frame register reserved even if not
updated."
This reverts commit a7d90af1be48234ce583e00fb16e33633d44ae38.
This revision came back as the root-cause for crashes in internal
ARM-IOS apps. Reproducer in https://bugs.llvm.org/show_bug.cgi?id=44231.
The file was modifiedllvm/test/CodeGen/Thumb/long.ll
The file was modifiedllvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
The file was removedllvm/test/CodeGen/ARM/r7-fixed-darwin.ll
The file was modifiedllvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Commit 1aa17023819216dae77c7798510f178dae07a57f by phosek
[libcxx{,abi}] Don't link libpthread and libdl on Fuchsia
These are a part of the libc so linking these explicitly isn't necessary
and embedding these as deplibs causes link time error.
This issues was introduced in a9b5fff which changed how we emit deplibs.
Differential Revision: https://reviews.llvm.org/D71135
The file was modifiedlibcxx/cmake/config-ix.cmake
The file was modifiedlibcxxabi/cmake/config-ix.cmake